diff options
Diffstat (limited to '')
-rw-r--r-- | C/CpuArch.h | 41 |
1 files changed, 40 insertions, 1 deletions
diff --git a/C/CpuArch.h b/C/CpuArch.h index 683cfaa..1690a5b 100644 --- a/C/CpuArch.h +++ b/C/CpuArch.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* CpuArch.h -- CPU specific code | 1 | /* CpuArch.h -- CPU specific code |
2 | 2024-06-17 : Igor Pavlov : Public domain */ | 2 | Igor Pavlov : Public domain */ |
3 | 3 | ||
4 | #ifndef ZIP7_INC_CPU_ARCH_H | 4 | #ifndef ZIP7_INC_CPU_ARCH_H |
5 | #define ZIP7_INC_CPU_ARCH_H | 5 | #define ZIP7_INC_CPU_ARCH_H |
@@ -47,6 +47,12 @@ MY_CPU_64BIT means that processor can work with 64-bit registers. | |||
47 | #define MY_CPU_SIZEOF_POINTER 4 | 47 | #define MY_CPU_SIZEOF_POINTER 4 |
48 | #endif | 48 | #endif |
49 | 49 | ||
50 | #if defined(__SSE2__) \ | ||
51 | || defined(MY_CPU_AMD64) \ | ||
52 | || defined(_M_IX86_FP) && (_M_IX86_FP >= 2) | ||
53 | #define MY_CPU_SSE2 | ||
54 | #endif | ||
55 | |||
50 | 56 | ||
51 | #if defined(_M_ARM64) \ | 57 | #if defined(_M_ARM64) \ |
52 | || defined(_M_ARM64EC) \ | 58 | || defined(_M_ARM64EC) \ |
@@ -509,11 +515,19 @@ problem-4 : performace: | |||
509 | 515 | ||
510 | #if defined(MY_CPU_LE_UNALIGN) && defined(Z7_CPU_FAST_BSWAP_SUPPORTED) | 516 | #if defined(MY_CPU_LE_UNALIGN) && defined(Z7_CPU_FAST_BSWAP_SUPPORTED) |
511 | 517 | ||
518 | #if 0 | ||
519 | // Z7_BSWAP16 can be slow for x86-msvc | ||
520 | #define GetBe16_to32(p) (Z7_BSWAP16 (*(const UInt16 *)(const void *)(p))) | ||
521 | #else | ||
522 | #define GetBe16_to32(p) (Z7_BSWAP32 (*(const UInt16 *)(const void *)(p)) >> 16) | ||
523 | #endif | ||
524 | |||
512 | #define GetBe32(p) Z7_BSWAP32 (*(const UInt32 *)(const void *)(p)) | 525 | #define GetBe32(p) Z7_BSWAP32 (*(const UInt32 *)(const void *)(p)) |
513 | #define SetBe32(p, v) { (*(UInt32 *)(void *)(p)) = Z7_BSWAP32(v); } | 526 | #define SetBe32(p, v) { (*(UInt32 *)(void *)(p)) = Z7_BSWAP32(v); } |
514 | 527 | ||
515 | #if defined(MY_CPU_LE_UNALIGN_64) | 528 | #if defined(MY_CPU_LE_UNALIGN_64) |
516 | #define GetBe64(p) Z7_BSWAP64 (*(const UInt64 *)(const void *)(p)) | 529 | #define GetBe64(p) Z7_BSWAP64 (*(const UInt64 *)(const void *)(p)) |
530 | #define SetBe64(p, v) { (*(UInt64 *)(void *)(p)) = Z7_BSWAP64(v); } | ||
517 | #endif | 531 | #endif |
518 | 532 | ||
519 | #else | 533 | #else |
@@ -536,21 +550,39 @@ problem-4 : performace: | |||
536 | #define GetBe64(p) (((UInt64)GetBe32(p) << 32) | GetBe32(((const Byte *)(p)) + 4)) | 550 | #define GetBe64(p) (((UInt64)GetBe32(p) << 32) | GetBe32(((const Byte *)(p)) + 4)) |
537 | #endif | 551 | #endif |
538 | 552 | ||
553 | #ifndef SetBe64 | ||
554 | #define SetBe64(p, v) { Byte *_ppp_ = (Byte *)(p); UInt64 _vvv_ = (v); \ | ||
555 | _ppp_[0] = (Byte)(_vvv_ >> 56); \ | ||
556 | _ppp_[1] = (Byte)(_vvv_ >> 48); \ | ||
557 | _ppp_[2] = (Byte)(_vvv_ >> 40); \ | ||
558 | _ppp_[3] = (Byte)(_vvv_ >> 32); \ | ||
559 | _ppp_[4] = (Byte)(_vvv_ >> 24); \ | ||
560 | _ppp_[5] = (Byte)(_vvv_ >> 16); \ | ||
561 | _ppp_[6] = (Byte)(_vvv_ >> 8); \ | ||
562 | _ppp_[7] = (Byte)_vvv_; } | ||
563 | #endif | ||
564 | |||
539 | #ifndef GetBe16 | 565 | #ifndef GetBe16 |
566 | #ifdef GetBe16_to32 | ||
567 | #define GetBe16(p) ( (UInt16) GetBe16_to32(p)) | ||
568 | #else | ||
540 | #define GetBe16(p) ( (UInt16) ( \ | 569 | #define GetBe16(p) ( (UInt16) ( \ |
541 | ((UInt16)((const Byte *)(p))[0] << 8) | \ | 570 | ((UInt16)((const Byte *)(p))[0] << 8) | \ |
542 | ((const Byte *)(p))[1] )) | 571 | ((const Byte *)(p))[1] )) |
543 | #endif | 572 | #endif |
573 | #endif | ||
544 | 574 | ||
545 | 575 | ||
546 | #if defined(MY_CPU_BE) | 576 | #if defined(MY_CPU_BE) |
547 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) (v) | 577 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) (v) |
548 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) | 578 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) |
549 | #define Z7_CONV_NATIVE_TO_BE_32(v) (v) | 579 | #define Z7_CONV_NATIVE_TO_BE_32(v) (v) |
580 | // #define Z7_GET_NATIVE16_FROM_2_BYTES(b0, b1) ((b1) | ((b0) << 8)) | ||
550 | #elif defined(MY_CPU_LE) | 581 | #elif defined(MY_CPU_LE) |
551 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) | 582 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) |
552 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) (v) | 583 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) (v) |
553 | #define Z7_CONV_NATIVE_TO_BE_32(v) Z7_BSWAP32(v) | 584 | #define Z7_CONV_NATIVE_TO_BE_32(v) Z7_BSWAP32(v) |
585 | // #define Z7_GET_NATIVE16_FROM_2_BYTES(b0, b1) ((b0) | ((b1) << 8)) | ||
554 | #else | 586 | #else |
555 | #error Stop_Compiling_Unknown_Endian_CONV | 587 | #error Stop_Compiling_Unknown_Endian_CONV |
556 | #endif | 588 | #endif |
@@ -589,6 +621,11 @@ problem-4 : performace: | |||
589 | #endif | 621 | #endif |
590 | 622 | ||
591 | 623 | ||
624 | #ifndef GetBe16_to32 | ||
625 | #define GetBe16_to32(p) GetBe16(p) | ||
626 | #endif | ||
627 | |||
628 | |||
592 | #if defined(MY_CPU_X86_OR_AMD64) \ | 629 | #if defined(MY_CPU_X86_OR_AMD64) \ |
593 | || defined(MY_CPU_ARM_OR_ARM64) \ | 630 | || defined(MY_CPU_ARM_OR_ARM64) \ |
594 | || defined(MY_CPU_PPC_OR_PPC64) | 631 | || defined(MY_CPU_PPC_OR_PPC64) |
@@ -617,6 +654,7 @@ BoolInt CPU_IsSupported_SSE2(void); | |||
617 | BoolInt CPU_IsSupported_SSSE3(void); | 654 | BoolInt CPU_IsSupported_SSSE3(void); |
618 | BoolInt CPU_IsSupported_SSE41(void); | 655 | BoolInt CPU_IsSupported_SSE41(void); |
619 | BoolInt CPU_IsSupported_SHA(void); | 656 | BoolInt CPU_IsSupported_SHA(void); |
657 | BoolInt CPU_IsSupported_SHA512(void); | ||
620 | BoolInt CPU_IsSupported_PageGB(void); | 658 | BoolInt CPU_IsSupported_PageGB(void); |
621 | 659 | ||
622 | #elif defined(MY_CPU_ARM_OR_ARM64) | 660 | #elif defined(MY_CPU_ARM_OR_ARM64) |
@@ -634,6 +672,7 @@ BoolInt CPU_IsSupported_SHA1(void); | |||
634 | BoolInt CPU_IsSupported_SHA2(void); | 672 | BoolInt CPU_IsSupported_SHA2(void); |
635 | BoolInt CPU_IsSupported_AES(void); | 673 | BoolInt CPU_IsSupported_AES(void); |
636 | #endif | 674 | #endif |
675 | BoolInt CPU_IsSupported_SHA512(void); | ||
637 | 676 | ||
638 | #endif | 677 | #endif |
639 | 678 | ||