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| author | Roberto Ierusalimschy <roberto@inf.puc-rio.br> | 2008-04-02 14:38:54 -0300 |
|---|---|---|
| committer | Roberto Ierusalimschy <roberto@inf.puc-rio.br> | 2008-04-02 14:38:54 -0300 |
| commit | a4d3080fe3d07af9d2d3124b8f49eadda7c21b44 (patch) | |
| tree | e90941e2268f10ac4f7234f13efdbf85f5277e99 /lopcodes.h | |
| parent | 5627d51e0576887c4133f5b77b1dfb67334b3115 (diff) | |
| download | lua-a4d3080fe3d07af9d2d3124b8f49eadda7c21b44.tar.gz lua-a4d3080fe3d07af9d2d3124b8f49eadda7c21b44.tar.bz2 lua-a4d3080fe3d07af9d2d3124b8f49eadda7c21b44.zip | |
SETLIST extra argument now is an "instruction" (OP_EXTRAARG)
Diffstat (limited to 'lopcodes.h')
| -rw-r--r-- | lopcodes.h | 52 |
1 files changed, 34 insertions, 18 deletions
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | ** $Id: lopcodes.h,v 1.125 2006/03/14 19:04:44 roberto Exp roberto $ | 2 | ** $Id: lopcodes.h,v 1.126 2006/09/11 14:07:24 roberto Exp roberto $ |
| 3 | ** Opcodes for Lua virtual machine | 3 | ** Opcodes for Lua virtual machine |
| 4 | ** See Copyright Notice in lua.h | 4 | ** See Copyright Notice in lua.h |
| 5 | */ | 5 | */ |
| @@ -28,7 +28,7 @@ | |||
| 28 | ===========================================================================*/ | 28 | ===========================================================================*/ |
| 29 | 29 | ||
| 30 | 30 | ||
| 31 | enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ | 31 | enum OpMode {iABC, iABx, iAsBx, iAx}; /* basic instruction format */ |
| 32 | 32 | ||
| 33 | 33 | ||
| 34 | /* | 34 | /* |
| @@ -38,6 +38,7 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ | |||
| 38 | #define SIZE_B 9 | 38 | #define SIZE_B 9 |
| 39 | #define SIZE_Bx (SIZE_C + SIZE_B) | 39 | #define SIZE_Bx (SIZE_C + SIZE_B) |
| 40 | #define SIZE_A 8 | 40 | #define SIZE_A 8 |
| 41 | #define SIZE_Ax (SIZE_C + SIZE_B + SIZE_A) | ||
| 41 | 42 | ||
| 42 | #define SIZE_OP 6 | 43 | #define SIZE_OP 6 |
| 43 | 44 | ||
| @@ -46,6 +47,7 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ | |||
| 46 | #define POS_C (POS_A + SIZE_A) | 47 | #define POS_C (POS_A + SIZE_A) |
| 47 | #define POS_B (POS_C + SIZE_C) | 48 | #define POS_B (POS_C + SIZE_C) |
| 48 | #define POS_Bx POS_C | 49 | #define POS_Bx POS_C |
| 50 | #define POS_Ax POS_A | ||
| 49 | 51 | ||
| 50 | 52 | ||
| 51 | /* | 53 | /* |
| @@ -61,6 +63,12 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ | |||
| 61 | #define MAXARG_sBx MAX_INT | 63 | #define MAXARG_sBx MAX_INT |
| 62 | #endif | 64 | #endif |
| 63 | 65 | ||
| 66 | #if SIZE_Ax < LUAI_BITSINT-1 | ||
| 67 | #define MAXARG_Ax ((1<<SIZE_Ax)-1) | ||
| 68 | #else | ||
| 69 | #define MAXARG_Ax MAX_INT | ||
| 70 | #endif | ||
| 71 | |||
| 64 | 72 | ||
| 65 | #define MAXARG_A ((1<<SIZE_A)-1) | 73 | #define MAXARG_A ((1<<SIZE_A)-1) |
| 66 | #define MAXARG_B ((1<<SIZE_B)-1) | 74 | #define MAXARG_B ((1<<SIZE_B)-1) |
| @@ -68,7 +76,7 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ | |||
| 68 | 76 | ||
| 69 | 77 | ||
| 70 | /* creates a mask with `n' 1 bits at position `p' */ | 78 | /* creates a mask with `n' 1 bits at position `p' */ |
| 71 | #define MASK1(n,p) ((~((~(Instruction)0)<<n))<<p) | 79 | #define MASK1(n,p) ((~((~(Instruction)0)<<(n)))<<(p)) |
| 72 | 80 | ||
| 73 | /* creates a mask with `n' 0 bits at position `p' */ | 81 | /* creates a mask with `n' 0 bits at position `p' */ |
| 74 | #define MASK0(n,p) (~MASK1(n,p)) | 82 | #define MASK0(n,p) (~MASK1(n,p)) |
| @@ -81,21 +89,24 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ | |||
| 81 | #define SET_OPCODE(i,o) ((i) = (((i)&MASK0(SIZE_OP,POS_OP)) | \ | 89 | #define SET_OPCODE(i,o) ((i) = (((i)&MASK0(SIZE_OP,POS_OP)) | \ |
| 82 | ((cast(Instruction, o)<<POS_OP)&MASK1(SIZE_OP,POS_OP)))) | 90 | ((cast(Instruction, o)<<POS_OP)&MASK1(SIZE_OP,POS_OP)))) |
| 83 | 91 | ||
| 84 | #define GETARG_A(i) (cast(int, ((i)>>POS_A) & MASK1(SIZE_A,0))) | 92 | #define getarg(i,pos,size) (cast(int, ((i)>>pos) & MASK1(size,0))) |
| 85 | #define SETARG_A(i,u) ((i) = (((i)&MASK0(SIZE_A,POS_A)) | \ | 93 | #define setarg(i,v,pos,size) ((i) = (((i)&MASK0(size,pos)) | \ |
| 86 | ((cast(Instruction, u)<<POS_A)&MASK1(SIZE_A,POS_A)))) | 94 | ((cast(Instruction, v)<<pos)&MASK1(size,pos)))) |
| 95 | |||
| 96 | #define GETARG_A(i) getarg(i, POS_A, SIZE_A) | ||
| 97 | #define SETARG_A(i,v) setarg(i, v, POS_A, SIZE_A) | ||
| 87 | 98 | ||
| 88 | #define GETARG_B(i) (cast(int, ((i)>>POS_B) & MASK1(SIZE_B,0))) | 99 | #define GETARG_B(i) getarg(i, POS_B, SIZE_B) |
| 89 | #define SETARG_B(i,b) ((i) = (((i)&MASK0(SIZE_B,POS_B)) | \ | 100 | #define SETARG_B(i,v) setarg(i, v, POS_B, SIZE_B) |
| 90 | ((cast(Instruction, b)<<POS_B)&MASK1(SIZE_B,POS_B)))) | ||
| 91 | 101 | ||
| 92 | #define GETARG_C(i) (cast(int, ((i)>>POS_C) & MASK1(SIZE_C,0))) | 102 | #define GETARG_C(i) getarg(i, POS_C, SIZE_C) |
| 93 | #define SETARG_C(i,b) ((i) = (((i)&MASK0(SIZE_C,POS_C)) | \ | 103 | #define SETARG_C(i,v) setarg(i, v, POS_C, SIZE_C) |
| 94 | ((cast(Instruction, b)<<POS_C)&MASK1(SIZE_C,POS_C)))) | ||
| 95 | 104 | ||
| 96 | #define GETARG_Bx(i) (cast(int, ((i)>>POS_Bx) & MASK1(SIZE_Bx,0))) | 105 | #define GETARG_Bx(i) getarg(i, POS_Bx, SIZE_Bx) |
| 97 | #define SETARG_Bx(i,b) ((i) = (((i)&MASK0(SIZE_Bx,POS_Bx)) | \ | 106 | #define SETARG_Bx(i,v) setarg(i, v, POS_Bx, SIZE_Bx) |
| 98 | ((cast(Instruction, b)<<POS_Bx)&MASK1(SIZE_Bx,POS_Bx)))) | 107 | |
| 108 | #define GETARG_Ax(i) getarg(i, POS_Ax, SIZE_Ax) | ||
| 109 | #define SETARG_Ax(i,v) setarg(i, v, POS_Ax, SIZE_Ax) | ||
| 99 | 110 | ||
| 100 | #define GETARG_sBx(i) (GETARG_Bx(i)-MAXARG_sBx) | 111 | #define GETARG_sBx(i) (GETARG_Bx(i)-MAXARG_sBx) |
| 101 | #define SETARG_sBx(i,b) SETARG_Bx((i),cast(unsigned int, (b)+MAXARG_sBx)) | 112 | #define SETARG_sBx(i,b) SETARG_Bx((i),cast(unsigned int, (b)+MAXARG_sBx)) |
| @@ -110,6 +121,9 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ | |||
| 110 | | (cast(Instruction, a)<<POS_A) \ | 121 | | (cast(Instruction, a)<<POS_A) \ |
| 111 | | (cast(Instruction, bc)<<POS_Bx)) | 122 | | (cast(Instruction, bc)<<POS_Bx)) |
| 112 | 123 | ||
| 124 | #define CREATE_Ax(o,a) ((cast(Instruction, o)<<POS_OP) \ | ||
| 125 | | (cast(Instruction, a)<<POS_A)) | ||
| 126 | |||
| 113 | 127 | ||
| 114 | /* | 128 | /* |
| 115 | ** Macros to operate RK indices | 129 | ** Macros to operate RK indices |
| @@ -204,11 +218,13 @@ OP_SETLIST,/* A B C R(A)[(C-1)*FPF+i] := R(A+i), 1 <= i <= B */ | |||
| 204 | OP_CLOSE,/* A close all variables in the stack up to (>=) R(A)*/ | 218 | OP_CLOSE,/* A close all variables in the stack up to (>=) R(A)*/ |
| 205 | OP_CLOSURE,/* A Bx R(A) := closure(KPROTO[Bx], R(A), ... ,R(A+n)) */ | 219 | OP_CLOSURE,/* A Bx R(A) := closure(KPROTO[Bx], R(A), ... ,R(A+n)) */ |
| 206 | 220 | ||
| 207 | OP_VARARG/* A B R(A), R(A+1), ..., R(A+B-1) = vararg */ | 221 | OP_VARARG,/* A B R(A), R(A+1), ..., R(A+B-1) = vararg */ |
| 222 | |||
| 223 | OP_EXTRAARG/* Ax extra argument for previous opcode */ | ||
| 208 | } OpCode; | 224 | } OpCode; |
| 209 | 225 | ||
| 210 | 226 | ||
| 211 | #define NUM_OPCODES (cast(int, OP_VARARG) + 1) | 227 | #define NUM_OPCODES (cast(int, OP_EXTRAARG) + 1) |
| 212 | 228 | ||
| 213 | 229 | ||
| 214 | 230 | ||
| @@ -224,7 +240,7 @@ OP_VARARG/* A B R(A), R(A+1), ..., R(A+B-1) = vararg */ | |||
| 224 | (*) In OP_RETURN, if (B == 0) then return up to `top' | 240 | (*) In OP_RETURN, if (B == 0) then return up to `top' |
| 225 | 241 | ||
| 226 | (*) In OP_SETLIST, if (B == 0) then B = `top'; | 242 | (*) In OP_SETLIST, if (B == 0) then B = `top'; |
| 227 | if (C == 0) then next `instruction' is real C | 243 | if (C == 0) then next `instruction' is EXTRAARG(real C) |
| 228 | 244 | ||
| 229 | (*) For comparisons, A specifies what condition the test should accept | 245 | (*) For comparisons, A specifies what condition the test should accept |
| 230 | (true or false). | 246 | (true or false). |
