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authorRoberto Ierusalimschy <roberto@inf.puc-rio.br>2002-08-20 17:03:05 -0300
committerRoberto Ierusalimschy <roberto@inf.puc-rio.br>2002-08-20 17:03:05 -0300
commit6c283b2f4f8398322e7a9a62ec8e131852b4e015 (patch)
tree608d5b61b14dfdb91cc5cf72637e876337cffcb8 /lopcodes.h
parent576bded5137babb9c669ccff5aedf19ed65a7598 (diff)
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new simetric format for ABC instructions, to avoid exchanging operands
for `commutative' operators
Diffstat (limited to 'lopcodes.h')
-rw-r--r--lopcodes.h48
1 files changed, 24 insertions, 24 deletions
diff --git a/lopcodes.h b/lopcodes.h
index f2d5b10b..7c695324 100644
--- a/lopcodes.h
+++ b/lopcodes.h
@@ -1,5 +1,5 @@
1/* 1/*
2** $Id: lopcodes.h,v 1.99 2002/06/12 14:51:31 roberto Exp $ 2** $Id: lopcodes.h,v 1.100 2002/08/05 14:46:43 roberto Exp roberto $
3** Opcodes for Lua virtual machine 3** Opcodes for Lua virtual machine
4** See Copyright Notice in lua.h 4** See Copyright Notice in lua.h
5*/ 5*/
@@ -14,9 +14,9 @@
14 We assume that instructions are unsigned numbers. 14 We assume that instructions are unsigned numbers.
15 All instructions have an opcode in the first 6 bits. 15 All instructions have an opcode in the first 6 bits.
16 Instructions can have the following fields: 16 Instructions can have the following fields:
17 `A' : 8 bits (25-32) 17 `A' : 8 bits
18 `B' : 8 bits (17-24) 18 `B' : 9 bits
19 `C' : 10 bits (7-16) 19 `C' : 9 bits
20 `Bx' : 18 bits (`B' and `C' together) 20 `Bx' : 18 bits (`B' and `C' together)
21 `sBx' : signed Bx 21 `sBx' : signed Bx
22 22
@@ -34,8 +34,8 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */
34/* 34/*
35** size and position of opcode arguments. 35** size and position of opcode arguments.
36*/ 36*/
37#define SIZE_C 10 37#define SIZE_C 9
38#define SIZE_B 8 38#define SIZE_B 9
39#define SIZE_Bx (SIZE_C + SIZE_B) 39#define SIZE_Bx (SIZE_C + SIZE_B)
40#define SIZE_A 8 40#define SIZE_A 8
41 41
@@ -112,16 +112,15 @@ enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */
112 112
113 113
114/* 114/*
115** invalid registers that fits in 8 bits 115** invalid register that fits in 8 bits
116*/ 116*/
117#define NO_REG MAXARG_A 117#define NO_REG MAXARG_A
118#define NO_REG1 (NO_REG+1)
119 118
120 119
121/* 120/*
122** R(x) - register 121** R(x) - register
123** Kst(x) - constant (in constant table) 122** Kst(x) - constant (in constant table)
124** R/K(x) == if x < MAXSTACK then R(x) else Kst(x-MAXSTACK) 123** RK(x) == if x < MAXSTACK then R(x) else Kst(x-MAXSTACK)
125*/ 124*/
126 125
127typedef enum { 126typedef enum {
@@ -135,21 +134,21 @@ OP_LOADNIL,/* A B R(A) := ... := R(B) := nil */
135OP_GETUPVAL,/* A B R(A) := UpValue[B] */ 134OP_GETUPVAL,/* A B R(A) := UpValue[B] */
136 135
137OP_GETGLOBAL,/* A Bx R(A) := Gbl[Kst(Bx)] */ 136OP_GETGLOBAL,/* A Bx R(A) := Gbl[Kst(Bx)] */
138OP_GETTABLE,/* A B C R(A) := R(B)[R/K(C)] */ 137OP_GETTABLE,/* A B C R(A) := R(B)[RK(C)] */
139 138
140OP_SETGLOBAL,/* A Bx Gbl[Kst(Bx)] := R(A) */ 139OP_SETGLOBAL,/* A Bx Gbl[Kst(Bx)] := R(A) */
141OP_SETUPVAL,/* A B UpValue[B] := R(A) */ 140OP_SETUPVAL,/* A B UpValue[B] := R(A) */
142OP_SETTABLE,/* A B C R(B)[R/K(C)] := R(A) */ 141OP_SETTABLE,/* A B C R(A)[RK(B)] := RK(C) */
143 142
144OP_NEWTABLE,/* A B C R(A) := {} (size = B,C) */ 143OP_NEWTABLE,/* A B C R(A) := {} (size = B,C) */
145 144
146OP_SELF,/* A B C R(A+1) := R(B); R(A) := R(B)[R/K(C)] */ 145OP_SELF,/* A B C R(A+1) := R(B); R(A) := R(B)[RK(C)] */
147 146
148OP_ADD,/* A B C R(A) := R(B) + R/K(C) */ 147OP_ADD,/* A B C R(A) := RK(B) + RK(C) */
149OP_SUB,/* A B C R(A) := R(B) - R/K(C) */ 148OP_SUB,/* A B C R(A) := RK(B) - RK(C) */
150OP_MUL,/* A B C R(A) := R(B) * R/K(C) */ 149OP_MUL,/* A B C R(A) := RK(B) * RK(C) */
151OP_DIV,/* A B C R(A) := R(B) / R/K(C) */ 150OP_DIV,/* A B C R(A) := RK(B) / RK(C) */
152OP_POW,/* A B C R(A) := R(B) ^ R/K(C) */ 151OP_POW,/* A B C R(A) := RK(B) ^ RK(C) */
153OP_UNM,/* A B R(A) := -R(B) */ 152OP_UNM,/* A B R(A) := -R(B) */
154OP_NOT,/* A B R(A) := not R(B) */ 153OP_NOT,/* A B R(A) := not R(B) */
155 154
@@ -157,13 +156,11 @@ OP_CONCAT,/* A B C R(A) := R(B).. ... ..R(C) */
157 156
158OP_JMP,/* sBx PC += sBx */ 157OP_JMP,/* sBx PC += sBx */
159 158
160OP_EQ,/* A B C if ((R(A) == R/K(C)) ~= B) then pc++ */ 159OP_EQ,/* A B C if ((RK(B) == RK(C)) ~= A) then pc++ */
161OP_LT,/* A B C if ((R(A) < R/K(C)) ~= B) then pc++ */ 160OP_LT,/* A B C if ((RK(B) < RK(C)) ~= A) then pc++ */
162OP_LE,/* A B C if ((R(A) <= R/K(C)) ~= B) then pc++ */ 161OP_LE,/* A B C if ((RK(B) <= RK(C)) ~= A) then pc++ */
163OP_GT,/* A B C if ((R(A) > R/K(C)) ~= B) then pc++ */
164OP_GE,/* A B C if ((R(A) >= R/K(C)) ~= B) then pc++ */
165 162
166OP_TEST,/* A B C if (R(C) <=> B) then R(A) := R(C) else pc++ */ 163OP_TEST,/* A B C if (R(B) <=> C) then R(A) := R(B) else pc++ */
167 164
168OP_CALL,/* A B C R(A), ... ,R(A+C-2) := R(A)(R(A+1), ... ,R(A+B-1)) */ 165OP_CALL,/* A B C R(A), ... ,R(A+C-2) := R(A)(R(A+1), ... ,R(A+B-1)) */
169OP_TAILCALL,/* A B C return R(A)(R(A+1), ... ,R(A+B-1)) */ 166OP_TAILCALL,/* A B C return R(A)(R(A+1), ... ,R(A+B-1)) */
@@ -207,12 +204,15 @@ OP_CLOSURE/* A Bx R(A) := closure(KPROTO[Bx], R(A), ... ,R(A+n)) */
207*/ 204*/
208enum OpModeMask { 205enum OpModeMask {
209 OpModeBreg = 2, /* B is a register */ 206 OpModeBreg = 2, /* B is a register */
210 OpModeCreg, /* C is a register/constant */ 207 OpModeBrk, /* B is a register/constant */
208 OpModeCrk, /* C is a register/constant */
211 OpModesetA, /* instruction set register A */ 209 OpModesetA, /* instruction set register A */
212 OpModeK, /* Bx is a constant */ 210 OpModeK, /* Bx is a constant */
213 OpModeT /* operator is a test */ 211 OpModeT /* operator is a test */
212
214}; 213};
215 214
215
216extern const lu_byte luaP_opmodes[NUM_OPCODES]; 216extern const lu_byte luaP_opmodes[NUM_OPCODES];
217 217
218#define getOpMode(m) (cast(enum OpMode, luaP_opmodes[m] & 3)) 218#define getOpMode(m) (cast(enum OpMode, luaP_opmodes[m] & 3))