diff options
author | Mike Pall <mike> | 2023-10-08 21:39:40 +0200 |
---|---|---|
committer | Mike Pall <mike> | 2023-10-08 21:39:40 +0200 |
commit | c5b075eb313e7ed4f3184382f6e70bc48b15ec72 (patch) | |
tree | 199dccf413949e6bd745cfc015162f0835423be3 | |
parent | 9cc8bbb7ae3675382d016e33b6d8b022101077b8 (diff) | |
download | luajit-c5b075eb313e7ed4f3184382f6e70bc48b15ec72.tar.gz luajit-c5b075eb313e7ed4f3184382f6e70bc48b15ec72.tar.bz2 luajit-c5b075eb313e7ed4f3184382f6e70bc48b15ec72.zip |
ARM64: Unify constant register handling in interpreter.
Plus minor optimizations. Simplifications for out-of-tree ARM64EC.
Thanks to Peter Cawley. #1096
Diffstat (limited to '')
-rw-r--r-- | src/vm_arm64.dasc | 150 |
1 files changed, 73 insertions, 77 deletions
diff --git a/src/vm_arm64.dasc b/src/vm_arm64.dasc index 26973686..2aaa64cb 100644 --- a/src/vm_arm64.dasc +++ b/src/vm_arm64.dasc | |||
@@ -291,8 +291,17 @@ | |||
291 | | blo target | 291 | | blo target |
292 | |.endmacro | 292 | |.endmacro |
293 | | | 293 | | |
294 | |.macro init_constants | ||
295 | | movn TISNIL, #0 | ||
296 | | movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48 | ||
297 | | movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16 | ||
298 | |.endmacro | ||
299 | | | ||
294 | |.macro mov_false, reg; movn reg, #0x8000, lsl #32; .endmacro | 300 | |.macro mov_false, reg; movn reg, #0x8000, lsl #32; .endmacro |
295 | |.macro mov_true, reg; movn reg, #0x0001, lsl #48; .endmacro | 301 | |.macro mov_true, reg; movn reg, #0x0001, lsl #48; .endmacro |
302 | |.macro mov_nil, reg; mov reg, TISNIL; .endmacro | ||
303 | |.macro cmp_nil, reg; cmp reg, TISNIL; .endmacro | ||
304 | |.macro add_TISNUM, dst, src; add dst, src, TISNUM; .endmacro | ||
296 | | | 305 | | |
297 | #define GL_J(field) (GG_G2J + (int)offsetof(jit_State, field)) | 306 | #define GL_J(field) (GG_G2J + (int)offsetof(jit_State, field)) |
298 | | | 307 | | |
@@ -445,9 +454,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
445 | | add fp, CARG1, # SAVE_FP_LR_ | 454 | | add fp, CARG1, # SAVE_FP_LR_ |
446 | | mov sp, CARG1 | 455 | | mov sp, CARG1 |
447 | | ldr L, SAVE_L | 456 | | ldr L, SAVE_L |
448 | | movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48 | 457 | | init_constants |
449 | | movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16 | ||
450 | | movn TISNIL, #0 | ||
451 | | ldr GL, L->glref // Setup pointer to global state. | 458 | | ldr GL, L->glref // Setup pointer to global state. |
452 | |->vm_unwind_ff_eh: // Landing pad for external unwinder. | 459 | |->vm_unwind_ff_eh: // Landing pad for external unwinder. |
453 | | mov RC, #16 // 2 results: false + error message. | 460 | | mov RC, #16 // 2 results: false + error message. |
@@ -512,11 +519,9 @@ static void build_subroutines(BuildCtx *ctx) | |||
512 | | str L, GL->cur_L | 519 | | str L, GL->cur_L |
513 | | mov RA, BASE | 520 | | mov RA, BASE |
514 | | ldp BASE, CARG1, L->base | 521 | | ldp BASE, CARG1, L->base |
515 | | movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48 | 522 | | init_constants |
516 | | movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16 | ||
517 | | ldr PC, [BASE, FRAME_PC] | 523 | | ldr PC, [BASE, FRAME_PC] |
518 | | strb wzr, L->status | 524 | | strb wzr, L->status |
519 | | movn TISNIL, #0 | ||
520 | | sub RC, CARG1, BASE | 525 | | sub RC, CARG1, BASE |
521 | | ands CARG1, PC, #FRAME_TYPE | 526 | | ands CARG1, PC, #FRAME_TYPE |
522 | | add RC, RC, #8 | 527 | | add RC, RC, #8 |
@@ -552,10 +557,8 @@ static void build_subroutines(BuildCtx *ctx) | |||
552 | |3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype). | 557 | |3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype). |
553 | | str L, GL->cur_L | 558 | | str L, GL->cur_L |
554 | | ldp RB, CARG1, L->base // RB = old base (for vmeta_call). | 559 | | ldp RB, CARG1, L->base // RB = old base (for vmeta_call). |
555 | | movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48 | ||
556 | | movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16 | ||
557 | | add PC, PC, BASE | 560 | | add PC, PC, BASE |
558 | | movn TISNIL, #0 | 561 | | init_constants |
559 | | sub PC, PC, RB // PC = frame delta + frame type | 562 | | sub PC, PC, RB // PC = frame delta + frame type |
560 | | sub NARGS8:RC, CARG1, BASE | 563 | | sub NARGS8:RC, CARG1, BASE |
561 | | st_vmstate ST_INTERP | 564 | | st_vmstate ST_INTERP |
@@ -664,7 +667,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
664 | | b >1 | 667 | | b >1 |
665 | | | 668 | | |
666 | |->vmeta_tgetb: // RB = table, RC = index | 669 | |->vmeta_tgetb: // RB = table, RC = index |
667 | | add RC, RC, TISNUM | 670 | | add_TISNUM RC, RC |
668 | | add CARG2, BASE, RB, lsl #3 | 671 | | add CARG2, BASE, RB, lsl #3 |
669 | | add CARG3, sp, TMPDofs | 672 | | add CARG3, sp, TMPDofs |
670 | | str RC, TMPD | 673 | | str RC, TMPD |
@@ -699,7 +702,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
699 | | sxtw CARG2, TMP1w | 702 | | sxtw CARG2, TMP1w |
700 | | bl extern lj_tab_getinth // (GCtab *t, int32_t key) | 703 | | bl extern lj_tab_getinth // (GCtab *t, int32_t key) |
701 | | // Returns cTValue * or NULL. | 704 | | // Returns cTValue * or NULL. |
702 | | mov TMP0, TISNIL | 705 | | mov_nil TMP0 |
703 | | cbz CRET1, ->BC_TGETR_Z | 706 | | cbz CRET1, ->BC_TGETR_Z |
704 | | ldr TMP0, [CRET1] | 707 | | ldr TMP0, [CRET1] |
705 | | b ->BC_TGETR_Z | 708 | | b ->BC_TGETR_Z |
@@ -722,7 +725,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
722 | | b >1 | 725 | | b >1 |
723 | | | 726 | | |
724 | |->vmeta_tsetb: // RB = table, RC = index | 727 | |->vmeta_tsetb: // RB = table, RC = index |
725 | | add RC, RC, TISNUM | 728 | | add_TISNUM RC, RC |
726 | | add CARG2, BASE, RB, lsl #3 | 729 | | add CARG2, BASE, RB, lsl #3 |
727 | | add CARG3, sp, TMPDofs | 730 | | add CARG3, sp, TMPDofs |
728 | | str RC, TMPD | 731 | | str RC, TMPD |
@@ -1036,7 +1039,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1036 | |1: // Field metatable must be at same offset for GCtab and GCudata! | 1039 | |1: // Field metatable must be at same offset for GCtab and GCudata! |
1037 | | ldr TAB:RB, TAB:CARG1->metatable | 1040 | | ldr TAB:RB, TAB:CARG1->metatable |
1038 | |2: | 1041 | |2: |
1039 | | mov CARG1, TISNIL | 1042 | | mov_nil CARG1 |
1040 | | ldr STR:RC, GL->gcroot[GCROOT_MMNAME+MM_metatable] | 1043 | | ldr STR:RC, GL->gcroot[GCROOT_MMNAME+MM_metatable] |
1041 | | cbz TAB:RB, ->fff_restv | 1044 | | cbz TAB:RB, ->fff_restv |
1042 | | ldr TMP1w, TAB:RB->hmask | 1045 | | ldr TMP1w, TAB:RB->hmask |
@@ -1058,7 +1061,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1058 | | movk CARG1, #(LJ_TTAB>>1)&0xffff, lsl #48 | 1061 | | movk CARG1, #(LJ_TTAB>>1)&0xffff, lsl #48 |
1059 | | b ->fff_restv | 1062 | | b ->fff_restv |
1060 | |5: | 1063 | |5: |
1061 | | cmp TMP0, TISNIL | 1064 | | cmp_nil TMP0 |
1062 | | bne ->fff_restv | 1065 | | bne ->fff_restv |
1063 | | b <4 | 1066 | | b <4 |
1064 | | | 1067 | | |
@@ -1158,8 +1161,8 @@ static void build_subroutines(BuildCtx *ctx) | |||
1158 | | cbnz TAB:CARG2, ->fff_fallback | 1161 | | cbnz TAB:CARG2, ->fff_fallback |
1159 | #endif | 1162 | #endif |
1160 | | mov RC, #(3+1)*8 | 1163 | | mov RC, #(3+1)*8 |
1161 | | stp CARG1, TISNIL, [BASE, #-8] | 1164 | | stp CFUNC:CARG4, CARG1, [BASE, #-16] |
1162 | | str CFUNC:CARG4, [BASE, #-16] | 1165 | | str TISNIL, [BASE] |
1163 | | b ->fff_res | 1166 | | b ->fff_res |
1164 | | | 1167 | | |
1165 | |.ffunc_2 ipairs_aux | 1168 | |.ffunc_2 ipairs_aux |
@@ -1171,14 +1174,14 @@ static void build_subroutines(BuildCtx *ctx) | |||
1171 | | add CARG2w, CARG2w, #1 | 1174 | | add CARG2w, CARG2w, #1 |
1172 | | cmp CARG2w, TMP1w | 1175 | | cmp CARG2w, TMP1w |
1173 | | ldr PC, [BASE, FRAME_PC] | 1176 | | ldr PC, [BASE, FRAME_PC] |
1174 | | add TMP2, CARG2, TISNUM | 1177 | | add_TISNUM TMP2, CARG2 |
1175 | | mov RC, #(0+1)*8 | 1178 | | mov RC, #(0+1)*8 |
1176 | | str TMP2, [BASE, #-16] | 1179 | | str TMP2, [BASE, #-16] |
1177 | | bhs >2 // Not in array part? | 1180 | | bhs >2 // Not in array part? |
1178 | | ldr TMP0, [CARG3, CARG2, lsl #3] | 1181 | | ldr TMP0, [CARG3, CARG2, lsl #3] |
1179 | |1: | 1182 | |1: |
1180 | | mov TMP1, #(2+1)*8 | 1183 | | mov TMP1, #(2+1)*8 |
1181 | | cmp TMP0, TISNIL | 1184 | | cmp_nil TMP0 |
1182 | | str TMP0, [BASE, #-8] | 1185 | | str TMP0, [BASE, #-8] |
1183 | | csel RC, RC, TMP1, eq | 1186 | | csel RC, RC, TMP1, eq |
1184 | | b ->fff_res | 1187 | | b ->fff_res |
@@ -1201,8 +1204,8 @@ static void build_subroutines(BuildCtx *ctx) | |||
1201 | | cbnz TAB:CARG2, ->fff_fallback | 1204 | | cbnz TAB:CARG2, ->fff_fallback |
1202 | #endif | 1205 | #endif |
1203 | | mov RC, #(3+1)*8 | 1206 | | mov RC, #(3+1)*8 |
1204 | | stp CARG1, TISNUM, [BASE, #-8] | 1207 | | stp CFUNC:CARG4, CARG1, [BASE, #-16] |
1205 | | str CFUNC:CARG4, [BASE, #-16] | 1208 | | str TISNUM, [BASE] |
1206 | | b ->fff_res | 1209 | | b ->fff_res |
1207 | | | 1210 | | |
1208 | |//-- Base library: catch errors ---------------------------------------- | 1211 | |//-- Base library: catch errors ---------------------------------------- |
@@ -1392,7 +1395,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1392 | | eor CARG2w, CARG1w, CARG1w, asr #31 | 1395 | | eor CARG2w, CARG1w, CARG1w, asr #31 |
1393 | | movz CARG3, #0x41e0, lsl #48 // 2^31. | 1396 | | movz CARG3, #0x41e0, lsl #48 // 2^31. |
1394 | | subs CARG1w, CARG2w, CARG1w, asr #31 | 1397 | | subs CARG1w, CARG2w, CARG1w, asr #31 |
1395 | | add CARG1, CARG1, TISNUM | 1398 | | add_TISNUM CARG1, CARG1 |
1396 | | csel CARG1, CARG1, CARG3, pl | 1399 | | csel CARG1, CARG1, CARG3, pl |
1397 | | // Fallthrough. | 1400 | | // Fallthrough. |
1398 | | | 1401 | | |
@@ -1483,7 +1486,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1483 | | ldr PC, [BASE, FRAME_PC] | 1486 | | ldr PC, [BASE, FRAME_PC] |
1484 | | str d0, [BASE, #-16] | 1487 | | str d0, [BASE, #-16] |
1485 | | mov RC, #(2+1)*8 | 1488 | | mov RC, #(2+1)*8 |
1486 | | add CARG2, CARG2, TISNUM | 1489 | | add_TISNUM CARG2, CARG2 |
1487 | | str CARG2, [BASE, #-8] | 1490 | | str CARG2, [BASE, #-8] |
1488 | | b ->fff_res | 1491 | | b ->fff_res |
1489 | | | 1492 | | |
@@ -1549,7 +1552,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1549 | | bne ->fff_fallback | 1552 | | bne ->fff_fallback |
1550 | | ldrb TMP0w, STR:CARG1[1] // Access is always ok (NUL at end). | 1553 | | ldrb TMP0w, STR:CARG1[1] // Access is always ok (NUL at end). |
1551 | | ldr CARG3w, STR:CARG1->len | 1554 | | ldr CARG3w, STR:CARG1->len |
1552 | | add TMP0, TMP0, TISNUM | 1555 | | add_TISNUM TMP0, TMP0 |
1553 | | str TMP0, [BASE, #-16] | 1556 | | str TMP0, [BASE, #-16] |
1554 | | mov RC, #(0+1)*8 | 1557 | | mov RC, #(0+1)*8 |
1555 | | cbz CARG3, ->fff_res | 1558 | | cbz CARG3, ->fff_res |
@@ -1695,17 +1698,17 @@ static void build_subroutines(BuildCtx *ctx) | |||
1695 | |.ffunc_bit tobit | 1698 | |.ffunc_bit tobit |
1696 | | mov TMP0w, CARG1w | 1699 | | mov TMP0w, CARG1w |
1697 | |9: // Label reused by .ffunc_bit_op users. | 1700 | |9: // Label reused by .ffunc_bit_op users. |
1698 | | add CARG1, TMP0, TISNUM | 1701 | | add_TISNUM CARG1, TMP0 |
1699 | | b ->fff_restv | 1702 | | b ->fff_restv |
1700 | | | 1703 | | |
1701 | |.ffunc_bit bswap | 1704 | |.ffunc_bit bswap |
1702 | | rev TMP0w, CARG1w | 1705 | | rev TMP0w, CARG1w |
1703 | | add CARG1, TMP0, TISNUM | 1706 | | add_TISNUM CARG1, TMP0 |
1704 | | b ->fff_restv | 1707 | | b ->fff_restv |
1705 | | | 1708 | | |
1706 | |.ffunc_bit bnot | 1709 | |.ffunc_bit bnot |
1707 | | mvn TMP0w, CARG1w | 1710 | | mvn TMP0w, CARG1w |
1708 | | add CARG1, TMP0, TISNUM | 1711 | | add_TISNUM CARG1, TMP0 |
1709 | | b ->fff_restv | 1712 | | b ->fff_restv |
1710 | | | 1713 | | |
1711 | |.macro .ffunc_bit_sh, name, ins, shmod | 1714 | |.macro .ffunc_bit_sh, name, ins, shmod |
@@ -1726,7 +1729,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1726 | | checkint CARG1, ->vm_tobit_fb | 1729 | | checkint CARG1, ->vm_tobit_fb |
1727 | |2: | 1730 | |2: |
1728 | | ins TMP0w, CARG1w, TMP1w | 1731 | | ins TMP0w, CARG1w, TMP1w |
1729 | | add CARG1, TMP0, TISNUM | 1732 | | add_TISNUM CARG1, TMP0 |
1730 | | b ->fff_restv | 1733 | | b ->fff_restv |
1731 | |.endmacro | 1734 | |.endmacro |
1732 | | | 1735 | | |
@@ -1915,8 +1918,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1915 | | and CARG3, CARG3, #LJ_GCVMASK | 1918 | | and CARG3, CARG3, #LJ_GCVMASK |
1916 | | beq >2 | 1919 | | beq >2 |
1917 | |1: // Move results down. | 1920 | |1: // Move results down. |
1918 | | ldr CARG1, [RA] | 1921 | | ldr CARG1, [RA], #8 |
1919 | | add RA, RA, #8 | ||
1920 | | subs RB, RB, #8 | 1922 | | subs RB, RB, #8 |
1921 | | str CARG1, [BASE, RC, lsl #3] | 1923 | | str CARG1, [BASE, RC, lsl #3] |
1922 | | add RC, RC, #1 | 1924 | | add RC, RC, #1 |
@@ -2031,9 +2033,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2031 | |.if JIT | 2033 | |.if JIT |
2032 | | ldr L, SAVE_L | 2034 | | ldr L, SAVE_L |
2033 | |1: | 2035 | |1: |
2034 | | movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48 | 2036 | | init_constants |
2035 | | movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16 | ||
2036 | | movn TISNIL, #0 | ||
2037 | | cmn CARG1w, #LUA_ERRERR | 2037 | | cmn CARG1w, #LUA_ERRERR |
2038 | | bhs >9 // Check for error from exit. | 2038 | | bhs >9 // Check for error from exit. |
2039 | | ldr LFUNC:CARG2, [BASE, FRAME_FUNC] | 2039 | | ldr LFUNC:CARG2, [BASE, FRAME_FUNC] |
@@ -2212,9 +2212,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2212 | | bl extern lj_ccallback_enter // (CTState *cts, void *cf) | 2212 | | bl extern lj_ccallback_enter // (CTState *cts, void *cf) |
2213 | | // Returns lua_State *. | 2213 | | // Returns lua_State *. |
2214 | | ldp BASE, RC, L:CRET1->base | 2214 | | ldp BASE, RC, L:CRET1->base |
2215 | | movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48 | 2215 | | init_constants |
2216 | | movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16 | ||
2217 | | movn TISNIL, #0 | ||
2218 | | mov L, CRET1 | 2216 | | mov L, CRET1 |
2219 | | ldr LFUNC:CARG3, [BASE, FRAME_FUNC] | 2217 | | ldr LFUNC:CARG3, [BASE, FRAME_FUNC] |
2220 | | sub RC, RC, BASE | 2218 | | sub RC, RC, BASE |
@@ -2593,7 +2591,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2593 | | bne >5 | 2591 | | bne >5 |
2594 | | negs TMP0w, TMP0w | 2592 | | negs TMP0w, TMP0w |
2595 | | movz CARG3, #0x41e0, lsl #48 // 2^31. | 2593 | | movz CARG3, #0x41e0, lsl #48 // 2^31. |
2596 | | add TMP0, TMP0, TISNUM | 2594 | | add_TISNUM TMP0, TMP0 |
2597 | | csel TMP0, TMP0, CARG3, vc | 2595 | | csel TMP0, TMP0, CARG3, vc |
2598 | |5: | 2596 | |5: |
2599 | | str TMP0, [BASE, RA, lsl #3] | 2597 | | str TMP0, [BASE, RA, lsl #3] |
@@ -2608,7 +2606,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2608 | | bne >2 | 2606 | | bne >2 |
2609 | | ldr CARG1w, STR:CARG1->len | 2607 | | ldr CARG1w, STR:CARG1->len |
2610 | |1: | 2608 | |1: |
2611 | | add CARG1, CARG1, TISNUM | 2609 | | add_TISNUM CARG1, CARG1 |
2612 | | str CARG1, [BASE, RA, lsl #3] | 2610 | | str CARG1, [BASE, RA, lsl #3] |
2613 | | ins_next | 2611 | | ins_next |
2614 | | | 2612 | | |
@@ -2716,7 +2714,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2716 | | intins CARG1w, CARG1w, CARG2w | 2714 | | intins CARG1w, CARG1w, CARG2w |
2717 | | ins_arithfallback bvs | 2715 | | ins_arithfallback bvs |
2718 | |.endif | 2716 | |.endif |
2719 | | add CARG1, CARG1, TISNUM | 2717 | | add_TISNUM CARG1, CARG1 |
2720 | | str CARG1, [BASE, RA, lsl #3] | 2718 | | str CARG1, [BASE, RA, lsl #3] |
2721 | |4: | 2719 | |4: |
2722 | | ins_next | 2720 | | ins_next |
@@ -2809,7 +2807,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2809 | case BC_KSHORT: | 2807 | case BC_KSHORT: |
2810 | | // RA = dst, RC = int16_literal | 2808 | | // RA = dst, RC = int16_literal |
2811 | | sxth RCw, RCw | 2809 | | sxth RCw, RCw |
2812 | | add TMP0, RC, TISNUM | 2810 | | add_TISNUM TMP0, RC |
2813 | | str TMP0, [BASE, RA, lsl #3] | 2811 | | str TMP0, [BASE, RA, lsl #3] |
2814 | | ins_next | 2812 | | ins_next |
2815 | break; | 2813 | break; |
@@ -3032,7 +3030,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3032 | | cmp TMP1w, CARG1w // In array part? | 3030 | | cmp TMP1w, CARG1w // In array part? |
3033 | | bhs ->vmeta_tgetv | 3031 | | bhs ->vmeta_tgetv |
3034 | | ldr TMP0, [CARG3] | 3032 | | ldr TMP0, [CARG3] |
3035 | | cmp TMP0, TISNIL | 3033 | | cmp_nil TMP0 |
3036 | | beq >5 | 3034 | | beq >5 |
3037 | |1: | 3035 | |1: |
3038 | | str TMP0, [BASE, RA, lsl #3] | 3036 | | str TMP0, [BASE, RA, lsl #3] |
@@ -3075,7 +3073,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3075 | | ldr NODE:CARG3, NODE:CARG3->next | 3073 | | ldr NODE:CARG3, NODE:CARG3->next |
3076 | | cmp CARG1, CARG4 | 3074 | | cmp CARG1, CARG4 |
3077 | | bne >4 | 3075 | | bne >4 |
3078 | | cmp TMP0, TISNIL | 3076 | | cmp_nil TMP0 |
3079 | | beq >5 | 3077 | | beq >5 |
3080 | |3: | 3078 | |3: |
3081 | | str TMP0, [BASE, RA, lsl #3] | 3079 | | str TMP0, [BASE, RA, lsl #3] |
@@ -3084,7 +3082,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3084 | |4: // Follow hash chain. | 3082 | |4: // Follow hash chain. |
3085 | | cbnz NODE:CARG3, <1 | 3083 | | cbnz NODE:CARG3, <1 |
3086 | | // End of hash chain: key not found, nil result. | 3084 | | // End of hash chain: key not found, nil result. |
3087 | | mov TMP0, TISNIL | 3085 | | mov_nil TMP0 |
3088 | | | 3086 | | |
3089 | |5: // Check for __index if table value is nil. | 3087 | |5: // Check for __index if table value is nil. |
3090 | | ldr TAB:CARG1, TAB:CARG2->metatable | 3088 | | ldr TAB:CARG1, TAB:CARG2->metatable |
@@ -3105,7 +3103,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3105 | | cmp RCw, CARG1w // In array part? | 3103 | | cmp RCw, CARG1w // In array part? |
3106 | | bhs ->vmeta_tgetb | 3104 | | bhs ->vmeta_tgetb |
3107 | | ldr TMP0, [CARG3] | 3105 | | ldr TMP0, [CARG3] |
3108 | | cmp TMP0, TISNIL | 3106 | | cmp_nil TMP0 |
3109 | | beq >5 | 3107 | | beq >5 |
3110 | |1: | 3108 | |1: |
3111 | | str TMP0, [BASE, RA, lsl #3] | 3109 | | str TMP0, [BASE, RA, lsl #3] |
@@ -3152,7 +3150,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3152 | | ldr TMP1, [CARG3] | 3150 | | ldr TMP1, [CARG3] |
3153 | | ldr TMP0, [BASE, RA, lsl #3] | 3151 | | ldr TMP0, [BASE, RA, lsl #3] |
3154 | | ldrb TMP2w, TAB:CARG2->marked | 3152 | | ldrb TMP2w, TAB:CARG2->marked |
3155 | | cmp TMP1, TISNIL // Previous value is nil? | 3153 | | cmp_nil TMP1 // Previous value is nil? |
3156 | | beq >5 | 3154 | | beq >5 |
3157 | |1: | 3155 | |1: |
3158 | | str TMP0, [CARG3] | 3156 | | str TMP0, [CARG3] |
@@ -3204,7 +3202,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3204 | | cmp CARG1, CARG4 | 3202 | | cmp CARG1, CARG4 |
3205 | | bne >5 | 3203 | | bne >5 |
3206 | | ldr TMP0, [BASE, RA, lsl #3] | 3204 | | ldr TMP0, [BASE, RA, lsl #3] |
3207 | | cmp TMP1, TISNIL // Previous value is nil? | 3205 | | cmp_nil TMP1 // Previous value is nil? |
3208 | | beq >4 | 3206 | | beq >4 |
3209 | |2: | 3207 | |2: |
3210 | | str TMP0, NODE:CARG3->val | 3208 | | str TMP0, NODE:CARG3->val |
@@ -3263,7 +3261,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3263 | | ldr TMP1, [CARG3] | 3261 | | ldr TMP1, [CARG3] |
3264 | | ldr TMP0, [BASE, RA, lsl #3] | 3262 | | ldr TMP0, [BASE, RA, lsl #3] |
3265 | | ldrb TMP2w, TAB:CARG2->marked | 3263 | | ldrb TMP2w, TAB:CARG2->marked |
3266 | | cmp TMP1, TISNIL // Previous value is nil? | 3264 | | cmp_nil TMP1 // Previous value is nil? |
3267 | | beq >5 | 3265 | | beq >5 |
3268 | |1: | 3266 | |1: |
3269 | | str TMP0, [CARG3] | 3267 | | str TMP0, [CARG3] |
@@ -3362,9 +3360,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3362 | |->BC_CALL_Z: | 3360 | |->BC_CALL_Z: |
3363 | | mov RB, BASE // Save old BASE for vmeta_call. | 3361 | | mov RB, BASE // Save old BASE for vmeta_call. |
3364 | | add BASE, BASE, RA, lsl #3 | 3362 | | add BASE, BASE, RA, lsl #3 |
3365 | | ldr CARG3, [BASE] | 3363 | | ldr CARG3, [BASE], #16 |
3366 | | sub NARGS8:RC, NARGS8:RC, #8 | 3364 | | sub NARGS8:RC, NARGS8:RC, #8 |
3367 | | add BASE, BASE, #16 | ||
3368 | | checkfunc CARG3, ->vmeta_call | 3365 | | checkfunc CARG3, ->vmeta_call |
3369 | | ins_call | 3366 | | ins_call |
3370 | break; | 3367 | break; |
@@ -3380,9 +3377,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3380 | | // RA = base, (RB = 0,) RC = (nargs+1)*8 | 3377 | | // RA = base, (RB = 0,) RC = (nargs+1)*8 |
3381 | |->BC_CALLT1_Z: | 3378 | |->BC_CALLT1_Z: |
3382 | | add RA, BASE, RA, lsl #3 | 3379 | | add RA, BASE, RA, lsl #3 |
3383 | | ldr TMP1, [RA] | 3380 | | ldr TMP1, [RA], #16 |
3384 | | sub NARGS8:RC, NARGS8:RC, #8 | 3381 | | sub NARGS8:RC, NARGS8:RC, #8 |
3385 | | add RA, RA, #16 | ||
3386 | | checktp CARG3, TMP1, LJ_TFUNC, ->vmeta_callt | 3382 | | checktp CARG3, TMP1, LJ_TFUNC, ->vmeta_callt |
3387 | | ldr PC, [BASE, FRAME_PC] | 3383 | | ldr PC, [BASE, FRAME_PC] |
3388 | |->BC_CALLT2_Z: | 3384 | |->BC_CALLT2_Z: |
@@ -3462,10 +3458,10 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3462 | | add CARG3, CARG2, CARG1, lsl #3 | 3458 | | add CARG3, CARG2, CARG1, lsl #3 |
3463 | | bhs >5 // Index points after array part? | 3459 | | bhs >5 // Index points after array part? |
3464 | | ldr TMP0, [CARG3] | 3460 | | ldr TMP0, [CARG3] |
3465 | | cmp TMP0, TISNIL | 3461 | | cmp_nil TMP0 |
3466 | | cinc CARG1, CARG1, eq // Skip holes in array part. | 3462 | | cinc CARG1, CARG1, eq // Skip holes in array part. |
3467 | | beq <1 | 3463 | | beq <1 |
3468 | | add CARG1, CARG1, TISNUM | 3464 | | add_TISNUM CARG1, CARG1 |
3469 | | stp CARG1, TMP0, [RA] | 3465 | | stp CARG1, TMP0, [RA] |
3470 | | add CARG1, CARG1, #1 | 3466 | | add CARG1, CARG1, #1 |
3471 | |3: | 3467 | |3: |
@@ -3483,7 +3479,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3483 | | add NODE:CARG3, NODE:RB, CARG1, lsl #3 // node = tab->node + idx*3*8 | 3479 | | add NODE:CARG3, NODE:RB, CARG1, lsl #3 // node = tab->node + idx*3*8 |
3484 | | bhi <4 | 3480 | | bhi <4 |
3485 | | ldp TMP0, CARG1, NODE:CARG3->val | 3481 | | ldp TMP0, CARG1, NODE:CARG3->val |
3486 | | cmp TMP0, TISNIL | 3482 | | cmp_nil TMP0 |
3487 | | add RC, RC, #1 | 3483 | | add RC, RC, #1 |
3488 | | beq <6 // Skip holes in hash part. | 3484 | | beq <6 // Skip holes in hash part. |
3489 | | stp CARG1, TMP0, [RA] | 3485 | | stp CARG1, TMP0, [RA] |
@@ -3501,8 +3497,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3501 | | checkfunc CFUNC:CARG1, >5 | 3497 | | checkfunc CFUNC:CARG1, >5 |
3502 | | asr TMP0, TAB:CARG3, #47 | 3498 | | asr TMP0, TAB:CARG3, #47 |
3503 | | ldrb TMP1w, CFUNC:CARG1->ffid | 3499 | | ldrb TMP1w, CFUNC:CARG1->ffid |
3504 | | cmn TMP0, #-LJ_TTAB | 3500 | | cmp_nil CARG4 |
3505 | | ccmp CARG4, TISNIL, #0, eq | 3501 | | ccmn TMP0, #-LJ_TTAB, #0, eq |
3506 | | ccmp TMP1w, #FF_next_N, #0, eq | 3502 | | ccmp TMP1w, #FF_next_N, #0, eq |
3507 | | bne >5 | 3503 | | bne >5 |
3508 | | mov TMP0w, #0xfffe7fff // LJ_KEYINDEX | 3504 | | mov TMP0w, #0xfffe7fff // LJ_KEYINDEX |
@@ -3542,51 +3538,51 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3542 | | and RC, RC, #255 | 3538 | | and RC, RC, #255 |
3543 | | // RA = base, RB = (nresults+1), RC = numparams | 3539 | | // RA = base, RB = (nresults+1), RC = numparams |
3544 | | ldr TMP1, [BASE, FRAME_PC] | 3540 | | ldr TMP1, [BASE, FRAME_PC] |
3545 | | add RC, BASE, RC, lsl #3 | 3541 | | add TMP0, BASE, RC, lsl #3 |
3546 | | add RA, BASE, RA, lsl #3 | 3542 | | add RC, BASE, RA, lsl #3 // RC = destination |
3547 | | add RC, RC, #FRAME_VARG | 3543 | | add TMP0, TMP0, #FRAME_VARG |
3548 | | add TMP2, RA, RB, lsl #3 | 3544 | | add TMP2, RC, RB, lsl #3 |
3549 | | sub RC, RC, TMP1 // RC = vbase | 3545 | | sub RA, TMP0, TMP1 // RA = vbase |
3550 | | // Note: RC may now be even _above_ BASE if nargs was < numparams. | 3546 | | // Note: RA may now be even _above_ BASE if nargs was < numparams. |
3551 | | sub TMP3, BASE, #16 // TMP3 = vtop | 3547 | | sub TMP3, BASE, #16 // TMP3 = vtop |
3552 | | cbz RB, >5 | 3548 | | cbz RB, >5 |
3553 | | sub TMP2, TMP2, #16 | 3549 | | sub TMP2, TMP2, #16 |
3554 | |1: // Copy vararg slots to destination slots. | 3550 | |1: // Copy vararg slots to destination slots. |
3555 | | cmp RC, TMP3 | 3551 | | cmp RA, TMP3 |
3556 | | ldr TMP0, [RC], #8 | 3552 | | ldr TMP0, [RA], #8 |
3557 | | csel TMP0, TMP0, TISNIL, lo | 3553 | | csinv TMP0, TMP0, xzr, lo // TISNIL = ~xzr |
3558 | | cmp RA, TMP2 | 3554 | | cmp RC, TMP2 |
3559 | | str TMP0, [RA], #8 | 3555 | | str TMP0, [RC], #8 |
3560 | | blo <1 | 3556 | | blo <1 |
3561 | |2: | 3557 | |2: |
3562 | | ins_next | 3558 | | ins_next |
3563 | | | 3559 | | |
3564 | |5: // Copy all varargs. | 3560 | |5: // Copy all varargs. |
3565 | | ldr TMP0, L->maxstack | 3561 | | ldr TMP0, L->maxstack |
3566 | | subs TMP2, TMP3, RC | 3562 | | subs TMP2, TMP3, RA |
3567 | | csel RB, xzr, TMP2, le // MULTRES = (max(vtop-vbase,0)+1)*8 | 3563 | | csel RB, xzr, TMP2, le // MULTRES = (max(vtop-vbase,0)+1)*8 |
3568 | | add RB, RB, #8 | 3564 | | add RB, RB, #8 |
3569 | | add TMP1, RA, TMP2 | 3565 | | add TMP1, RC, TMP2 |
3570 | | str RBw, SAVE_MULTRES | 3566 | | str RBw, SAVE_MULTRES |
3571 | | ble <2 // Nothing to copy. | 3567 | | ble <2 // Nothing to copy. |
3572 | | cmp TMP1, TMP0 | 3568 | | cmp TMP1, TMP0 |
3573 | | bhi >7 | 3569 | | bhi >7 |
3574 | |6: | 3570 | |6: |
3575 | | ldr TMP0, [RC], #8 | 3571 | | ldr TMP0, [RA], #8 |
3576 | | str TMP0, [RA], #8 | 3572 | | str TMP0, [RC], #8 |
3577 | | cmp RC, TMP3 | 3573 | | cmp RA, TMP3 |
3578 | | blo <6 | 3574 | | blo <6 |
3579 | | b <2 | 3575 | | b <2 |
3580 | | | 3576 | | |
3581 | |7: // Grow stack for varargs. | 3577 | |7: // Grow stack for varargs. |
3582 | | lsr CARG2, TMP2, #3 | 3578 | | lsr CARG2, TMP2, #3 |
3583 | | stp BASE, RA, L->base | 3579 | | stp BASE, RC, L->base |
3584 | | mov CARG1, L | 3580 | | mov CARG1, L |
3585 | | sub RC, RC, BASE // Need delta, because BASE may change. | 3581 | | sub RA, RA, BASE // Need delta, because BASE may change. |
3586 | | str PC, SAVE_PC | 3582 | | str PC, SAVE_PC |
3587 | | bl extern lj_state_growstack // (lua_State *L, int n) | 3583 | | bl extern lj_state_growstack // (lua_State *L, int n) |
3588 | | ldp BASE, RA, L->base | 3584 | | ldp BASE, RC, L->base |
3589 | | add RC, BASE, RC | 3585 | | add RA, BASE, RA |
3590 | | sub TMP3, BASE, #16 | 3586 | | sub TMP3, BASE, #16 |
3591 | | b <6 | 3587 | | b <6 |
3592 | break; | 3588 | break; |
@@ -3730,7 +3726,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3730 | } else { | 3726 | } else { |
3731 | | adds CARG1w, CARG1w, CARG3w | 3727 | | adds CARG1w, CARG1w, CARG3w |
3732 | | bvs >2 | 3728 | | bvs >2 |
3733 | | add TMP0, CARG1, TISNUM | 3729 | | add_TISNUM TMP0, CARG1 |
3734 | | tbnz CARG3w, #31, >4 | 3730 | | tbnz CARG3w, #31, >4 |
3735 | | cmp CARG1w, CARG2w | 3731 | | cmp CARG1w, CARG2w |
3736 | } | 3732 | } |
@@ -3809,7 +3805,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3809 | | // RA = base, RC = target | 3805 | | // RA = base, RC = target |
3810 | | ldr CARG1, [BASE, RA, lsl #3] | 3806 | | ldr CARG1, [BASE, RA, lsl #3] |
3811 | | add TMP1, BASE, RA, lsl #3 | 3807 | | add TMP1, BASE, RA, lsl #3 |
3812 | | cmp CARG1, TISNIL | 3808 | | cmp_nil CARG1 |
3813 | | beq >1 // Stop if iterator returned nil. | 3809 | | beq >1 // Stop if iterator returned nil. |
3814 | if (op == BC_JITERL) { | 3810 | if (op == BC_JITERL) { |
3815 | | str CARG1, [TMP1, #-8] | 3811 | | str CARG1, [TMP1, #-8] |