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author | Mike Pall <mike> | 2011-10-22 02:02:51 +0200 |
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committer | Mike Pall <mike> | 2011-10-22 02:02:51 +0200 |
commit | fee957b22d063bab22b1b71221088a5d5d745e7d (patch) | |
tree | 18fd4363f3bffafbf29f943473ce8363f7b40cc3 /src/lj_asm_arm.h | |
parent | 2e5c0870bcde0fee3cb8fd31de27d30beaa9617e (diff) | |
download | luajit-fee957b22d063bab22b1b71221088a5d5d745e7d.tar.gz luajit-fee957b22d063bab22b1b71221088a5d5d745e7d.tar.bz2 luajit-fee957b22d063bab22b1b71221088a5d5d745e7d.zip |
FFI: Cleanup/fix 64 bit arithmetic in assembler backend.
Diffstat (limited to 'src/lj_asm_arm.h')
-rw-r--r-- | src/lj_asm_arm.h | 46 |
1 files changed, 19 insertions, 27 deletions
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h index 20c5d40a..27f1d6c1 100644 --- a/src/lj_asm_arm.h +++ b/src/lj_asm_arm.h | |||
@@ -932,12 +932,18 @@ static void asm_cnew(ASMState *as, IRIns *ir) | |||
932 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_mem_newgco]; | 932 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_mem_newgco]; |
933 | IRRef args[2]; | 933 | IRRef args[2]; |
934 | RegSet allow = (RSET_GPR & ~RSET_SCRATCH); | 934 | RegSet allow = (RSET_GPR & ~RSET_SCRATCH); |
935 | RegSet drop = RSET_SCRATCH; | ||
935 | lua_assert(sz != CTSIZE_INVALID); | 936 | lua_assert(sz != CTSIZE_INVALID); |
936 | 937 | ||
937 | args[0] = ASMREF_L; /* lua_State *L */ | 938 | args[0] = ASMREF_L; /* lua_State *L */ |
938 | args[1] = ASMREF_TMP1; /* MSize size */ | 939 | args[1] = ASMREF_TMP1; /* MSize size */ |
939 | as->gcsteps++; | 940 | as->gcsteps++; |
940 | asm_setupresult(as, ir, ci); /* GCcdata * */ | 941 | |
942 | if (ra_hasreg(ir->r)) | ||
943 | rset_clear(drop, ir->r); /* Dest reg handled below. */ | ||
944 | ra_evictset(as, drop); | ||
945 | if (ra_used(ir)) | ||
946 | ra_destreg(as, ir, RID_RET); /* GCcdata * */ | ||
941 | 947 | ||
942 | /* Initialize immutable cdata object. */ | 948 | /* Initialize immutable cdata object. */ |
943 | if (ir->o == IR_CNEWI) { | 949 | if (ir->o == IR_CNEWI) { |
@@ -1360,42 +1366,28 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1360 | asm_fpcomp(as, ir-1); | 1366 | asm_fpcomp(as, ir-1); |
1361 | return; | 1367 | return; |
1362 | } else if ((ir-1)->o == IR_MIN || (ir-1)->o == IR_MAX) { | 1368 | } else if ((ir-1)->o == IR_MIN || (ir-1)->o == IR_MAX) { |
1363 | if (uselo || usehi || !(as->flags & JIT_F_OPT_DCE)) { | 1369 | as->curins--; /* Always skip the loword min/max. */ |
1364 | as->curins--; /* Always skip the loword min/max. */ | 1370 | if (uselo || usehi) |
1365 | asm_fpmin_max(as, ir-1, (ir-1)->o == IR_MIN ? CC_HI : CC_LO); | 1371 | asm_fpmin_max(as, ir-1, (ir-1)->o == IR_MIN ? CC_HI : CC_LO); |
1366 | } | ||
1367 | return; | 1372 | return; |
1368 | } | 1373 | } |
1369 | if (!usehi && (as->flags & JIT_F_OPT_DCE)) | 1374 | if (!usehi) return; /* Skip unused hiword op for all remaining ops. */ |
1370 | return; /* Skip unused hiword op for all remaining ops. */ | ||
1371 | switch ((ir-1)->o) { | 1375 | switch ((ir-1)->o) { |
1372 | #if LJ_HASFFI | 1376 | #if LJ_HASFFI |
1373 | case IR_ADD: | 1377 | case IR_ADD: |
1374 | if (uselo) { | 1378 | as->curins--; |
1375 | as->curins--; | 1379 | asm_intop(as, ir, ARMI_ADC); |
1376 | asm_intop(as, ir, ARMI_ADC); | 1380 | asm_intop(as, ir-1, ARMI_ADD|ARMI_S); |
1377 | asm_intop(as, ir-1, ARMI_ADD|ARMI_S); | ||
1378 | } else { | ||
1379 | asm_intop(as, ir, ARMI_ADD); | ||
1380 | } | ||
1381 | break; | 1381 | break; |
1382 | case IR_SUB: | 1382 | case IR_SUB: |
1383 | if (uselo) { | 1383 | as->curins--; |
1384 | as->curins--; | 1384 | asm_intop(as, ir, ARMI_SBC); |
1385 | asm_intop(as, ir, ARMI_SBC); | 1385 | asm_intop(as, ir-1, ARMI_SUB|ARMI_S); |
1386 | asm_intop(as, ir-1, ARMI_SUB|ARMI_S); | ||
1387 | } else { | ||
1388 | asm_intop(as, ir, ARMI_SUB); | ||
1389 | } | ||
1390 | break; | 1386 | break; |
1391 | case IR_NEG: | 1387 | case IR_NEG: |
1392 | if (uselo) { | 1388 | as->curins--; |
1393 | as->curins--; | 1389 | asm_intneg(as, ir, ARMI_RSC); |
1394 | asm_intneg(as, ir, ARMI_RSC); | 1390 | asm_intneg(as, ir-1, ARMI_RSB|ARMI_S); |
1395 | asm_intneg(as, ir-1, ARMI_RSB|ARMI_S); | ||
1396 | } else { | ||
1397 | asm_intneg(as, ir, ARMI_RSB); | ||
1398 | } | ||
1399 | break; | 1391 | break; |
1400 | #endif | 1392 | #endif |
1401 | case IR_SLOAD: case IR_ALOAD: case IR_HLOAD: case IR_ULOAD: case IR_VLOAD: | 1393 | case IR_SLOAD: case IR_ALOAD: case IR_HLOAD: case IR_ULOAD: case IR_VLOAD: |