summaryrefslogtreecommitdiff
path: root/src/lj_asm_arm.h
diff options
context:
space:
mode:
authorMike Pall <mike>2014-02-20 15:09:02 +0100
committerMike Pall <mike>2014-02-20 15:09:02 +0100
commit2863b1095699404693a50082dd8d19b6c4cad99f (patch)
tree4c4626f4b8a342773fdd961f46eb39dc43616e5e /src/lj_asm_arm.h
parent46ce03464b67935fb84ace1d0710a7f3cc62e132 (diff)
parent998651fcdafc8b6f3d922e1e60864fec83409118 (diff)
downloadluajit-2863b1095699404693a50082dd8d19b6c4cad99f.tar.gz
luajit-2863b1095699404693a50082dd8d19b6c4cad99f.tar.bz2
luajit-2863b1095699404693a50082dd8d19b6c4cad99f.zip
Merge branch 'master' into v2.1
Diffstat (limited to 'src/lj_asm_arm.h')
-rw-r--r--src/lj_asm_arm.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h
index 420f0ed2..8339367b 100644
--- a/src/lj_asm_arm.h
+++ b/src/lj_asm_arm.h
@@ -484,6 +484,7 @@ static void asm_retf(ASMState *as, IRIns *ir)
484 int32_t delta = 1+bc_a(*((const BCIns *)pc - 1)); 484 int32_t delta = 1+bc_a(*((const BCIns *)pc - 1));
485 as->topslot -= (BCReg)delta; 485 as->topslot -= (BCReg)delta;
486 if ((int32_t)as->topslot < 0) as->topslot = 0; 486 if ((int32_t)as->topslot < 0) as->topslot = 0;
487 irt_setmark(IR(REF_BASE)->t); /* Children must not coalesce with BASE reg. */
487 /* Need to force a spill on REF_BASE now to update the stack slot. */ 488 /* Need to force a spill on REF_BASE now to update the stack slot. */
488 emit_lso(as, ARMI_STR, base, RID_SP, ra_spill(as, IR(REF_BASE))); 489 emit_lso(as, ARMI_STR, base, RID_SP, ra_spill(as, IR(REF_BASE)));
489 emit_setgl(as, base, jit_base); 490 emit_setgl(as, base, jit_base);
@@ -2088,7 +2089,8 @@ static void asm_head_root_base(ASMState *as)
2088 IRIns *ir; 2089 IRIns *ir;
2089 asm_head_lreg(as); 2090 asm_head_lreg(as);
2090 ir = IR(REF_BASE); 2091 ir = IR(REF_BASE);
2091 if (ra_hasreg(ir->r) && rset_test(as->modset, ir->r)) ra_spill(as, ir); 2092 if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t)))
2093 ra_spill(as, ir);
2092 ra_destreg(as, ir, RID_BASE); 2094 ra_destreg(as, ir, RID_BASE);
2093} 2095}
2094 2096
@@ -2098,7 +2100,8 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
2098 IRIns *ir; 2100 IRIns *ir;
2099 asm_head_lreg(as); 2101 asm_head_lreg(as);
2100 ir = IR(REF_BASE); 2102 ir = IR(REF_BASE);
2101 if (ra_hasreg(ir->r) && rset_test(as->modset, ir->r)) ra_spill(as, ir); 2103 if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t)))
2104 ra_spill(as, ir);
2102 if (ra_hasspill(irp->s)) { 2105 if (ra_hasspill(irp->s)) {
2103 rset_clear(allow, ra_dest(as, ir, allow)); 2106 rset_clear(allow, ra_dest(as, ir, allow));
2104 } else { 2107 } else {