diff options
Diffstat (limited to 'src/buildvm_ppc.dasc')
-rw-r--r-- | src/buildvm_ppc.dasc | 114 |
1 files changed, 43 insertions, 71 deletions
diff --git a/src/buildvm_ppc.dasc b/src/buildvm_ppc.dasc index 4e316883..2964e0e2 100644 --- a/src/buildvm_ppc.dasc +++ b/src/buildvm_ppc.dasc | |||
@@ -10,10 +10,6 @@ | |||
10 | |.globalnames globnames | 10 | |.globalnames globnames |
11 | |.externnames extnames | 11 | |.externnames extnames |
12 | | | 12 | | |
13 | |.if not SPE | ||
14 | |.error "No support for plain PowerPC CPUs (yet)" | ||
15 | |.endif | ||
16 | | | ||
17 | |// Note: The ragged indentation of the instructions is intentional. | 13 | |// Note: The ragged indentation of the instructions is intentional. |
18 | |// The starting columns indicate data dependencies. | 14 | |// The starting columns indicate data dependencies. |
19 | | | 15 | | |
@@ -32,14 +28,12 @@ | |||
32 | | | 28 | | |
33 | |// Constants for vectorized type-comparisons (hi+low GPR). C callee-save. | 29 | |// Constants for vectorized type-comparisons (hi+low GPR). C callee-save. |
34 | |.define TISNUM, r22 | 30 | |.define TISNUM, r22 |
35 | |.if SPE | 31 | |.define TISNIL, r23 |
36 | |.define TISSTR, r23 | 32 | |.define ZERO, r24 |
37 | |.define TISTAB, r24 | 33 | |.define TISSTR, r25 // NYI: remove. |
38 | |.define TISFUNC, r25 | 34 | |.define TISTAB, r26 // NYI: remove. |
39 | |.define TISNIL, r26 | 35 | |.define TISFUNC, r27 // NYI: remove. |
40 | |.define TOBIT, r27 | 36 | |.define TOBIT, r28 // NYI: use FP reg. |
41 | |.define ZERO, TOBIT // Zero in lo word. | ||
42 | |.endif | ||
43 | | | 37 | | |
44 | |// The following temporaries are not saved across C calls, except for RA. | 38 | |// The following temporaries are not saved across C calls, except for RA. |
45 | |.define RA, r20 // Callee-save. | 39 | |.define RA, r20 // Callee-save. |
@@ -63,32 +57,19 @@ | |||
63 | |.define CARG4, r6 // Overlaps TMP3. | 57 | |.define CARG4, r6 // Overlaps TMP3. |
64 | |.define CARG5, r7 // Overlaps INS. | 58 | |.define CARG5, r7 // Overlaps INS. |
65 | | | 59 | | |
60 | |.define CARGF1, f1 | ||
61 | |.define CARGF2, f2 | ||
62 | | | ||
66 | |.define CRET1, r3 | 63 | |.define CRET1, r3 |
67 | |.define CRET2, r4 | 64 | |.define CRET2, r4 |
68 | | | 65 | | |
69 | |// Stack layout while in interpreter. Must match with lj_frame.h. | 66 | |// Stack layout while in interpreter. Must match with lj_frame.h. |
70 | |.if SPE | 67 | |.define SAVE_LR, 260(sp) |
71 | |.define SAVE_LR, 180(sp) | 68 | |.define CFRAME_SPACE, 256 // Delta for sp. |
72 | |.define CFRAME_SPACE, 176 // Delta for sp. | 69 | |// Back chain for sp: 256(sp) <-- sp entering interpreter |
73 | |// Back chain for sp: 176(sp) <-- sp entering interpreter | 70 | |.define SAVE_GPR_, 184 // .. 184+18*4: 32 bit GPR saves. |
74 | |.define SAVE_r31, 168(sp) // 64 bit register saves. | 71 | |.define SAVE_FPR_, 40 // .. 40+18*8: 64 bit FPR saves. |
75 | |.define SAVE_r30, 160(sp) | 72 | |.define SAVE_UNUSED, 32(sp) // 8 unused bytes for alignment. |
76 | |.define SAVE_r29, 152(sp) | ||
77 | |.define SAVE_r28, 144(sp) | ||
78 | |.define SAVE_r27, 136(sp) | ||
79 | |.define SAVE_r26, 128(sp) | ||
80 | |.define SAVE_r25, 120(sp) | ||
81 | |.define SAVE_r24, 112(sp) | ||
82 | |.define SAVE_r23, 104(sp) | ||
83 | |.define SAVE_r22, 96(sp) | ||
84 | |.define SAVE_r21, 88(sp) | ||
85 | |.define SAVE_r20, 80(sp) | ||
86 | |.define SAVE_r19, 72(sp) | ||
87 | |.define SAVE_r18, 64(sp) | ||
88 | |.define SAVE_r17, 56(sp) | ||
89 | |.define SAVE_r16, 48(sp) | ||
90 | |.define SAVE_r15, 40(sp) | ||
91 | |.define SAVE_r14, 32(sp) | ||
92 | |.define SAVE_ERRF, 28(sp) // 32 bit C frame info. | 73 | |.define SAVE_ERRF, 28(sp) // 32 bit C frame info. |
93 | |.define SAVE_NRES, 24(sp) | 74 | |.define SAVE_NRES, 24(sp) |
94 | |.define SAVE_CFRAME, 20(sp) | 75 | |.define SAVE_CFRAME, 20(sp) |
@@ -98,25 +79,30 @@ | |||
98 | |// Next frame lr: 4(sp) | 79 | |// Next frame lr: 4(sp) |
99 | |// Back chain for sp: 0(sp) <-- sp while in interpreter | 80 | |// Back chain for sp: 0(sp) <-- sp while in interpreter |
100 | | | 81 | | |
101 | |.macro save_, reg; evstdd reg, SAVE_..reg; .endmacro | 82 | |.macro save_, reg |
102 | |.macro rest_, reg; evldd reg, SAVE_..reg; .endmacro | 83 | | stw r..reg, SAVE_GPR_+(reg-14)*4(sp) |
103 | |.endif | 84 | | stfd f..reg, SAVE_FPR_+(reg-14)*8(sp) |
85 | |.endmacro | ||
86 | |.macro rest_, reg | ||
87 | | lwz r..reg, SAVE_GPR_+(reg-14)*4(sp) | ||
88 | | lfd f..reg, SAVE_FPR_+(reg-14)*8(sp) | ||
89 | |.endmacro | ||
104 | | | 90 | | |
105 | |.macro saveregs | 91 | |.macro saveregs |
106 | | stwu sp, -CFRAME_SPACE(sp) | 92 | | stwu sp, -CFRAME_SPACE(sp) |
107 | | save_ r14; save_ r15; save_ r16; save_ r17; save_ r18; save_ r19 | 93 | | save_ 14; save_ 15; save_ 16; save_ 17; save_ 18; save_ 19 |
108 | | mflr r0 | 94 | | mflr r0 |
109 | | save_ r20; save_ r21; save_ r22; save_ r23; save_ r24; save_ r25 | 95 | | save_ 20; save_ 21; save_ 22; save_ 23; save_ 24; save_ 25 |
110 | | stw r0, SAVE_LR | 96 | | stw r0, SAVE_LR |
111 | | save_ r26; save_ r27; save_ r28; save_ r29; save_ r30; save_ r31 | 97 | | save_ 26; save_ 27; save_ 28; save_ 29; save_ 30; save_ 31 |
112 | |.endmacro | 98 | |.endmacro |
113 | | | 99 | | |
114 | |.macro restoreregs | 100 | |.macro restoreregs |
115 | | lwz r0, SAVE_LR | 101 | | lwz r0, SAVE_LR |
116 | | rest_ r14; rest_ r15; rest_ r16; rest_ r17; rest_ r18; rest_ r19 | 102 | | rest_ 14; rest_ 15; rest_ 16; rest_ 17; rest_ 18; rest_ 19 |
117 | | mtlr r0 | 103 | | mtlr r0 |
118 | | rest_ r20; rest_ r21; rest_ r22; rest_ r23; rest_ r24; rest_ r25 | 104 | | rest_ 20; rest_ 21; rest_ 22; rest_ 23; rest_ 24; rest_ 25 |
119 | | rest_ r26; rest_ r27; rest_ r28; rest_ r29; rest_ r30; rest_ r31 | 105 | | rest_ 26; rest_ 27; rest_ 28; rest_ 29; rest_ 30; rest_ 31 |
120 | | addi sp, sp, CFRAME_SPACE | 106 | | addi sp, sp, CFRAME_SPACE |
121 | |.endmacro | 107 | |.endmacro |
122 | | | 108 | | |
@@ -231,17 +217,15 @@ | |||
231 | |//----------------------------------------------------------------------- | 217 | |//----------------------------------------------------------------------- |
232 | | | 218 | | |
233 | |// Macros to test operand types. | 219 | |// Macros to test operand types. |
234 | |.if SPE | 220 | |.macro checknum, reg; cmplw reg, TISNUM; .endmacro |
235 | |.macro checknum, reg; evcmpltu reg, TISNUM; .endmacro | 221 | |.macro checkstr, reg; cmpwi reg, LJ_TSTR; .endmacro |
236 | |.macro checkstr, reg; evcmpeq reg, TISSTR; .endmacro | 222 | |.macro checktab, reg; cmpwi reg, LJ_TTAB; .endmacro |
237 | |.macro checktab, reg; evcmpeq reg, TISTAB; .endmacro | 223 | |.macro checkfunc, reg; cmpwi reg, LJ_TFUNC; .endmacro |
238 | |.macro checkfunc, reg; evcmpeq reg, TISFUNC; .endmacro | 224 | |.macro checknil, reg; cmpwi reg, LJ_TNIL; .endmacro |
239 | |.macro checknil, reg; evcmpeq reg, TISNIL; .endmacro | 225 | |.macro checkok, label; beq label; .endmacro // NYI: remove. |
240 | |.macro checkok, label; blt label; .endmacro | 226 | |.macro checkfail, label; bne label; .endmacro // NYI: remove. |
241 | |.macro checkfail, label; bge label; .endmacro | 227 | |.macro checkanyfail, label; bns label; .endmacro // NYI: remove. |
242 | |.macro checkanyfail, label; bns label; .endmacro | 228 | |.macro checkallok, label; bso label; .endmacro // NYI: remove. |
243 | |.macro checkallok, label; bso label; .endmacro | ||
244 | |.endif | ||
245 | | | 229 | | |
246 | |.macro branch_RD | 230 | |.macro branch_RD |
247 | | srwi TMP0, RD, 1 | 231 | | srwi TMP0, RD, 1 |
@@ -1067,11 +1051,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1067 | | checknum CARG1 | 1051 | | checknum CARG1 |
1068 | | cmplwi cr1, TMP0, 0 | 1052 | | cmplwi cr1, TMP0, 0 |
1069 | | stw BASE, L->base // Add frame since C call can throw. | 1053 | | stw BASE, L->base // Add frame since C call can throw. |
1070 | |.if SPE | 1054 | | crand 4*cr0+eq, 4*cr0+eq, 4*cr1+eq |
1071 | | crand 4*cr0+eq, 4*cr0+lt, 4*cr1+eq | ||
1072 | |.else | ||
1073 | |.error "NYI" | ||
1074 | |.endif | ||
1075 | | stw PC, SAVE_PC // Redundant (but a defined value). | 1055 | | stw PC, SAVE_PC // Redundant (but a defined value). |
1076 | | bne ->fff_fallback | 1056 | | bne ->fff_fallback |
1077 | | ffgccheck | 1057 | | ffgccheck |
@@ -3672,14 +3652,10 @@ static void emit_asm_debug(BuildCtx *ctx) | |||
3672 | "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n", | 3652 | "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n", |
3673 | (int)ctx->codesz, CFRAME_SIZE); | 3653 | (int)ctx->codesz, CFRAME_SIZE); |
3674 | for (i = 14; i <= 31; i++) | 3654 | for (i = 14; i <= 31; i++) |
3675 | #if LJ_TARGET_PPCSPE | ||
3676 | fprintf(ctx->fp, | 3655 | fprintf(ctx->fp, |
3677 | "\t.byte %d\n\t.uleb128 %d\n" | 3656 | "\t.byte %d\n\t.uleb128 %d\n" |
3678 | "\t.byte 5\n\t.uleb128 %d\n\t.uleb128 %d\n", | 3657 | "\t.byte %d\n\t.uleb128 %d\n", |
3679 | 0x80+i, 1+2*(31-i), 1200+i, 2+2*(31-i)); | 3658 | 0x80+i, 37+(31-i), 0x80+32+i, 2+2*(31-i)); |
3680 | #else | ||
3681 | #error "missing frame info for saved registers" | ||
3682 | #endif | ||
3683 | fprintf(ctx->fp, | 3659 | fprintf(ctx->fp, |
3684 | "\t.align 2\n" | 3660 | "\t.align 2\n" |
3685 | ".LEFDE0:\n\n"); | 3661 | ".LEFDE0:\n\n"); |
@@ -3713,14 +3689,10 @@ static void emit_asm_debug(BuildCtx *ctx) | |||
3713 | "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n", | 3689 | "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n", |
3714 | (int)ctx->codesz, CFRAME_SIZE); | 3690 | (int)ctx->codesz, CFRAME_SIZE); |
3715 | for (i = 14; i <= 31; i++) | 3691 | for (i = 14; i <= 31; i++) |
3716 | #if LJ_TARGET_PPCSPE | ||
3717 | fprintf(ctx->fp, | 3692 | fprintf(ctx->fp, |
3718 | "\t.byte %d\n\t.uleb128 %d\n" | 3693 | "\t.byte %d\n\t.uleb128 %d\n" |
3719 | "\t.byte 5\n\t.uleb128 %d\n\t.uleb128 %d\n", | 3694 | "\t.byte %d\n\t.uleb128 %d\n", |
3720 | 0x80+i, 1+2*(31-i), 1200+i, 2+2*(31-i)); | 3695 | 0x80+i, 37+(31-i), 0x80+32+i, 2+2*(31-i)); |
3721 | #else | ||
3722 | #error "missing frame info for saved registers" | ||
3723 | #endif | ||
3724 | fprintf(ctx->fp, | 3696 | fprintf(ctx->fp, |
3725 | "\t.align 2\n" | 3697 | "\t.align 2\n" |
3726 | ".LEFDE1:\n\n"); | 3698 | ".LEFDE1:\n\n"); |