diff options
Diffstat (limited to 'src/lj_asm_mips.h')
-rw-r--r-- | src/lj_asm_mips.h | 43 |
1 files changed, 30 insertions, 13 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index b42f9f9a..def3eb2a 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h | |||
@@ -769,14 +769,18 @@ nolo: | |||
769 | 769 | ||
770 | static void asm_newref(ASMState *as, IRIns *ir) | 770 | static void asm_newref(ASMState *as, IRIns *ir) |
771 | { | 771 | { |
772 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; | 772 | if (ir->r == RID_SINK) { /* Sink newref. */ |
773 | IRRef args[3]; | 773 | return; |
774 | args[0] = ASMREF_L; /* lua_State *L */ | 774 | } else { |
775 | args[1] = ir->op1; /* GCtab *t */ | 775 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; |
776 | args[2] = ASMREF_TMP1; /* cTValue *key */ | 776 | IRRef args[3]; |
777 | asm_setupresult(as, ir, ci); /* TValue * */ | 777 | args[0] = ASMREF_L; /* lua_State *L */ |
778 | asm_gencall(as, ci, args); | 778 | args[1] = ir->op1; /* GCtab *t */ |
779 | asm_tvptr(as, ra_releasetmp(as, ASMREF_TMP1), ir->op2); | 779 | args[2] = ASMREF_TMP1; /* cTValue *key */ |
780 | asm_setupresult(as, ir, ci); /* TValue * */ | ||
781 | asm_gencall(as, ci, args); | ||
782 | asm_tvptr(as, ra_releasetmp(as, ASMREF_TMP1), ir->op2); | ||
783 | } | ||
780 | } | 784 | } |
781 | 785 | ||
782 | static void asm_uref(ASMState *as, IRIns *ir) | 786 | static void asm_uref(ASMState *as, IRIns *ir) |
@@ -912,9 +916,14 @@ static void asm_xload(ASMState *as, IRIns *ir) | |||
912 | 916 | ||
913 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) | 917 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) |
914 | { | 918 | { |
915 | Reg src = ra_alloc1z(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR); | 919 | if (ir->r == RID_SINK) { /* Sink store. */ |
916 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, | 920 | asm_snap_prep(as); |
917 | rset_exclude(RSET_GPR, src), ofs); | 921 | return; |
922 | } else { | ||
923 | Reg src = ra_alloc1z(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR); | ||
924 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, | ||
925 | rset_exclude(RSET_GPR, src), ofs); | ||
926 | } | ||
918 | } | 927 | } |
919 | 928 | ||
920 | static void asm_ahuvload(ASMState *as, IRIns *ir) | 929 | static void asm_ahuvload(ASMState *as, IRIns *ir) |
@@ -947,6 +956,10 @@ static void asm_ahustore(ASMState *as, IRIns *ir) | |||
947 | RegSet allow = RSET_GPR; | 956 | RegSet allow = RSET_GPR; |
948 | Reg idx, src = RID_NONE, type = RID_NONE; | 957 | Reg idx, src = RID_NONE, type = RID_NONE; |
949 | int32_t ofs = 0; | 958 | int32_t ofs = 0; |
959 | if (ir->r == RID_SINK) { /* Sink store. */ | ||
960 | asm_snap_prep(as); | ||
961 | return; | ||
962 | } | ||
950 | if (irt_isnum(ir->t)) { | 963 | if (irt_isnum(ir->t)) { |
951 | src = ra_alloc1(as, ir->op2, RSET_FPR); | 964 | src = ra_alloc1(as, ir->op2, RSET_FPR); |
952 | } else { | 965 | } else { |
@@ -1561,8 +1574,12 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1561 | return; | 1574 | return; |
1562 | } else if ((ir-1)->o == IR_XSTORE) { | 1575 | } else if ((ir-1)->o == IR_XSTORE) { |
1563 | as->curins--; /* Handle both stores here. */ | 1576 | as->curins--; /* Handle both stores here. */ |
1564 | asm_xstore(as, ir, LJ_LE ? 4 : 0); | 1577 | if ((ir-1)->r == RID_SINK) { |
1565 | asm_xstore(as, ir-1, LJ_LE ? 0 : 4); | 1578 | asm_snap_prep(as); |
1579 | } else { | ||
1580 | asm_xstore(as, ir, LJ_LE ? 4 : 0); | ||
1581 | asm_xstore(as, ir-1, LJ_LE ? 0 : 4); | ||
1582 | } | ||
1566 | return; | 1583 | return; |
1567 | } | 1584 | } |
1568 | if (!usehi) return; /* Skip unused hiword op for all remaining ops. */ | 1585 | if (!usehi) return; /* Skip unused hiword op for all remaining ops. */ |