diff options
Diffstat (limited to '')
-rw-r--r-- | src/lj_asm_ppc.h | 113 |
1 files changed, 67 insertions, 46 deletions
diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h index c15b89fe..498fdac3 100644 --- a/src/lj_asm_ppc.h +++ b/src/lj_asm_ppc.h | |||
@@ -181,7 +181,7 @@ static void asm_fusexref(ASMState *as, PPCIns pi, Reg rt, IRRef ref, | |||
181 | return; | 181 | return; |
182 | } | 182 | } |
183 | } else if (ir->o == IR_STRREF) { | 183 | } else if (ir->o == IR_STRREF) { |
184 | lua_assert(ofs == 0); | 184 | lj_assertA(ofs == 0, "bad usage"); |
185 | ofs = (int32_t)sizeof(GCstr); | 185 | ofs = (int32_t)sizeof(GCstr); |
186 | if (irref_isk(ir->op2)) { | 186 | if (irref_isk(ir->op2)) { |
187 | ofs += IR(ir->op2)->i; | 187 | ofs += IR(ir->op2)->i; |
@@ -268,7 +268,8 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args) | |||
268 | #if !LJ_SOFTFP | 268 | #if !LJ_SOFTFP |
269 | if (irt_isfp(ir->t)) { | 269 | if (irt_isfp(ir->t)) { |
270 | if (fpr <= REGARG_LASTFPR) { | 270 | if (fpr <= REGARG_LASTFPR) { |
271 | lua_assert(rset_test(as->freeset, fpr)); /* Already evicted. */ | 271 | lj_assertA(rset_test(as->freeset, fpr), |
272 | "reg %d not free", fpr); /* Already evicted. */ | ||
272 | ra_leftov(as, fpr, ref); | 273 | ra_leftov(as, fpr, ref); |
273 | fpr++; | 274 | fpr++; |
274 | } else { | 275 | } else { |
@@ -281,7 +282,8 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args) | |||
281 | #endif | 282 | #endif |
282 | { | 283 | { |
283 | if (gpr <= REGARG_LASTGPR) { | 284 | if (gpr <= REGARG_LASTGPR) { |
284 | lua_assert(rset_test(as->freeset, gpr)); /* Already evicted. */ | 285 | lj_assertA(rset_test(as->freeset, gpr), |
286 | "reg %d not free", gpr); /* Already evicted. */ | ||
285 | ra_leftov(as, gpr, ref); | 287 | ra_leftov(as, gpr, ref); |
286 | gpr++; | 288 | gpr++; |
287 | } else { | 289 | } else { |
@@ -319,7 +321,7 @@ static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci) | |||
319 | rset_clear(drop, (ir+1)->r); /* Dest reg handled below. */ | 321 | rset_clear(drop, (ir+1)->r); /* Dest reg handled below. */ |
320 | ra_evictset(as, drop); /* Evictions must be performed first. */ | 322 | ra_evictset(as, drop); /* Evictions must be performed first. */ |
321 | if (ra_used(ir)) { | 323 | if (ra_used(ir)) { |
322 | lua_assert(!irt_ispri(ir->t)); | 324 | lj_assertA(!irt_ispri(ir->t), "PRI dest"); |
323 | if (!LJ_SOFTFP && irt_isfp(ir->t)) { | 325 | if (!LJ_SOFTFP && irt_isfp(ir->t)) { |
324 | if ((ci->flags & CCI_CASTU64)) { | 326 | if ((ci->flags & CCI_CASTU64)) { |
325 | /* Use spill slot or temp slots. */ | 327 | /* Use spill slot or temp slots. */ |
@@ -431,14 +433,18 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
431 | int stfp = (st == IRT_NUM || st == IRT_FLOAT); | 433 | int stfp = (st == IRT_NUM || st == IRT_FLOAT); |
432 | #endif | 434 | #endif |
433 | IRRef lref = ir->op1; | 435 | IRRef lref = ir->op1; |
434 | lua_assert(!(irt_isint64(ir->t) || | 436 | /* 64 bit integer conversions are handled by SPLIT. */ |
435 | (st == IRT_I64 || st == IRT_U64))); /* Handled by SPLIT. */ | 437 | lj_assertA(!(irt_isint64(ir->t) || (st == IRT_I64 || st == IRT_U64)), |
438 | "IR %04d has unsplit 64 bit type", | ||
439 | (int)(ir - as->ir) - REF_BIAS); | ||
436 | #if LJ_SOFTFP | 440 | #if LJ_SOFTFP |
437 | /* FP conversions are handled by SPLIT. */ | 441 | /* FP conversions are handled by SPLIT. */ |
438 | lua_assert(!irt_isfp(ir->t) && !(st == IRT_NUM || st == IRT_FLOAT)); | 442 | lj_assertA(!irt_isfp(ir->t) && !(st == IRT_NUM || st == IRT_FLOAT), |
443 | "IR %04d has FP type", | ||
444 | (int)(ir - as->ir) - REF_BIAS); | ||
439 | /* Can't check for same types: SPLIT uses CONV int.int + BXOR for sfp NEG. */ | 445 | /* Can't check for same types: SPLIT uses CONV int.int + BXOR for sfp NEG. */ |
440 | #else | 446 | #else |
441 | lua_assert(irt_type(ir->t) != st); | 447 | lj_assertA(irt_type(ir->t) != st, "inconsistent types for CONV"); |
442 | if (irt_isfp(ir->t)) { | 448 | if (irt_isfp(ir->t)) { |
443 | Reg dest = ra_dest(as, ir, RSET_FPR); | 449 | Reg dest = ra_dest(as, ir, RSET_FPR); |
444 | if (stfp) { /* FP to FP conversion. */ | 450 | if (stfp) { /* FP to FP conversion. */ |
@@ -467,7 +473,8 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
467 | } else if (stfp) { /* FP to integer conversion. */ | 473 | } else if (stfp) { /* FP to integer conversion. */ |
468 | if (irt_isguard(ir->t)) { | 474 | if (irt_isguard(ir->t)) { |
469 | /* Checked conversions are only supported from number to int. */ | 475 | /* Checked conversions are only supported from number to int. */ |
470 | lua_assert(irt_isint(ir->t) && st == IRT_NUM); | 476 | lj_assertA(irt_isint(ir->t) && st == IRT_NUM, |
477 | "bad type for checked CONV"); | ||
471 | asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR)); | 478 | asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR)); |
472 | } else { | 479 | } else { |
473 | Reg dest = ra_dest(as, ir, RSET_GPR); | 480 | Reg dest = ra_dest(as, ir, RSET_GPR); |
@@ -503,7 +510,7 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
503 | Reg dest = ra_dest(as, ir, RSET_GPR); | 510 | Reg dest = ra_dest(as, ir, RSET_GPR); |
504 | if (st >= IRT_I8 && st <= IRT_U16) { /* Extend to 32 bit integer. */ | 511 | if (st >= IRT_I8 && st <= IRT_U16) { /* Extend to 32 bit integer. */ |
505 | Reg left = ra_alloc1(as, ir->op1, RSET_GPR); | 512 | Reg left = ra_alloc1(as, ir->op1, RSET_GPR); |
506 | lua_assert(irt_isint(ir->t) || irt_isu32(ir->t)); | 513 | lj_assertA(irt_isint(ir->t) || irt_isu32(ir->t), "bad type for CONV EXT"); |
507 | if ((ir->op2 & IRCONV_SEXT)) | 514 | if ((ir->op2 & IRCONV_SEXT)) |
508 | emit_as(as, st == IRT_I8 ? PPCI_EXTSB : PPCI_EXTSH, dest, left); | 515 | emit_as(as, st == IRT_I8 ? PPCI_EXTSB : PPCI_EXTSH, dest, left); |
509 | else | 516 | else |
@@ -699,7 +706,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge) | |||
699 | (((char *)as->mcp-(char *)l_loop) & 0xffffu); | 706 | (((char *)as->mcp-(char *)l_loop) & 0xffffu); |
700 | 707 | ||
701 | /* Load main position relative to tab->node into dest. */ | 708 | /* Load main position relative to tab->node into dest. */ |
702 | khash = isk ? ir_khash(irkey) : 1; | 709 | khash = isk ? ir_khash(as, irkey) : 1; |
703 | if (khash == 0) { | 710 | if (khash == 0) { |
704 | emit_tai(as, PPCI_LWZ, dest, tab, (int32_t)offsetof(GCtab, node)); | 711 | emit_tai(as, PPCI_LWZ, dest, tab, (int32_t)offsetof(GCtab, node)); |
705 | } else { | 712 | } else { |
@@ -754,7 +761,7 @@ static void asm_hrefk(ASMState *as, IRIns *ir) | |||
754 | Reg node = ra_alloc1(as, ir->op1, RSET_GPR); | 761 | Reg node = ra_alloc1(as, ir->op1, RSET_GPR); |
755 | Reg key = RID_NONE, type = RID_TMP, idx = node; | 762 | Reg key = RID_NONE, type = RID_TMP, idx = node; |
756 | RegSet allow = rset_exclude(RSET_GPR, node); | 763 | RegSet allow = rset_exclude(RSET_GPR, node); |
757 | lua_assert(ofs % sizeof(Node) == 0); | 764 | lj_assertA(ofs % sizeof(Node) == 0, "unaligned HREFK slot"); |
758 | if (ofs > 32736) { | 765 | if (ofs > 32736) { |
759 | idx = dest; | 766 | idx = dest; |
760 | rset_clear(allow, dest); | 767 | rset_clear(allow, dest); |
@@ -813,7 +820,7 @@ static void asm_uref(ASMState *as, IRIns *ir) | |||
813 | static void asm_fref(ASMState *as, IRIns *ir) | 820 | static void asm_fref(ASMState *as, IRIns *ir) |
814 | { | 821 | { |
815 | UNUSED(as); UNUSED(ir); | 822 | UNUSED(as); UNUSED(ir); |
816 | lua_assert(!ra_used(ir)); | 823 | lj_assertA(!ra_used(ir), "unfused FREF"); |
817 | } | 824 | } |
818 | 825 | ||
819 | static void asm_strref(ASMState *as, IRIns *ir) | 826 | static void asm_strref(ASMState *as, IRIns *ir) |
@@ -853,25 +860,27 @@ static void asm_strref(ASMState *as, IRIns *ir) | |||
853 | 860 | ||
854 | /* -- Loads and stores ---------------------------------------------------- */ | 861 | /* -- Loads and stores ---------------------------------------------------- */ |
855 | 862 | ||
856 | static PPCIns asm_fxloadins(IRIns *ir) | 863 | static PPCIns asm_fxloadins(ASMState *as, IRIns *ir) |
857 | { | 864 | { |
865 | UNUSED(as); | ||
858 | switch (irt_type(ir->t)) { | 866 | switch (irt_type(ir->t)) { |
859 | case IRT_I8: return PPCI_LBZ; /* Needs sign-extension. */ | 867 | case IRT_I8: return PPCI_LBZ; /* Needs sign-extension. */ |
860 | case IRT_U8: return PPCI_LBZ; | 868 | case IRT_U8: return PPCI_LBZ; |
861 | case IRT_I16: return PPCI_LHA; | 869 | case IRT_I16: return PPCI_LHA; |
862 | case IRT_U16: return PPCI_LHZ; | 870 | case IRT_U16: return PPCI_LHZ; |
863 | case IRT_NUM: lua_assert(!LJ_SOFTFP); return PPCI_LFD; | 871 | case IRT_NUM: lj_assertA(!LJ_SOFTFP, "unsplit FP op"); return PPCI_LFD; |
864 | case IRT_FLOAT: if (!LJ_SOFTFP) return PPCI_LFS; | 872 | case IRT_FLOAT: if (!LJ_SOFTFP) return PPCI_LFS; |
865 | default: return PPCI_LWZ; | 873 | default: return PPCI_LWZ; |
866 | } | 874 | } |
867 | } | 875 | } |
868 | 876 | ||
869 | static PPCIns asm_fxstoreins(IRIns *ir) | 877 | static PPCIns asm_fxstoreins(ASMState *as, IRIns *ir) |
870 | { | 878 | { |
879 | UNUSED(as); | ||
871 | switch (irt_type(ir->t)) { | 880 | switch (irt_type(ir->t)) { |
872 | case IRT_I8: case IRT_U8: return PPCI_STB; | 881 | case IRT_I8: case IRT_U8: return PPCI_STB; |
873 | case IRT_I16: case IRT_U16: return PPCI_STH; | 882 | case IRT_I16: case IRT_U16: return PPCI_STH; |
874 | case IRT_NUM: lua_assert(!LJ_SOFTFP); return PPCI_STFD; | 883 | case IRT_NUM: lj_assertA(!LJ_SOFTFP, "unsplit FP op"); return PPCI_STFD; |
875 | case IRT_FLOAT: if (!LJ_SOFTFP) return PPCI_STFS; | 884 | case IRT_FLOAT: if (!LJ_SOFTFP) return PPCI_STFS; |
876 | default: return PPCI_STW; | 885 | default: return PPCI_STW; |
877 | } | 886 | } |
@@ -880,10 +889,10 @@ static PPCIns asm_fxstoreins(IRIns *ir) | |||
880 | static void asm_fload(ASMState *as, IRIns *ir) | 889 | static void asm_fload(ASMState *as, IRIns *ir) |
881 | { | 890 | { |
882 | Reg dest = ra_dest(as, ir, RSET_GPR); | 891 | Reg dest = ra_dest(as, ir, RSET_GPR); |
883 | PPCIns pi = asm_fxloadins(ir); | 892 | PPCIns pi = asm_fxloadins(as, ir); |
884 | Reg idx; | 893 | Reg idx; |
885 | int32_t ofs; | 894 | int32_t ofs; |
886 | if (ir->op1 == REF_NIL) { | 895 | if (ir->op1 == REF_NIL) { /* FLOAD from GG_State with offset. */ |
887 | idx = RID_JGL; | 896 | idx = RID_JGL; |
888 | ofs = (ir->op2 << 2) - 32768; | 897 | ofs = (ir->op2 << 2) - 32768; |
889 | } else { | 898 | } else { |
@@ -897,7 +906,7 @@ static void asm_fload(ASMState *as, IRIns *ir) | |||
897 | } | 906 | } |
898 | ofs = field_ofs[ir->op2]; | 907 | ofs = field_ofs[ir->op2]; |
899 | } | 908 | } |
900 | lua_assert(!irt_isi8(ir->t)); | 909 | lj_assertA(!irt_isi8(ir->t), "unsupported FLOAD I8"); |
901 | emit_tai(as, pi, dest, idx, ofs); | 910 | emit_tai(as, pi, dest, idx, ofs); |
902 | } | 911 | } |
903 | 912 | ||
@@ -908,7 +917,7 @@ static void asm_fstore(ASMState *as, IRIns *ir) | |||
908 | IRIns *irf = IR(ir->op1); | 917 | IRIns *irf = IR(ir->op1); |
909 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); | 918 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); |
910 | int32_t ofs = field_ofs[irf->op2]; | 919 | int32_t ofs = field_ofs[irf->op2]; |
911 | PPCIns pi = asm_fxstoreins(ir); | 920 | PPCIns pi = asm_fxstoreins(as, ir); |
912 | emit_tai(as, pi, src, idx, ofs); | 921 | emit_tai(as, pi, src, idx, ofs); |
913 | } | 922 | } |
914 | } | 923 | } |
@@ -917,10 +926,10 @@ static void asm_xload(ASMState *as, IRIns *ir) | |||
917 | { | 926 | { |
918 | Reg dest = ra_dest(as, ir, | 927 | Reg dest = ra_dest(as, ir, |
919 | (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR); | 928 | (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR); |
920 | lua_assert(!(ir->op2 & IRXLOAD_UNALIGNED)); | 929 | lj_assertA(!(ir->op2 & IRXLOAD_UNALIGNED), "unaligned XLOAD"); |
921 | if (irt_isi8(ir->t)) | 930 | if (irt_isi8(ir->t)) |
922 | emit_as(as, PPCI_EXTSB, dest, dest); | 931 | emit_as(as, PPCI_EXTSB, dest, dest); |
923 | asm_fusexref(as, asm_fxloadins(ir), dest, ir->op1, RSET_GPR, 0); | 932 | asm_fusexref(as, asm_fxloadins(as, ir), dest, ir->op1, RSET_GPR, 0); |
924 | } | 933 | } |
925 | 934 | ||
926 | static void asm_xstore_(ASMState *as, IRIns *ir, int32_t ofs) | 935 | static void asm_xstore_(ASMState *as, IRIns *ir, int32_t ofs) |
@@ -936,7 +945,7 @@ static void asm_xstore_(ASMState *as, IRIns *ir, int32_t ofs) | |||
936 | } else { | 945 | } else { |
937 | Reg src = ra_alloc1(as, ir->op2, | 946 | Reg src = ra_alloc1(as, ir->op2, |
938 | (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR); | 947 | (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR); |
939 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, | 948 | asm_fusexref(as, asm_fxstoreins(as, ir), src, ir->op1, |
940 | rset_exclude(RSET_GPR, src), ofs); | 949 | rset_exclude(RSET_GPR, src), ofs); |
941 | } | 950 | } |
942 | } | 951 | } |
@@ -958,8 +967,9 @@ static void asm_ahuvload(ASMState *as, IRIns *ir) | |||
958 | ofs = 0; | 967 | ofs = 0; |
959 | } | 968 | } |
960 | if (ra_used(ir)) { | 969 | if (ra_used(ir)) { |
961 | lua_assert((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) || | 970 | lj_assertA((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) || |
962 | irt_isint(ir->t) || irt_isaddr(ir->t)); | 971 | irt_isint(ir->t) || irt_isaddr(ir->t), |
972 | "bad load type %d", irt_type(ir->t)); | ||
963 | if (LJ_SOFTFP || !irt_isnum(t)) ofs = 0; | 973 | if (LJ_SOFTFP || !irt_isnum(t)) ofs = 0; |
964 | dest = ra_dest(as, ir, (!LJ_SOFTFP && irt_isnum(t)) ? RSET_FPR : allow); | 974 | dest = ra_dest(as, ir, (!LJ_SOFTFP && irt_isnum(t)) ? RSET_FPR : allow); |
965 | rset_clear(allow, dest); | 975 | rset_clear(allow, dest); |
@@ -1042,12 +1052,16 @@ static void asm_sload(ASMState *as, IRIns *ir) | |||
1042 | int hiop = (LJ_SOFTFP && (ir+1)->o == IR_HIOP); | 1052 | int hiop = (LJ_SOFTFP && (ir+1)->o == IR_HIOP); |
1043 | if (hiop) | 1053 | if (hiop) |
1044 | t.irt = IRT_NUM; | 1054 | t.irt = IRT_NUM; |
1045 | lua_assert(!(ir->op2 & IRSLOAD_PARENT)); /* Handled by asm_head_side(). */ | 1055 | lj_assertA(!(ir->op2 & IRSLOAD_PARENT), |
1046 | lua_assert(irt_isguard(ir->t) || !(ir->op2 & IRSLOAD_TYPECHECK)); | 1056 | "bad parent SLOAD"); /* Handled by asm_head_side(). */ |
1047 | lua_assert(LJ_DUALNUM || | 1057 | lj_assertA(irt_isguard(ir->t) || !(ir->op2 & IRSLOAD_TYPECHECK), |
1048 | !irt_isint(t) || (ir->op2 & (IRSLOAD_CONVERT|IRSLOAD_FRAME))); | 1058 | "inconsistent SLOAD variant"); |
1059 | lj_assertA(LJ_DUALNUM || | ||
1060 | !irt_isint(t) || (ir->op2 & (IRSLOAD_CONVERT|IRSLOAD_FRAME)), | ||
1061 | "bad SLOAD type"); | ||
1049 | #if LJ_SOFTFP | 1062 | #if LJ_SOFTFP |
1050 | lua_assert(!(ir->op2 & IRSLOAD_CONVERT)); /* Handled by LJ_SOFTFP SPLIT. */ | 1063 | lj_assertA(!(ir->op2 & IRSLOAD_CONVERT), |
1064 | "unsplit SLOAD convert"); /* Handled by LJ_SOFTFP SPLIT. */ | ||
1051 | if (hiop && ra_used(ir+1)) { | 1065 | if (hiop && ra_used(ir+1)) { |
1052 | type = ra_dest(as, ir+1, allow); | 1066 | type = ra_dest(as, ir+1, allow); |
1053 | rset_clear(allow, type); | 1067 | rset_clear(allow, type); |
@@ -1060,7 +1074,8 @@ static void asm_sload(ASMState *as, IRIns *ir) | |||
1060 | } else | 1074 | } else |
1061 | #endif | 1075 | #endif |
1062 | if (ra_used(ir)) { | 1076 | if (ra_used(ir)) { |
1063 | lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t)); | 1077 | lj_assertA(irt_isnum(t) || irt_isint(t) || irt_isaddr(t), |
1078 | "bad SLOAD type %d", irt_type(ir->t)); | ||
1064 | dest = ra_dest(as, ir, (!LJ_SOFTFP && irt_isnum(t)) ? RSET_FPR : allow); | 1079 | dest = ra_dest(as, ir, (!LJ_SOFTFP && irt_isnum(t)) ? RSET_FPR : allow); |
1065 | rset_clear(allow, dest); | 1080 | rset_clear(allow, dest); |
1066 | base = ra_alloc1(as, REF_BASE, allow); | 1081 | base = ra_alloc1(as, REF_BASE, allow); |
@@ -1127,7 +1142,8 @@ static void asm_cnew(ASMState *as, IRIns *ir) | |||
1127 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_mem_newgco]; | 1142 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_mem_newgco]; |
1128 | IRRef args[4]; | 1143 | IRRef args[4]; |
1129 | RegSet drop = RSET_SCRATCH; | 1144 | RegSet drop = RSET_SCRATCH; |
1130 | lua_assert(sz != CTSIZE_INVALID || (ir->o == IR_CNEW && ir->op2 != REF_NIL)); | 1145 | lj_assertA(sz != CTSIZE_INVALID || (ir->o == IR_CNEW && ir->op2 != REF_NIL), |
1146 | "bad CNEW/CNEWI operands"); | ||
1131 | 1147 | ||
1132 | as->gcsteps++; | 1148 | as->gcsteps++; |
1133 | if (ra_hasreg(ir->r)) | 1149 | if (ra_hasreg(ir->r)) |
@@ -1140,10 +1156,10 @@ static void asm_cnew(ASMState *as, IRIns *ir) | |||
1140 | if (ir->o == IR_CNEWI) { | 1156 | if (ir->o == IR_CNEWI) { |
1141 | RegSet allow = (RSET_GPR & ~RSET_SCRATCH); | 1157 | RegSet allow = (RSET_GPR & ~RSET_SCRATCH); |
1142 | int32_t ofs = sizeof(GCcdata); | 1158 | int32_t ofs = sizeof(GCcdata); |
1143 | lua_assert(sz == 4 || sz == 8); | 1159 | lj_assertA(sz == 4 || sz == 8, "bad CNEWI size %d", sz); |
1144 | if (sz == 8) { | 1160 | if (sz == 8) { |
1145 | ofs += 4; | 1161 | ofs += 4; |
1146 | lua_assert((ir+1)->o == IR_HIOP); | 1162 | lj_assertA((ir+1)->o == IR_HIOP, "expected HIOP for CNEWI"); |
1147 | } | 1163 | } |
1148 | for (;;) { | 1164 | for (;;) { |
1149 | Reg r = ra_alloc1(as, ir->op2, allow); | 1165 | Reg r = ra_alloc1(as, ir->op2, allow); |
@@ -1187,7 +1203,7 @@ static void asm_tbar(ASMState *as, IRIns *ir) | |||
1187 | emit_tai(as, PPCI_STW, link, tab, (int32_t)offsetof(GCtab, gclist)); | 1203 | emit_tai(as, PPCI_STW, link, tab, (int32_t)offsetof(GCtab, gclist)); |
1188 | emit_tai(as, PPCI_STB, mark, tab, (int32_t)offsetof(GCtab, marked)); | 1204 | emit_tai(as, PPCI_STB, mark, tab, (int32_t)offsetof(GCtab, marked)); |
1189 | emit_setgl(as, tab, gc.grayagain); | 1205 | emit_setgl(as, tab, gc.grayagain); |
1190 | lua_assert(LJ_GC_BLACK == 0x04); | 1206 | lj_assertA(LJ_GC_BLACK == 0x04, "bad LJ_GC_BLACK"); |
1191 | emit_rot(as, PPCI_RLWINM, mark, mark, 0, 30, 28); /* Clear black bit. */ | 1207 | emit_rot(as, PPCI_RLWINM, mark, mark, 0, 30, 28); /* Clear black bit. */ |
1192 | emit_getgl(as, link, gc.grayagain); | 1208 | emit_getgl(as, link, gc.grayagain); |
1193 | emit_condbranch(as, PPCI_BC|PPCF_Y, CC_EQ, l_end); | 1209 | emit_condbranch(as, PPCI_BC|PPCF_Y, CC_EQ, l_end); |
@@ -1202,7 +1218,7 @@ static void asm_obar(ASMState *as, IRIns *ir) | |||
1202 | MCLabel l_end; | 1218 | MCLabel l_end; |
1203 | Reg obj, val, tmp; | 1219 | Reg obj, val, tmp; |
1204 | /* No need for other object barriers (yet). */ | 1220 | /* No need for other object barriers (yet). */ |
1205 | lua_assert(IR(ir->op1)->o == IR_UREFC); | 1221 | lj_assertA(IR(ir->op1)->o == IR_UREFC, "bad OBAR type"); |
1206 | ra_evictset(as, RSET_SCRATCH); | 1222 | ra_evictset(as, RSET_SCRATCH); |
1207 | l_end = emit_label(as); | 1223 | l_end = emit_label(as); |
1208 | args[0] = ASMREF_TMP1; /* global_State *g */ | 1224 | args[0] = ASMREF_TMP1; /* global_State *g */ |
@@ -1673,7 +1689,7 @@ static void asm_bitshift(ASMState *as, IRIns *ir, PPCIns pi, PPCIns pik) | |||
1673 | #define asm_brol(as, ir) \ | 1689 | #define asm_brol(as, ir) \ |
1674 | asm_bitshift(as, ir, PPCI_RLWNM|PPCF_MB(0)|PPCF_ME(31), \ | 1690 | asm_bitshift(as, ir, PPCI_RLWNM|PPCF_MB(0)|PPCF_ME(31), \ |
1675 | PPCI_RLWINM|PPCF_MB(0)|PPCF_ME(31)) | 1691 | PPCI_RLWINM|PPCF_MB(0)|PPCF_ME(31)) |
1676 | #define asm_bror(as, ir) lua_assert(0) | 1692 | #define asm_bror(as, ir) lj_assertA(0, "unexpected BROR") |
1677 | 1693 | ||
1678 | #if LJ_SOFTFP | 1694 | #if LJ_SOFTFP |
1679 | static void asm_sfpmin_max(ASMState *as, IRIns *ir) | 1695 | static void asm_sfpmin_max(ASMState *as, IRIns *ir) |
@@ -1947,10 +1963,11 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1947 | case IR_CNEWI: | 1963 | case IR_CNEWI: |
1948 | /* Nothing to do here. Handled by lo op itself. */ | 1964 | /* Nothing to do here. Handled by lo op itself. */ |
1949 | break; | 1965 | break; |
1950 | default: lua_assert(0); break; | 1966 | default: lj_assertA(0, "bad HIOP for op %d", (ir-1)->o); break; |
1951 | } | 1967 | } |
1952 | #else | 1968 | #else |
1953 | UNUSED(as); UNUSED(ir); lua_assert(0); /* Unused without FFI. */ | 1969 | /* Unused without SOFTFP or FFI. */ |
1970 | UNUSED(as); UNUSED(ir); lj_assertA(0, "unexpected HIOP"); | ||
1954 | #endif | 1971 | #endif |
1955 | } | 1972 | } |
1956 | 1973 | ||
@@ -2010,7 +2027,8 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap) | |||
2010 | #if LJ_SOFTFP | 2027 | #if LJ_SOFTFP |
2011 | Reg tmp; | 2028 | Reg tmp; |
2012 | RegSet allow = rset_exclude(RSET_GPR, RID_BASE); | 2029 | RegSet allow = rset_exclude(RSET_GPR, RID_BASE); |
2013 | lua_assert(irref_isk(ref)); /* LJ_SOFTFP: must be a number constant. */ | 2030 | /* LJ_SOFTFP: must be a number constant. */ |
2031 | lj_assertA(irref_isk(ref), "unsplit FP op"); | ||
2014 | tmp = ra_allock(as, (int32_t)ir_knum(ir)->u32.lo, allow); | 2032 | tmp = ra_allock(as, (int32_t)ir_knum(ir)->u32.lo, allow); |
2015 | emit_tai(as, PPCI_STW, tmp, RID_BASE, ofs+(LJ_BE?4:0)); | 2033 | emit_tai(as, PPCI_STW, tmp, RID_BASE, ofs+(LJ_BE?4:0)); |
2016 | if (rset_test(as->freeset, tmp+1)) allow = RID2RSET(tmp+1); | 2034 | if (rset_test(as->freeset, tmp+1)) allow = RID2RSET(tmp+1); |
@@ -2023,7 +2041,8 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap) | |||
2023 | } else { | 2041 | } else { |
2024 | Reg type; | 2042 | Reg type; |
2025 | RegSet allow = rset_exclude(RSET_GPR, RID_BASE); | 2043 | RegSet allow = rset_exclude(RSET_GPR, RID_BASE); |
2026 | lua_assert(irt_ispri(ir->t) || irt_isaddr(ir->t) || irt_isinteger(ir->t)); | 2044 | lj_assertA(irt_ispri(ir->t) || irt_isaddr(ir->t) || irt_isinteger(ir->t), |
2045 | "restore of IR type %d", irt_type(ir->t)); | ||
2027 | if (!irt_ispri(ir->t)) { | 2046 | if (!irt_ispri(ir->t)) { |
2028 | Reg src = ra_alloc1(as, ref, allow); | 2047 | Reg src = ra_alloc1(as, ref, allow); |
2029 | rset_clear(allow, src); | 2048 | rset_clear(allow, src); |
@@ -2043,7 +2062,7 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap) | |||
2043 | } | 2062 | } |
2044 | checkmclim(as); | 2063 | checkmclim(as); |
2045 | } | 2064 | } |
2046 | lua_assert(map + nent == flinks); | 2065 | lj_assertA(map + nent == flinks, "inconsistent frames in snapshot"); |
2047 | } | 2066 | } |
2048 | 2067 | ||
2049 | /* -- GC handling --------------------------------------------------------- */ | 2068 | /* -- GC handling --------------------------------------------------------- */ |
@@ -2141,7 +2160,7 @@ static void asm_tail_fixup(ASMState *as, TraceNo lnk) | |||
2141 | as->mctop = p; | 2160 | as->mctop = p; |
2142 | } else { | 2161 | } else { |
2143 | /* Patch stack adjustment. */ | 2162 | /* Patch stack adjustment. */ |
2144 | lua_assert(checki16(CFRAME_SIZE+spadj)); | 2163 | lj_assertA(checki16(CFRAME_SIZE+spadj), "stack adjustment out of range"); |
2145 | p[-3] = PPCI_ADDI | PPCF_T(RID_TMP) | PPCF_A(RID_SP) | (CFRAME_SIZE+spadj); | 2164 | p[-3] = PPCI_ADDI | PPCF_T(RID_TMP) | PPCF_A(RID_SP) | (CFRAME_SIZE+spadj); |
2146 | p[-2] = PPCI_STWU | PPCF_T(RID_TMP) | PPCF_A(RID_SP) | spadj; | 2165 | p[-2] = PPCI_STWU | PPCF_T(RID_TMP) | PPCF_A(RID_SP) | spadj; |
2147 | } | 2166 | } |
@@ -2218,14 +2237,16 @@ void lj_asm_patchexit(jit_State *J, GCtrace *T, ExitNo exitno, MCode *target) | |||
2218 | } else if ((ins & 0xfc000000u) == PPCI_B && | 2237 | } else if ((ins & 0xfc000000u) == PPCI_B && |
2219 | ((ins ^ ((char *)px-(char *)p)) & 0x03ffffffu) == 0) { | 2238 | ((ins ^ ((char *)px-(char *)p)) & 0x03ffffffu) == 0) { |
2220 | ptrdiff_t delta = (char *)target - (char *)p; | 2239 | ptrdiff_t delta = (char *)target - (char *)p; |
2221 | lua_assert(((delta + 0x02000000) >> 26) == 0); | 2240 | lj_assertJ(((delta + 0x02000000) >> 26) == 0, |
2241 | "branch target out of range"); | ||
2222 | *p = PPCI_B | ((uint32_t)delta & 0x03ffffffu); | 2242 | *p = PPCI_B | ((uint32_t)delta & 0x03ffffffu); |
2223 | if (!cstart) cstart = p; | 2243 | if (!cstart) cstart = p; |
2224 | } | 2244 | } |
2225 | } | 2245 | } |
2226 | { /* Always patch long-range branch in exit stub itself. */ | 2246 | { /* Always patch long-range branch in exit stub itself. */ |
2227 | ptrdiff_t delta = (char *)target - (char *)px - clearso; | 2247 | ptrdiff_t delta = (char *)target - (char *)px - clearso; |
2228 | lua_assert(((delta + 0x02000000) >> 26) == 0); | 2248 | lj_assertJ(((delta + 0x02000000) >> 26) == 0, |
2249 | "branch target out of range"); | ||
2229 | *px = PPCI_B | ((uint32_t)delta & 0x03ffffffu); | 2250 | *px = PPCI_B | ((uint32_t)delta & 0x03ffffffu); |
2230 | } | 2251 | } |
2231 | if (!cstart) cstart = px; | 2252 | if (!cstart) cstart = px; |