diff options
Diffstat (limited to 'src/lj_asm_ppc.h')
-rw-r--r-- | src/lj_asm_ppc.h | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h index 85b87bd5..86052577 100644 --- a/src/lj_asm_ppc.h +++ b/src/lj_asm_ppc.h | |||
@@ -773,7 +773,7 @@ static void asm_newref(ASMState *as, IRIns *ir) | |||
773 | { | 773 | { |
774 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; | 774 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; |
775 | IRRef args[3]; | 775 | IRRef args[3]; |
776 | if (ir->r == RID_SINK) /* Sink newref. */ | 776 | if (ir->r == RID_SINK) |
777 | return; | 777 | return; |
778 | args[0] = ASMREF_L; /* lua_State *L */ | 778 | args[0] = ASMREF_L; /* lua_State *L */ |
779 | args[1] = ir->op1; /* GCtab *t */ | 779 | args[1] = ir->op1; /* GCtab *t */ |
@@ -894,9 +894,7 @@ static void asm_fload(ASMState *as, IRIns *ir) | |||
894 | 894 | ||
895 | static void asm_fstore(ASMState *as, IRIns *ir) | 895 | static void asm_fstore(ASMState *as, IRIns *ir) |
896 | { | 896 | { |
897 | if (ir->r == RID_SINK) { /* Sink store. */ | 897 | if (ir->r != RID_SINK) { |
898 | asm_snap_prep(as); | ||
899 | } else { | ||
900 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); | 898 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); |
901 | IRIns *irf = IR(ir->op1); | 899 | IRIns *irf = IR(ir->op1); |
902 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); | 900 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); |
@@ -918,10 +916,8 @@ static void asm_xload(ASMState *as, IRIns *ir) | |||
918 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) | 916 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) |
919 | { | 917 | { |
920 | IRIns *irb; | 918 | IRIns *irb; |
921 | if (ir->r == RID_SINK) { /* Sink store. */ | 919 | if (ir->r == RID_SINK) |
922 | asm_snap_prep(as); | ||
923 | return; | 920 | return; |
924 | } | ||
925 | if (ofs == 0 && mayfuse(as, ir->op2) && (irb = IR(ir->op2))->o == IR_BSWAP && | 921 | if (ofs == 0 && mayfuse(as, ir->op2) && (irb = IR(ir->op2))->o == IR_BSWAP && |
926 | ra_noreg(irb->r) && (irt_isint(ir->t) || irt_isu32(ir->t))) { | 922 | ra_noreg(irb->r) && (irt_isint(ir->t) || irt_isu32(ir->t))) { |
927 | /* Fuse BSWAP with XSTORE to stwbrx. */ | 923 | /* Fuse BSWAP with XSTORE to stwbrx. */ |
@@ -978,10 +974,8 @@ static void asm_ahustore(ASMState *as, IRIns *ir) | |||
978 | RegSet allow = RSET_GPR; | 974 | RegSet allow = RSET_GPR; |
979 | Reg idx, src = RID_NONE, type = RID_NONE; | 975 | Reg idx, src = RID_NONE, type = RID_NONE; |
980 | int32_t ofs = AHUREF_LSX; | 976 | int32_t ofs = AHUREF_LSX; |
981 | if (ir->r == RID_SINK) { /* Sink store. */ | 977 | if (ir->r == RID_SINK) |
982 | asm_snap_prep(as); | ||
983 | return; | 978 | return; |
984 | } | ||
985 | if (irt_isnum(ir->t)) { | 979 | if (irt_isnum(ir->t)) { |
986 | src = ra_alloc1(as, ir->op2, RSET_FPR); | 980 | src = ra_alloc1(as, ir->op2, RSET_FPR); |
987 | } else { | 981 | } else { |
@@ -1761,9 +1755,7 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1761 | return; | 1755 | return; |
1762 | } else if ((ir-1)->o == IR_XSTORE) { | 1756 | } else if ((ir-1)->o == IR_XSTORE) { |
1763 | as->curins--; /* Handle both stores here. */ | 1757 | as->curins--; /* Handle both stores here. */ |
1764 | if ((ir-1)->r == RID_SINK) { | 1758 | if ((ir-1)->r != RID_SINK) { |
1765 | asm_snap_prep(as); | ||
1766 | } else { | ||
1767 | asm_xstore(as, ir, 0); | 1759 | asm_xstore(as, ir, 0); |
1768 | asm_xstore(as, ir-1, 4); | 1760 | asm_xstore(as, ir-1, 4); |
1769 | } | 1761 | } |