diff options
Diffstat (limited to 'src/lj_asm_ppc.h')
-rw-r--r-- | src/lj_asm_ppc.h | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h index 73942b8b..ec22e260 100644 --- a/src/lj_asm_ppc.h +++ b/src/lj_asm_ppc.h | |||
@@ -162,22 +162,24 @@ static Reg asm_fuseahuref(ASMState *as, IRRef ref, int32_t *ofsp, RegSet allow) | |||
162 | 162 | ||
163 | /* Fuse XLOAD/XSTORE reference into load/store operand. */ | 163 | /* Fuse XLOAD/XSTORE reference into load/store operand. */ |
164 | static void asm_fusexref(ASMState *as, PPCIns pi, Reg rt, IRRef ref, | 164 | static void asm_fusexref(ASMState *as, PPCIns pi, Reg rt, IRRef ref, |
165 | RegSet allow) | 165 | RegSet allow, int32_t ofs) |
166 | { | 166 | { |
167 | IRIns *ir = IR(ref); | 167 | IRIns *ir = IR(ref); |
168 | int32_t ofs = 0; | ||
169 | Reg base; | 168 | Reg base; |
170 | if (ra_noreg(ir->r) && mayfuse(as, ref)) { | 169 | if (ra_noreg(ir->r) && mayfuse(as, ref)) { |
171 | if (ir->o == IR_ADD) { | 170 | if (ir->o == IR_ADD) { |
172 | if (irref_isk(ir->op2) && (ofs = IR(ir->op2)->i, checki16(ofs))) { | 171 | int32_t ofs2; |
172 | if (irref_isk(ir->op2) && (ofs2 = ofs + IR(ir->op2)->i, checki16(ofs2))) { | ||
173 | ofs = ofs2; | ||
173 | ref = ir->op1; | 174 | ref = ir->op1; |
174 | } else { | 175 | } else if (ofs == 0) { |
175 | Reg right, left = ra_alloc2(as, ir, allow); | 176 | Reg right, left = ra_alloc2(as, ir, allow); |
176 | right = (left >> 8); left &= 255; | 177 | right = (left >> 8); left &= 255; |
177 | emit_fab(as, PPCI_LWZX | ((pi >> 20) & 0x780), rt, left, right); | 178 | emit_fab(as, PPCI_LWZX | ((pi >> 20) & 0x780), rt, left, right); |
178 | return; | 179 | return; |
179 | } | 180 | } |
180 | } else if (ir->o == IR_STRREF) { | 181 | } else if (ir->o == IR_STRREF) { |
182 | lua_assert(ofs == 0); | ||
181 | ofs = (int32_t)sizeof(GCstr); | 183 | ofs = (int32_t)sizeof(GCstr); |
182 | if (irref_isk(ir->op2)) { | 184 | if (irref_isk(ir->op2)) { |
183 | ofs += IR(ir->op2)->i; | 185 | ofs += IR(ir->op2)->i; |
@@ -904,13 +906,13 @@ static void asm_xload(ASMState *as, IRIns *ir) | |||
904 | lua_assert(!(ir->op2 & IRXLOAD_UNALIGNED)); | 906 | lua_assert(!(ir->op2 & IRXLOAD_UNALIGNED)); |
905 | if (irt_isi8(ir->t)) | 907 | if (irt_isi8(ir->t)) |
906 | emit_as(as, PPCI_EXTSB, dest, dest); | 908 | emit_as(as, PPCI_EXTSB, dest, dest); |
907 | asm_fusexref(as, asm_fxloadins(ir), dest, ir->op1, RSET_GPR); | 909 | asm_fusexref(as, asm_fxloadins(ir), dest, ir->op1, RSET_GPR, 0); |
908 | } | 910 | } |
909 | 911 | ||
910 | static void asm_xstore(ASMState *as, IRIns *ir) | 912 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) |
911 | { | 913 | { |
912 | IRIns *irb; | 914 | IRIns *irb; |
913 | if (mayfuse(as, ir->op2) && (irb = IR(ir->op2))->o == IR_BSWAP && | 915 | if (ofs == 0 && mayfuse(as, ir->op2) && (irb = IR(ir->op2))->o == IR_BSWAP && |
914 | ra_noreg(irb->r) && (irt_isint(ir->t) || irt_isu32(ir->t))) { | 916 | ra_noreg(irb->r) && (irt_isint(ir->t) || irt_isu32(ir->t))) { |
915 | /* Fuse BSWAP with XSTORE to stwbrx. */ | 917 | /* Fuse BSWAP with XSTORE to stwbrx. */ |
916 | Reg src = ra_alloc1(as, irb->op1, RSET_GPR); | 918 | Reg src = ra_alloc1(as, irb->op1, RSET_GPR); |
@@ -918,7 +920,7 @@ static void asm_xstore(ASMState *as, IRIns *ir) | |||
918 | } else { | 920 | } else { |
919 | Reg src = ra_alloc1(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR); | 921 | Reg src = ra_alloc1(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR); |
920 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, | 922 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, |
921 | rset_exclude(RSET_GPR, src)); | 923 | rset_exclude(RSET_GPR, src), ofs); |
922 | } | 924 | } |
923 | } | 925 | } |
924 | 926 | ||
@@ -1743,6 +1745,11 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1743 | as->curins--; /* Always skip the loword comparison. */ | 1745 | as->curins--; /* Always skip the loword comparison. */ |
1744 | asm_comp64(as, ir); | 1746 | asm_comp64(as, ir); |
1745 | return; | 1747 | return; |
1748 | } else if ((ir-1)->o == IR_XSTORE) { | ||
1749 | as->curins--; /* Handle both stores here. */ | ||
1750 | asm_xstore(as, ir, 0); | ||
1751 | asm_xstore(as, ir-1, 4); | ||
1752 | return; | ||
1746 | } | 1753 | } |
1747 | if (!usehi) return; /* Skip unused hiword op for all remaining ops. */ | 1754 | if (!usehi) return; /* Skip unused hiword op for all remaining ops. */ |
1748 | switch ((ir-1)->o) { | 1755 | switch ((ir-1)->o) { |
@@ -2035,7 +2042,7 @@ static void asm_ir(ASMState *as, IRIns *ir) | |||
2035 | 2042 | ||
2036 | case IR_ASTORE: case IR_HSTORE: case IR_USTORE: asm_ahustore(as, ir); break; | 2043 | case IR_ASTORE: case IR_HSTORE: case IR_USTORE: asm_ahustore(as, ir); break; |
2037 | case IR_FSTORE: asm_fstore(as, ir); break; | 2044 | case IR_FSTORE: asm_fstore(as, ir); break; |
2038 | case IR_XSTORE: asm_xstore(as, ir); break; | 2045 | case IR_XSTORE: asm_xstore(as, ir, 0); break; |
2039 | 2046 | ||
2040 | /* Allocations. */ | 2047 | /* Allocations. */ |
2041 | case IR_SNEW: case IR_XSNEW: asm_snew(as, ir); break; | 2048 | case IR_SNEW: case IR_XSNEW: asm_snew(as, ir); break; |