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-rw-r--r--src/lj_jit.h48
1 files changed, 36 insertions, 12 deletions
diff --git a/src/lj_jit.h b/src/lj_jit.h
index 9b66c565..5a51357e 100644
--- a/src/lj_jit.h
+++ b/src/lj_jit.h
@@ -14,18 +14,15 @@
14 14
15/* CPU-specific JIT engine flags. */ 15/* CPU-specific JIT engine flags. */
16#if LJ_TARGET_X86ORX64 16#if LJ_TARGET_X86ORX64
17#define JIT_F_CMOV 0x00000010 17#define JIT_F_SSE2 0x00000010
18#define JIT_F_SSE2 0x00000020 18#define JIT_F_SSE3 0x00000020
19#define JIT_F_SSE3 0x00000040 19#define JIT_F_SSE4_1 0x00000040
20#define JIT_F_SSE4_1 0x00000080 20#define JIT_F_PREFER_IMUL 0x00000080
21#define JIT_F_P4 0x00000100 21#define JIT_F_LEA_AGU 0x00000100
22#define JIT_F_PREFER_IMUL 0x00000200
23#define JIT_F_SPLIT_XMM 0x00000400
24#define JIT_F_LEA_AGU 0x00000800
25 22
26/* Names for the CPU-specific flags. Must match the order above. */ 23/* Names for the CPU-specific flags. Must match the order above. */
27#define JIT_F_CPU_FIRST JIT_F_CMOV 24#define JIT_F_CPU_FIRST JIT_F_SSE2
28#define JIT_F_CPUSTRING "\4CMOV\4SSE2\4SSE3\6SSE4.1\2P4\3AMD\2K8\4ATOM" 25#define JIT_F_CPUSTRING "\4SSE2\4SSE3\6SSE4.1\3AMD\4ATOM"
29#elif LJ_TARGET_ARM 26#elif LJ_TARGET_ARM
30#define JIT_F_ARMV6_ 0x00000010 27#define JIT_F_ARMV6_ 0x00000010
31#define JIT_F_ARMV6T2_ 0x00000020 28#define JIT_F_ARMV6T2_ 0x00000020
@@ -100,6 +97,7 @@
100 _(\012, maxirconst, 500) /* Max. # of IR constants of a trace. */ \ 97 _(\012, maxirconst, 500) /* Max. # of IR constants of a trace. */ \
101 _(\007, maxside, 100) /* Max. # of side traces of a root trace. */ \ 98 _(\007, maxside, 100) /* Max. # of side traces of a root trace. */ \
102 _(\007, maxsnap, 500) /* Max. # of snapshots for a trace. */ \ 99 _(\007, maxsnap, 500) /* Max. # of snapshots for a trace. */ \
100 _(\011, minstitch, 0) /* Min. # of IR ins for a stitched trace. */ \
103 \ 101 \
104 _(\007, hotloop, 56) /* # of iter. to detect a hot loop/call. */ \ 102 _(\007, hotloop, 56) /* # of iter. to detect a hot loop/call. */ \
105 _(\007, hotexit, 10) /* # of taken exits to start a side trace. */ \ 103 _(\007, hotexit, 10) /* # of taken exits to start a side trace. */ \
@@ -205,7 +203,8 @@ typedef enum {
205 LJ_TRLINK_UPREC, /* Up-recursion. */ 203 LJ_TRLINK_UPREC, /* Up-recursion. */
206 LJ_TRLINK_DOWNREC, /* Down-recursion. */ 204 LJ_TRLINK_DOWNREC, /* Down-recursion. */
207 LJ_TRLINK_INTERP, /* Fallback to interpreter. */ 205 LJ_TRLINK_INTERP, /* Fallback to interpreter. */
208 LJ_TRLINK_RETURN /* Return to interpreter. */ 206 LJ_TRLINK_RETURN, /* Return to interpreter. */
207 LJ_TRLINK_STITCH /* Trace stitching. */
209} TraceLink; 208} TraceLink;
210 209
211/* Trace object. */ 210/* Trace object. */
@@ -214,6 +213,9 @@ typedef struct GCtrace {
214 uint8_t topslot; /* Top stack slot already checked to be allocated. */ 213 uint8_t topslot; /* Top stack slot already checked to be allocated. */
215 uint8_t linktype; /* Type of link. */ 214 uint8_t linktype; /* Type of link. */
216 IRRef nins; /* Next IR instruction. Biased with REF_BIAS. */ 215 IRRef nins; /* Next IR instruction. Biased with REF_BIAS. */
216#if LJ_GC64
217 uint32_t unused_gc64;
218#endif
217 GCRef gclist; 219 GCRef gclist;
218 IRIns *ir; /* IR instructions/constants. Biased with REF_BIAS. */ 220 IRIns *ir; /* IR instructions/constants. Biased with REF_BIAS. */
219 IRRef nk; /* Lowest IR constant. Biased with REF_BIAS. */ 221 IRRef nk; /* Lowest IR constant. Biased with REF_BIAS. */
@@ -288,6 +290,16 @@ typedef struct ScEvEntry {
288 uint8_t dir; /* Direction. 1: +, 0: -. */ 290 uint8_t dir; /* Direction. 1: +, 0: -. */
289} ScEvEntry; 291} ScEvEntry;
290 292
293/* Reverse bytecode map (IRRef -> PC). Only for selected instructions. */
294typedef struct RBCHashEntry {
295 MRef pc; /* Bytecode PC. */
296 GCRef pt; /* Prototype. */
297 IRRef ref; /* IR reference. */
298} RBCHashEntry;
299
300/* Number of slots in the reverse bytecode hash table. Must be a power of 2. */
301#define RBCHASH_SLOTS 8
302
291/* 128 bit SIMD constants. */ 303/* 128 bit SIMD constants. */
292enum { 304enum {
293 LJ_KSIMD_ABS, 305 LJ_KSIMD_ABS,
@@ -362,12 +374,14 @@ typedef struct jit_State {
362 374
363 PostProc postproc; /* Required post-processing after execution. */ 375 PostProc postproc; /* Required post-processing after execution. */
364#if LJ_SOFTFP || (LJ_32 && LJ_HASFFI) 376#if LJ_SOFTFP || (LJ_32 && LJ_HASFFI)
365 int needsplit; /* Need SPLIT pass. */ 377 uint8_t needsplit; /* Need SPLIT pass. */
366#endif 378#endif
379 uint8_t retryrec; /* Retry recording. */
367 380
368 GCRef *trace; /* Array of traces. */ 381 GCRef *trace; /* Array of traces. */
369 TraceNo freetrace; /* Start of scan for next free trace. */ 382 TraceNo freetrace; /* Start of scan for next free trace. */
370 MSize sizetrace; /* Size of trace array. */ 383 MSize sizetrace; /* Size of trace array. */
384 TValue *ktracep; /* Pointer to K64Array slot with GCtrace pointer. */
371 385
372 IRRef1 chain[IR__MAX]; /* IR instruction skip-list chain anchors. */ 386 IRRef1 chain[IR__MAX]; /* IR instruction skip-list chain anchors. */
373 TRef slot[LJ_MAX_JSLOTS+LJ_STACK_EXTRA]; /* Stack slot map. */ 387 TRef slot[LJ_MAX_JSLOTS+LJ_STACK_EXTRA]; /* Stack slot map. */
@@ -380,6 +394,10 @@ typedef struct jit_State {
380 uint32_t penaltyslot; /* Round-robin index into penalty slots. */ 394 uint32_t penaltyslot; /* Round-robin index into penalty slots. */
381 uint32_t prngstate; /* PRNG state. */ 395 uint32_t prngstate; /* PRNG state. */
382 396
397#ifdef LUAJIT_ENABLE_TABLE_BUMP
398 RBCHashEntry rbchash[RBCHASH_SLOTS]; /* Reverse bytecode map. */
399#endif
400
383 BPropEntry bpropcache[BPROP_SLOTS]; /* Backpropagation cache slots. */ 401 BPropEntry bpropcache[BPROP_SLOTS]; /* Backpropagation cache slots. */
384 uint32_t bpropslot; /* Round-robin index into bpropcache slots. */ 402 uint32_t bpropslot; /* Round-robin index into bpropcache slots. */
385 403
@@ -400,6 +418,12 @@ typedef struct jit_State {
400 size_t szallmcarea; /* Total size of all allocated mcode areas. */ 418 size_t szallmcarea; /* Total size of all allocated mcode areas. */
401 419
402 TValue errinfo; /* Additional info element for trace errors. */ 420 TValue errinfo; /* Additional info element for trace errors. */
421
422#if LJ_HASPROFILE
423 GCproto *prev_pt; /* Previous prototype. */
424 BCLine prev_line; /* Previous line. */
425 int prof_mode; /* Profiling mode: 0, 'f', 'l'. */
426#endif
403} 427}
404#if LJ_TARGET_ARM 428#if LJ_TARGET_ARM
405LJ_ALIGN(16) /* For DISPATCH-relative addresses in assembler part. */ 429LJ_ALIGN(16) /* For DISPATCH-relative addresses in assembler part. */