diff options
Diffstat (limited to 'src/lj_target_x86.h')
-rw-r--r-- | src/lj_target_x86.h | 30 |
1 files changed, 25 insertions, 5 deletions
diff --git a/src/lj_target_x86.h b/src/lj_target_x86.h index 8a96cbf2..71c930fe 100644 --- a/src/lj_target_x86.h +++ b/src/lj_target_x86.h | |||
@@ -22,7 +22,7 @@ | |||
22 | _(XMM0) _(XMM1) _(XMM2) _(XMM3) _(XMM4) _(XMM5) _(XMM6) _(XMM7) | 22 | _(XMM0) _(XMM1) _(XMM2) _(XMM3) _(XMM4) _(XMM5) _(XMM6) _(XMM7) |
23 | #endif | 23 | #endif |
24 | #define VRIDDEF(_) \ | 24 | #define VRIDDEF(_) \ |
25 | _(MRM) | 25 | _(MRM) _(RIP) |
26 | 26 | ||
27 | #define RIDENUM(name) RID_##name, | 27 | #define RIDENUM(name) RID_##name, |
28 | 28 | ||
@@ -31,8 +31,10 @@ enum { | |||
31 | FPRDEF(RIDENUM) /* Floating-point registers (FPRs). */ | 31 | FPRDEF(RIDENUM) /* Floating-point registers (FPRs). */ |
32 | RID_MAX, | 32 | RID_MAX, |
33 | RID_MRM = RID_MAX, /* Pseudo-id for ModRM operand. */ | 33 | RID_MRM = RID_MAX, /* Pseudo-id for ModRM operand. */ |
34 | RID_RIP = RID_MAX+5, /* Pseudo-id for RIP (x64 only), rm bits = 5. */ | ||
34 | 35 | ||
35 | /* Calling conventions. */ | 36 | /* Calling conventions. */ |
37 | RID_SP = RID_ESP, | ||
36 | RID_RET = RID_EAX, | 38 | RID_RET = RID_EAX, |
37 | #if LJ_64 | 39 | #if LJ_64 |
38 | RID_FPRET = RID_XMM0, | 40 | RID_FPRET = RID_XMM0, |
@@ -62,8 +64,10 @@ enum { | |||
62 | 64 | ||
63 | /* -- Register sets ------------------------------------------------------- */ | 65 | /* -- Register sets ------------------------------------------------------- */ |
64 | 66 | ||
65 | /* Make use of all registers, except the stack pointer. */ | 67 | /* Make use of all registers, except the stack pointer (and maybe DISPATCH). */ |
66 | #define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR)-RID2RSET(RID_ESP)) | 68 | #define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR) \ |
69 | - RID2RSET(RID_ESP) \ | ||
70 | - LJ_GC64*RID2RSET(RID_DISPATCH)) | ||
67 | #define RSET_FPR (RSET_RANGE(RID_MIN_FPR, RID_MAX_FPR)) | 71 | #define RSET_FPR (RSET_RANGE(RID_MIN_FPR, RID_MAX_FPR)) |
68 | #define RSET_ALL (RSET_GPR|RSET_FPR) | 72 | #define RSET_ALL (RSET_GPR|RSET_FPR) |
69 | #define RSET_INIT RSET_ALL | 73 | #define RSET_INIT RSET_ALL |
@@ -131,7 +135,11 @@ enum { | |||
131 | #define SPS_FIXED (4*2) | 135 | #define SPS_FIXED (4*2) |
132 | #define SPS_FIRST (4*2) /* Don't use callee register save area. */ | 136 | #define SPS_FIRST (4*2) /* Don't use callee register save area. */ |
133 | #else | 137 | #else |
138 | #if LJ_GC64 | ||
139 | #define SPS_FIXED 2 | ||
140 | #else | ||
134 | #define SPS_FIXED 4 | 141 | #define SPS_FIXED 4 |
142 | #endif | ||
135 | #define SPS_FIRST 2 | 143 | #define SPS_FIRST 2 |
136 | #endif | 144 | #endif |
137 | #else | 145 | #else |
@@ -184,12 +192,18 @@ typedef struct { | |||
184 | #define XO_f20f(o) ((uint32_t)(0x0ff2fc + (0x##o<<24))) | 192 | #define XO_f20f(o) ((uint32_t)(0x0ff2fc + (0x##o<<24))) |
185 | #define XO_f30f(o) ((uint32_t)(0x0ff3fc + (0x##o<<24))) | 193 | #define XO_f30f(o) ((uint32_t)(0x0ff3fc + (0x##o<<24))) |
186 | 194 | ||
195 | #define XV_660f38(o) ((uint32_t)(0x79e2c4 + (0x##o<<24))) | ||
196 | #define XV_f20f38(o) ((uint32_t)(0x7be2c4 + (0x##o<<24))) | ||
197 | #define XV_f20f3a(o) ((uint32_t)(0x7be3c4 + (0x##o<<24))) | ||
198 | #define XV_f30f38(o) ((uint32_t)(0x7ae2c4 + (0x##o<<24))) | ||
199 | |||
187 | /* This list of x86 opcodes is not intended to be complete. Opcodes are only | 200 | /* This list of x86 opcodes is not intended to be complete. Opcodes are only |
188 | ** included when needed. Take a look at DynASM or jit.dis_x86 to see the | 201 | ** included when needed. Take a look at DynASM or jit.dis_x86 to see the |
189 | ** whole mess. | 202 | ** whole mess. |
190 | */ | 203 | */ |
191 | typedef enum { | 204 | typedef enum { |
192 | /* Fixed length opcodes. XI_* prefix. */ | 205 | /* Fixed length opcodes. XI_* prefix. */ |
206 | XI_O16 = 0x66, | ||
193 | XI_NOP = 0x90, | 207 | XI_NOP = 0x90, |
194 | XI_XCHGa = 0x90, | 208 | XI_XCHGa = 0x90, |
195 | XI_CALL = 0xe8, | 209 | XI_CALL = 0xe8, |
@@ -207,6 +221,7 @@ typedef enum { | |||
207 | XI_PUSHi8 = 0x6a, | 221 | XI_PUSHi8 = 0x6a, |
208 | XI_TESTb = 0x84, | 222 | XI_TESTb = 0x84, |
209 | XI_TEST = 0x85, | 223 | XI_TEST = 0x85, |
224 | XI_INT3 = 0xcc, | ||
210 | XI_MOVmi = 0xc7, | 225 | XI_MOVmi = 0xc7, |
211 | XI_GROUP5 = 0xff, | 226 | XI_GROUP5 = 0xff, |
212 | 227 | ||
@@ -226,7 +241,14 @@ typedef enum { | |||
226 | XI_FSCALE = 0xfdd9, | 241 | XI_FSCALE = 0xfdd9, |
227 | XI_FYL2X = 0xf1d9, | 242 | XI_FYL2X = 0xf1d9, |
228 | 243 | ||
244 | /* VEX-encoded instructions. XV_* prefix. */ | ||
245 | XV_RORX = XV_f20f3a(f0), | ||
246 | XV_SARX = XV_f30f38(f7), | ||
247 | XV_SHLX = XV_660f38(f7), | ||
248 | XV_SHRX = XV_f20f38(f7), | ||
249 | |||
229 | /* Variable-length opcodes. XO_* prefix. */ | 250 | /* Variable-length opcodes. XO_* prefix. */ |
251 | XO_OR = XO_(0b), | ||
230 | XO_MOV = XO_(8b), | 252 | XO_MOV = XO_(8b), |
231 | XO_MOVto = XO_(89), | 253 | XO_MOVto = XO_(89), |
232 | XO_MOVtow = XO_66(89), | 254 | XO_MOVtow = XO_66(89), |
@@ -277,10 +299,8 @@ typedef enum { | |||
277 | XO_ROUNDSD = 0x0b3a0ffc, /* Really 66 0f 3a 0b. See asm_fpmath. */ | 299 | XO_ROUNDSD = 0x0b3a0ffc, /* Really 66 0f 3a 0b. See asm_fpmath. */ |
278 | XO_UCOMISD = XO_660f(2e), | 300 | XO_UCOMISD = XO_660f(2e), |
279 | XO_CVTSI2SD = XO_f20f(2a), | 301 | XO_CVTSI2SD = XO_f20f(2a), |
280 | XO_CVTSD2SI = XO_f20f(2d), | ||
281 | XO_CVTTSD2SI= XO_f20f(2c), | 302 | XO_CVTTSD2SI= XO_f20f(2c), |
282 | XO_CVTSI2SS = XO_f30f(2a), | 303 | XO_CVTSI2SS = XO_f30f(2a), |
283 | XO_CVTSS2SI = XO_f30f(2d), | ||
284 | XO_CVTTSS2SI= XO_f30f(2c), | 304 | XO_CVTTSS2SI= XO_f30f(2c), |
285 | XO_CVTSS2SD = XO_f30f(5a), | 305 | XO_CVTSS2SD = XO_f30f(5a), |
286 | XO_CVTSD2SS = XO_f20f(5a), | 306 | XO_CVTSD2SS = XO_f20f(5a), |