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1|// Low-level VM code for MIPS64 CPUs.
2|// Bytecode interpreter, fast functions and helper functions.
3|// Copyright (C) 2005-2020 Mike Pall. See Copyright Notice in luajit.h
4|//
5|// Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
6|// Sponsored by Cisco Systems, Inc.
7|
8|.arch mips64
9|.section code_op, code_sub
10|
11|.actionlist build_actionlist
12|.globals GLOB_
13|.globalnames globnames
14|.externnames extnames
15|
16|// Note: The ragged indentation of the instructions is intentional.
17|// The starting columns indicate data dependencies.
18|
19|//-----------------------------------------------------------------------
20|
21|// Fixed register assignments for the interpreter.
22|// Don't use: r0 = 0, r26/r27 = reserved, r28 = gp, r29 = sp, r31 = ra
23|
24|.macro .FPU, a, b
25|.if FPU
26| a, b
27|.endif
28|.endmacro
29|
30|// The following must be C callee-save (but BASE is often refetched).
31|.define BASE, r16 // Base of current Lua stack frame.
32|.define KBASE, r17 // Constants of current Lua function.
33|.define PC, r18 // Next PC.
34|.define DISPATCH, r19 // Opcode dispatch table.
35|.define LREG, r20 // Register holding lua_State (also in SAVE_L).
36|.define MULTRES, r21 // Size of multi-result: (nresults+1)*8.
37|
38|.define JGL, r30 // On-trace: global_State + 32768.
39|
40|// Constants for type-comparisons, stores and conversions. C callee-save.
41|.define TISNIL, r30
42|.define TISNUM, r22
43|.if FPU
44|.define TOBIT, f30 // 2^52 + 2^51.
45|.endif
46|
47|// The following temporaries are not saved across C calls, except for RA.
48|.define RA, r23 // Callee-save.
49|.define RB, r8
50|.define RC, r9
51|.define RD, r10
52|.define INS, r11
53|
54|.define AT, r1 // Assembler temporary.
55|.define TMP0, r12
56|.define TMP1, r13
57|.define TMP2, r14
58|.define TMP3, r15
59|
60|// MIPS n64 calling convention.
61|.define CFUNCADDR, r25
62|.define CARG1, r4
63|.define CARG2, r5
64|.define CARG3, r6
65|.define CARG4, r7
66|.define CARG5, r8
67|.define CARG6, r9
68|.define CARG7, r10
69|.define CARG8, r11
70|
71|.define CRET1, r2
72|.define CRET2, r3
73|
74|.if FPU
75|.define FARG1, f12
76|.define FARG2, f13
77|.define FARG3, f14
78|.define FARG4, f15
79|.define FARG5, f16
80|.define FARG6, f17
81|.define FARG7, f18
82|.define FARG8, f19
83|
84|.define FRET1, f0
85|.define FRET2, f2
86|
87|.define FTMP0, f20
88|.define FTMP1, f21
89|.define FTMP2, f22
90|.endif
91|
92|// Stack layout while in interpreter. Must match with lj_frame.h.
93|.if FPU // MIPS64 hard-float.
94|
95|.define CFRAME_SPACE, 192 // Delta for sp.
96|
97|//----- 16 byte aligned, <-- sp entering interpreter
98|.define SAVE_ERRF, 188(sp) // 32 bit values.
99|.define SAVE_NRES, 184(sp)
100|.define SAVE_CFRAME, 176(sp) // 64 bit values.
101|.define SAVE_L, 168(sp)
102|.define SAVE_PC, 160(sp)
103|//----- 16 byte aligned
104|.define SAVE_GPR_, 80 // .. 80+10*8: 64 bit GPR saves.
105|.define SAVE_FPR_, 16 // .. 16+8*8: 64 bit FPR saves.
106|
107|.else // MIPS64 soft-float
108|
109|.define CFRAME_SPACE, 128 // Delta for sp.
110|
111|//----- 16 byte aligned, <-- sp entering interpreter
112|.define SAVE_ERRF, 124(sp) // 32 bit values.
113|.define SAVE_NRES, 120(sp)
114|.define SAVE_CFRAME, 112(sp) // 64 bit values.
115|.define SAVE_L, 104(sp)
116|.define SAVE_PC, 96(sp)
117|//----- 16 byte aligned
118|.define SAVE_GPR_, 16 // .. 16+10*8: 64 bit GPR saves.
119|
120|.endif
121|
122|.define TMPX, 8(sp) // Unused by interpreter, temp for JIT code.
123|.define TMPD, 0(sp)
124|//----- 16 byte aligned
125|
126|.define TMPD_OFS, 0
127|
128|.define SAVE_MULTRES, TMPD
129|
130|//-----------------------------------------------------------------------
131|
132|.macro saveregs
133| daddiu sp, sp, -CFRAME_SPACE
134| sd ra, SAVE_GPR_+9*8(sp)
135| sd r30, SAVE_GPR_+8*8(sp)
136| .FPU sdc1 f31, SAVE_FPR_+7*8(sp)
137| sd r23, SAVE_GPR_+7*8(sp)
138| .FPU sdc1 f30, SAVE_FPR_+6*8(sp)
139| sd r22, SAVE_GPR_+6*8(sp)
140| .FPU sdc1 f29, SAVE_FPR_+5*8(sp)
141| sd r21, SAVE_GPR_+5*8(sp)
142| .FPU sdc1 f28, SAVE_FPR_+4*8(sp)
143| sd r20, SAVE_GPR_+4*8(sp)
144| .FPU sdc1 f27, SAVE_FPR_+3*8(sp)
145| sd r19, SAVE_GPR_+3*8(sp)
146| .FPU sdc1 f26, SAVE_FPR_+2*8(sp)
147| sd r18, SAVE_GPR_+2*8(sp)
148| .FPU sdc1 f25, SAVE_FPR_+1*8(sp)
149| sd r17, SAVE_GPR_+1*8(sp)
150| .FPU sdc1 f24, SAVE_FPR_+0*8(sp)
151| sd r16, SAVE_GPR_+0*8(sp)
152|.endmacro
153|
154|.macro restoreregs_ret
155| ld ra, SAVE_GPR_+9*8(sp)
156| ld r30, SAVE_GPR_+8*8(sp)
157| ld r23, SAVE_GPR_+7*8(sp)
158| .FPU ldc1 f31, SAVE_FPR_+7*8(sp)
159| ld r22, SAVE_GPR_+6*8(sp)
160| .FPU ldc1 f30, SAVE_FPR_+6*8(sp)
161| ld r21, SAVE_GPR_+5*8(sp)
162| .FPU ldc1 f29, SAVE_FPR_+5*8(sp)
163| ld r20, SAVE_GPR_+4*8(sp)
164| .FPU ldc1 f28, SAVE_FPR_+4*8(sp)
165| ld r19, SAVE_GPR_+3*8(sp)
166| .FPU ldc1 f27, SAVE_FPR_+3*8(sp)
167| ld r18, SAVE_GPR_+2*8(sp)
168| .FPU ldc1 f26, SAVE_FPR_+2*8(sp)
169| ld r17, SAVE_GPR_+1*8(sp)
170| .FPU ldc1 f25, SAVE_FPR_+1*8(sp)
171| ld r16, SAVE_GPR_+0*8(sp)
172| .FPU ldc1 f24, SAVE_FPR_+0*8(sp)
173| jr ra
174| daddiu sp, sp, CFRAME_SPACE
175|.endmacro
176|
177|// Type definitions. Some of these are only used for documentation.
178|.type L, lua_State, LREG
179|.type GL, global_State
180|.type TVALUE, TValue
181|.type GCOBJ, GCobj
182|.type STR, GCstr
183|.type TAB, GCtab
184|.type LFUNC, GCfuncL
185|.type CFUNC, GCfuncC
186|.type PROTO, GCproto
187|.type UPVAL, GCupval
188|.type NODE, Node
189|.type NARGS8, int
190|.type TRACE, GCtrace
191|.type SBUF, SBuf
192|
193|//-----------------------------------------------------------------------
194|
195|// Trap for not-yet-implemented parts.
196|.macro NYI; .long 0xf0f0f0f0; .endmacro
197|
198|// Macros to mark delay slots.
199|.macro ., a; a; .endmacro
200|.macro ., a,b; a,b; .endmacro
201|.macro ., a,b,c; a,b,c; .endmacro
202|.macro ., a,b,c,d; a,b,c,d; .endmacro
203|
204|.define FRAME_PC, -8
205|.define FRAME_FUNC, -16
206|
207|//-----------------------------------------------------------------------
208|
209|// Endian-specific defines.
210|.if ENDIAN_LE
211|.define HI, 4
212|.define LO, 0
213|.define OFS_RD, 2
214|.define OFS_RA, 1
215|.define OFS_OP, 0
216|.else
217|.define HI, 0
218|.define LO, 4
219|.define OFS_RD, 0
220|.define OFS_RA, 2
221|.define OFS_OP, 3
222|.endif
223|
224|// Instruction decode.
225|.macro decode_OP1, dst, ins; andi dst, ins, 0xff; .endmacro
226|.macro decode_OP8a, dst, ins; andi dst, ins, 0xff; .endmacro
227|.macro decode_OP8b, dst; sll dst, dst, 3; .endmacro
228|.macro decode_RC8a, dst, ins; srl dst, ins, 13; .endmacro
229|.macro decode_RC8b, dst; andi dst, dst, 0x7f8; .endmacro
230|.macro decode_RD4b, dst; sll dst, dst, 2; .endmacro
231|.macro decode_RA8a, dst, ins; srl dst, ins, 5; .endmacro
232|.macro decode_RA8b, dst; andi dst, dst, 0x7f8; .endmacro
233|.macro decode_RB8a, dst, ins; srl dst, ins, 21; .endmacro
234|.macro decode_RB8b, dst; andi dst, dst, 0x7f8; .endmacro
235|.macro decode_RD8a, dst, ins; srl dst, ins, 16; .endmacro
236|.macro decode_RD8b, dst; sll dst, dst, 3; .endmacro
237|.macro decode_RDtoRC8, dst, src; andi dst, src, 0x7f8; .endmacro
238|
239|// Instruction fetch.
240|.macro ins_NEXT1
241| lw INS, 0(PC)
242| daddiu PC, PC, 4
243|.endmacro
244|// Instruction decode+dispatch.
245|.macro ins_NEXT2
246| decode_OP8a TMP1, INS
247| decode_OP8b TMP1
248| daddu TMP0, DISPATCH, TMP1
249| decode_RD8a RD, INS
250| ld AT, 0(TMP0)
251| decode_RA8a RA, INS
252| decode_RD8b RD
253| jr AT
254| decode_RA8b RA
255|.endmacro
256|.macro ins_NEXT
257| ins_NEXT1
258| ins_NEXT2
259|.endmacro
260|
261|// Instruction footer.
262|.if 1
263| // Replicated dispatch. Less unpredictable branches, but higher I-Cache use.
264| .define ins_next, ins_NEXT
265| .define ins_next_, ins_NEXT
266| .define ins_next1, ins_NEXT1
267| .define ins_next2, ins_NEXT2
268|.else
269| // Common dispatch. Lower I-Cache use, only one (very) unpredictable branch.
270| // Affects only certain kinds of benchmarks (and only with -j off).
271| .macro ins_next
272| b ->ins_next
273| .endmacro
274| .macro ins_next1
275| .endmacro
276| .macro ins_next2
277| b ->ins_next
278| .endmacro
279| .macro ins_next_
280| ->ins_next:
281| ins_NEXT
282| .endmacro
283|.endif
284|
285|// Call decode and dispatch.
286|.macro ins_callt
287| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
288| ld PC, LFUNC:RB->pc
289| lw INS, 0(PC)
290| daddiu PC, PC, 4
291| decode_OP8a TMP1, INS
292| decode_RA8a RA, INS
293| decode_OP8b TMP1
294| decode_RA8b RA
295| daddu TMP0, DISPATCH, TMP1
296| ld TMP0, 0(TMP0)
297| jr TMP0
298| daddu RA, RA, BASE
299|.endmacro
300|
301|.macro ins_call
302| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, PC = caller PC
303| sd PC, FRAME_PC(BASE)
304| ins_callt
305|.endmacro
306|
307|//-----------------------------------------------------------------------
308|
309|.macro branch_RD
310| srl TMP0, RD, 1
311| lui AT, (-(BCBIAS_J*4 >> 16) & 65535)
312| addu TMP0, TMP0, AT
313| daddu PC, PC, TMP0
314|.endmacro
315|
316|// Assumes DISPATCH is relative to GL.
317#define DISPATCH_GL(field) (GG_DISP2G + (int)offsetof(global_State, field))
318#define DISPATCH_J(field) (GG_DISP2J + (int)offsetof(jit_State, field))
319#define GG_DISP2GOT (GG_OFS(got) - GG_OFS(dispatch))
320#define DISPATCH_GOT(name) (GG_DISP2GOT + sizeof(void*)*LJ_GOT_##name)
321|
322#define PC2PROTO(field) ((int)offsetof(GCproto, field)-(int)sizeof(GCproto))
323|
324|.macro load_got, func
325| ld CFUNCADDR, DISPATCH_GOT(func)(DISPATCH)
326|.endmacro
327|// Much faster. Sadly, there's no easy way to force the required code layout.
328|// .macro call_intern, func; bal extern func; .endmacro
329|.macro call_intern, func; jalr CFUNCADDR; .endmacro
330|.macro call_extern; jalr CFUNCADDR; .endmacro
331|.macro jmp_extern; jr CFUNCADDR; .endmacro
332|
333|.macro hotcheck, delta, target
334| dsrl TMP1, PC, 1
335| andi TMP1, TMP1, 126
336| daddu TMP1, TMP1, DISPATCH
337| lhu TMP2, GG_DISP2HOT(TMP1)
338| addiu TMP2, TMP2, -delta
339| bltz TMP2, target
340|. sh TMP2, GG_DISP2HOT(TMP1)
341|.endmacro
342|
343|.macro hotloop
344| hotcheck HOTCOUNT_LOOP, ->vm_hotloop
345|.endmacro
346|
347|.macro hotcall
348| hotcheck HOTCOUNT_CALL, ->vm_hotcall
349|.endmacro
350|
351|// Set current VM state. Uses TMP0.
352|.macro li_vmstate, st; li TMP0, ~LJ_VMST_..st; .endmacro
353|.macro st_vmstate; sw TMP0, DISPATCH_GL(vmstate)(DISPATCH); .endmacro
354|
355|// Move table write barrier back. Overwrites mark and tmp.
356|.macro barrierback, tab, mark, tmp, target
357| ld tmp, DISPATCH_GL(gc.grayagain)(DISPATCH)
358| andi mark, mark, ~LJ_GC_BLACK & 255 // black2gray(tab)
359| sd tab, DISPATCH_GL(gc.grayagain)(DISPATCH)
360| sb mark, tab->marked
361| b target
362|. sd tmp, tab->gclist
363|.endmacro
364|
365|// Clear type tag. Isolate lowest 14+32+1=47 bits of reg.
366|.macro cleartp, reg; dextm reg, reg, 0, 14; .endmacro
367|.macro cleartp, dst, reg; dextm dst, reg, 0, 14; .endmacro
368|
369|// Set type tag: Merge 17 type bits into bits [15+32=47, 31+32+1=64) of dst.
370|.macro settp, dst, tp; dinsu dst, tp, 15, 31; .endmacro
371|
372|// Extract (negative) type tag.
373|.macro gettp, dst, src; dsra dst, src, 47; .endmacro
374|
375|// Macros to check the TValue type and extract the GCobj. Branch on failure.
376|.macro checktp, reg, tp, target
377| gettp AT, reg
378| daddiu AT, AT, tp
379| bnez AT, target
380|. cleartp reg
381|.endmacro
382|.macro checktp, dst, reg, tp, target
383| gettp AT, reg
384| daddiu AT, AT, tp
385| bnez AT, target
386|. cleartp dst, reg
387|.endmacro
388|.macro checkstr, reg, target; checktp reg, -LJ_TSTR, target; .endmacro
389|.macro checktab, reg, target; checktp reg, -LJ_TTAB, target; .endmacro
390|.macro checkfunc, reg, target; checktp reg, -LJ_TFUNC, target; .endmacro
391|.macro checkint, reg, target // Caveat: has delay slot!
392| gettp AT, reg
393| bne AT, TISNUM, target
394|.endmacro
395|.macro checknum, reg, target // Caveat: has delay slot!
396| gettp AT, reg
397| sltiu AT, AT, LJ_TISNUM
398| beqz AT, target
399|.endmacro
400|
401|.macro mov_false, reg
402| lu reg, 0x8000
403| dsll reg, reg, 32
404| not reg, reg
405|.endmacro
406|.macro mov_true, reg
407| li reg, 0x0001
408| dsll reg, reg, 48
409| not reg, reg
410|.endmacro
411|
412|//-----------------------------------------------------------------------
413
414/* Generate subroutines used by opcodes and other parts of the VM. */
415/* The .code_sub section should be last to help static branch prediction. */
416static void build_subroutines(BuildCtx *ctx)
417{
418 |.code_sub
419 |
420 |//-----------------------------------------------------------------------
421 |//-- Return handling ----------------------------------------------------
422 |//-----------------------------------------------------------------------
423 |
424 |->vm_returnp:
425 | // See vm_return. Also: TMP2 = previous base.
426 | andi AT, PC, FRAME_P
427 | beqz AT, ->cont_dispatch
428 |
429 | // Return from pcall or xpcall fast func.
430 |. mov_true TMP1
431 | ld PC, FRAME_PC(TMP2) // Fetch PC of previous frame.
432 | move BASE, TMP2 // Restore caller base.
433 | // Prepending may overwrite the pcall frame, so do it at the end.
434 | sd TMP1, -8(RA) // Prepend true to results.
435 | daddiu RA, RA, -8
436 |
437 |->vm_returnc:
438 | addiu RD, RD, 8 // RD = (nresults+1)*8.
439 | andi TMP0, PC, FRAME_TYPE
440 | beqz RD, ->vm_unwind_c_eh
441 |. li CRET1, LUA_YIELD
442 | beqz TMP0, ->BC_RET_Z // Handle regular return to Lua.
443 |. move MULTRES, RD
444 |
445 |->vm_return:
446 | // BASE = base, RA = resultptr, RD/MULTRES = (nresults+1)*8, PC = return
447 | // TMP0 = PC & FRAME_TYPE
448 | li TMP2, -8
449 | xori AT, TMP0, FRAME_C
450 | and TMP2, PC, TMP2
451 | bnez AT, ->vm_returnp
452 | dsubu TMP2, BASE, TMP2 // TMP2 = previous base.
453 |
454 | addiu TMP1, RD, -8
455 | sd TMP2, L->base
456 | li_vmstate C
457 | lw TMP2, SAVE_NRES
458 | daddiu BASE, BASE, -16
459 | st_vmstate
460 | beqz TMP1, >2
461 |. sll TMP2, TMP2, 3
462 |1:
463 | addiu TMP1, TMP1, -8
464 | ld CRET1, 0(RA)
465 | daddiu RA, RA, 8
466 | sd CRET1, 0(BASE)
467 | bnez TMP1, <1
468 |. daddiu BASE, BASE, 8
469 |
470 |2:
471 | bne TMP2, RD, >6
472 |3:
473 |. sd BASE, L->top // Store new top.
474 |
475 |->vm_leave_cp:
476 | ld TMP0, SAVE_CFRAME // Restore previous C frame.
477 | move CRET1, r0 // Ok return status for vm_pcall.
478 | sd TMP0, L->cframe
479 |
480 |->vm_leave_unw:
481 | restoreregs_ret
482 |
483 |6:
484 | ld TMP1, L->maxstack
485 | slt AT, TMP2, RD
486 | bnez AT, >7 // Less results wanted?
487 | // More results wanted. Check stack size and fill up results with nil.
488 |. slt AT, BASE, TMP1
489 | beqz AT, >8
490 |. nop
491 | sd TISNIL, 0(BASE)
492 | addiu RD, RD, 8
493 | b <2
494 |. daddiu BASE, BASE, 8
495 |
496 |7: // Less results wanted.
497 | subu TMP0, RD, TMP2
498 | dsubu TMP0, BASE, TMP0 // Either keep top or shrink it.
499 |.if MIPSR6
500 | selnez TMP0, TMP0, TMP2 // LUA_MULTRET+1 case?
501 | seleqz BASE, BASE, TMP2
502 | b <3
503 |. or BASE, BASE, TMP0
504 |.else
505 | b <3
506 |. movn BASE, TMP0, TMP2 // LUA_MULTRET+1 case?
507 |.endif
508 |
509 |8: // Corner case: need to grow stack for filling up results.
510 | // This can happen if:
511 | // - A C function grows the stack (a lot).
512 | // - The GC shrinks the stack in between.
513 | // - A return back from a lua_call() with (high) nresults adjustment.
514 | load_got lj_state_growstack
515 | move MULTRES, RD
516 | srl CARG2, TMP2, 3
517 | call_intern lj_state_growstack // (lua_State *L, int n)
518 |. move CARG1, L
519 | lw TMP2, SAVE_NRES
520 | ld BASE, L->top // Need the (realloced) L->top in BASE.
521 | move RD, MULTRES
522 | b <2
523 |. sll TMP2, TMP2, 3
524 |
525 |->vm_unwind_c: // Unwind C stack, return from vm_pcall.
526 | // (void *cframe, int errcode)
527 | move sp, CARG1
528 | move CRET1, CARG2
529 |->vm_unwind_c_eh: // Landing pad for external unwinder.
530 | ld L, SAVE_L
531 | li TMP0, ~LJ_VMST_C
532 | ld GL:TMP1, L->glref
533 | b ->vm_leave_unw
534 |. sw TMP0, GL:TMP1->vmstate
535 |
536 |->vm_unwind_ff: // Unwind C stack, return from ff pcall.
537 | // (void *cframe)
538 | li AT, -4
539 | and sp, CARG1, AT
540 |->vm_unwind_ff_eh: // Landing pad for external unwinder.
541 | ld L, SAVE_L
542 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
543 | li TISNIL, LJ_TNIL
544 | li TISNUM, LJ_TISNUM
545 | ld BASE, L->base
546 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
547 | .FPU mtc1 TMP3, TOBIT
548 | mov_false TMP1
549 | li_vmstate INTERP
550 | ld PC, FRAME_PC(BASE) // Fetch PC of previous frame.
551 | .FPU cvt.d.s TOBIT, TOBIT
552 | daddiu RA, BASE, -8 // Results start at BASE-8.
553 | daddiu DISPATCH, DISPATCH, GG_G2DISP
554 | sd TMP1, 0(RA) // Prepend false to error message.
555 | st_vmstate
556 | b ->vm_returnc
557 |. li RD, 16 // 2 results: false + error message.
558 |
559 |//-----------------------------------------------------------------------
560 |//-- Grow stack for calls -----------------------------------------------
561 |//-----------------------------------------------------------------------
562 |
563 |->vm_growstack_c: // Grow stack for C function.
564 | b >2
565 |. li CARG2, LUA_MINSTACK
566 |
567 |->vm_growstack_l: // Grow stack for Lua function.
568 | // BASE = new base, RA = BASE+framesize*8, RC = nargs*8, PC = first PC
569 | daddu RC, BASE, RC
570 | dsubu RA, RA, BASE
571 | sd BASE, L->base
572 | daddiu PC, PC, 4 // Must point after first instruction.
573 | sd RC, L->top
574 | srl CARG2, RA, 3
575 |2:
576 | // L->base = new base, L->top = top
577 | load_got lj_state_growstack
578 | sd PC, SAVE_PC
579 | call_intern lj_state_growstack // (lua_State *L, int n)
580 |. move CARG1, L
581 | ld BASE, L->base
582 | ld RC, L->top
583 | ld LFUNC:RB, FRAME_FUNC(BASE)
584 | dsubu RC, RC, BASE
585 | cleartp LFUNC:RB
586 | // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
587 | ins_callt // Just retry the call.
588 |
589 |//-----------------------------------------------------------------------
590 |//-- Entry points into the assembler VM ---------------------------------
591 |//-----------------------------------------------------------------------
592 |
593 |->vm_resume: // Setup C frame and resume thread.
594 | // (lua_State *L, TValue *base, int nres1 = 0, ptrdiff_t ef = 0)
595 | saveregs
596 | move L, CARG1
597 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
598 | move BASE, CARG2
599 | lbu TMP1, L->status
600 | sd L, SAVE_L
601 | li PC, FRAME_CP
602 | daddiu TMP0, sp, CFRAME_RESUME
603 | daddiu DISPATCH, DISPATCH, GG_G2DISP
604 | sw r0, SAVE_NRES
605 | sw r0, SAVE_ERRF
606 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
607 | sd r0, SAVE_CFRAME
608 | beqz TMP1, >3
609 |. sd TMP0, L->cframe
610 |
611 | // Resume after yield (like a return).
612 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
613 | move RA, BASE
614 | ld BASE, L->base
615 | ld TMP1, L->top
616 | ld PC, FRAME_PC(BASE)
617 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
618 | dsubu RD, TMP1, BASE
619 | .FPU mtc1 TMP3, TOBIT
620 | sb r0, L->status
621 | .FPU cvt.d.s TOBIT, TOBIT
622 | li_vmstate INTERP
623 | daddiu RD, RD, 8
624 | st_vmstate
625 | move MULTRES, RD
626 | andi TMP0, PC, FRAME_TYPE
627 | li TISNIL, LJ_TNIL
628 | beqz TMP0, ->BC_RET_Z
629 |. li TISNUM, LJ_TISNUM
630 | b ->vm_return
631 |. nop
632 |
633 |->vm_pcall: // Setup protected C frame and enter VM.
634 | // (lua_State *L, TValue *base, int nres1, ptrdiff_t ef)
635 | saveregs
636 | sw CARG4, SAVE_ERRF
637 | b >1
638 |. li PC, FRAME_CP
639 |
640 |->vm_call: // Setup C frame and enter VM.
641 | // (lua_State *L, TValue *base, int nres1)
642 | saveregs
643 | li PC, FRAME_C
644 |
645 |1: // Entry point for vm_pcall above (PC = ftype).
646 | ld TMP1, L:CARG1->cframe
647 | move L, CARG1
648 | sw CARG3, SAVE_NRES
649 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
650 | sd CARG1, SAVE_L
651 | move BASE, CARG2
652 | daddiu DISPATCH, DISPATCH, GG_G2DISP
653 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
654 | sd TMP1, SAVE_CFRAME
655 | sd sp, L->cframe // Add our C frame to cframe chain.
656 |
657 |3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype).
658 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
659 | ld TMP2, L->base // TMP2 = old base (used in vmeta_call).
660 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
661 | ld TMP1, L->top
662 | .FPU mtc1 TMP3, TOBIT
663 | daddu PC, PC, BASE
664 | dsubu NARGS8:RC, TMP1, BASE
665 | li TISNUM, LJ_TISNUM
666 | dsubu PC, PC, TMP2 // PC = frame delta + frame type
667 | .FPU cvt.d.s TOBIT, TOBIT
668 | li_vmstate INTERP
669 | li TISNIL, LJ_TNIL
670 | st_vmstate
671 |
672 |->vm_call_dispatch:
673 | // TMP2 = old base, BASE = new base, RC = nargs*8, PC = caller PC
674 | ld LFUNC:RB, FRAME_FUNC(BASE)
675 | checkfunc LFUNC:RB, ->vmeta_call
676 |
677 |->vm_call_dispatch_f:
678 | ins_call
679 | // BASE = new base, RB = func, RC = nargs*8, PC = caller PC
680 |
681 |->vm_cpcall: // Setup protected C frame, call C.
682 | // (lua_State *L, lua_CFunction func, void *ud, lua_CPFunction cp)
683 | saveregs
684 | move L, CARG1
685 | ld TMP0, L:CARG1->stack
686 | sd CARG1, SAVE_L
687 | ld TMP1, L->top
688 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
689 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
690 | dsubu TMP0, TMP0, TMP1 // Compute -savestack(L, L->top).
691 | ld TMP1, L->cframe
692 | daddiu DISPATCH, DISPATCH, GG_G2DISP
693 | sw TMP0, SAVE_NRES // Neg. delta means cframe w/o frame.
694 | sw r0, SAVE_ERRF // No error function.
695 | sd TMP1, SAVE_CFRAME
696 | sd sp, L->cframe // Add our C frame to cframe chain.
697 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
698 | jalr CARG4 // (lua_State *L, lua_CFunction func, void *ud)
699 |. move CFUNCADDR, CARG4
700 | move BASE, CRET1
701 | bnez CRET1, <3 // Else continue with the call.
702 |. li PC, FRAME_CP
703 | b ->vm_leave_cp // No base? Just remove C frame.
704 |. nop
705 |
706 |//-----------------------------------------------------------------------
707 |//-- Metamethod handling ------------------------------------------------
708 |//-----------------------------------------------------------------------
709 |
710 |// The lj_meta_* functions (except for lj_meta_cat) don't reallocate the
711 |// stack, so BASE doesn't need to be reloaded across these calls.
712 |
713 |//-- Continuation dispatch ----------------------------------------------
714 |
715 |->cont_dispatch:
716 | // BASE = meta base, RA = resultptr, RD = (nresults+1)*8
717 | ld TMP0, -32(BASE) // Continuation.
718 | move RB, BASE
719 | move BASE, TMP2 // Restore caller BASE.
720 | ld LFUNC:TMP1, FRAME_FUNC(TMP2)
721 |.if FFI
722 | sltiu AT, TMP0, 2
723 |.endif
724 | ld PC, -24(RB) // Restore PC from [cont|PC].
725 | cleartp LFUNC:TMP1
726 | daddu TMP2, RA, RD
727 | ld TMP1, LFUNC:TMP1->pc
728 |.if FFI
729 | bnez AT, >1
730 |.endif
731 |. sd TISNIL, -8(TMP2) // Ensure one valid arg.
732 | // BASE = base, RA = resultptr, RB = meta base
733 | jr TMP0 // Jump to continuation.
734 |. ld KBASE, PC2PROTO(k)(TMP1)
735 |
736 |.if FFI
737 |1:
738 | bnez TMP0, ->cont_ffi_callback // cont = 1: return from FFI callback.
739 | // cont = 0: tailcall from C function.
740 |. daddiu TMP1, RB, -32
741 | b ->vm_call_tail
742 |. dsubu RC, TMP1, BASE
743 |.endif
744 |
745 |->cont_cat: // RA = resultptr, RB = meta base
746 | lw INS, -4(PC)
747 | daddiu CARG2, RB, -32
748 | ld CRET1, 0(RA)
749 | decode_RB8a MULTRES, INS
750 | decode_RA8a RA, INS
751 | decode_RB8b MULTRES
752 | decode_RA8b RA
753 | daddu TMP1, BASE, MULTRES
754 | sd BASE, L->base
755 | dsubu CARG3, CARG2, TMP1
756 | bne TMP1, CARG2, ->BC_CAT_Z
757 |. sd CRET1, 0(CARG2)
758 | daddu RA, BASE, RA
759 | b ->cont_nop
760 |. sd CRET1, 0(RA)
761 |
762 |//-- Table indexing metamethods -----------------------------------------
763 |
764 |->vmeta_tgets1:
765 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
766 | li TMP0, LJ_TSTR
767 | settp STR:RC, TMP0
768 | b >1
769 |. sd STR:RC, 0(CARG3)
770 |
771 |->vmeta_tgets:
772 | daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
773 | li TMP0, LJ_TTAB
774 | li TMP1, LJ_TSTR
775 | settp TAB:RB, TMP0
776 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2)
777 | sd TAB:RB, 0(CARG2)
778 | settp STR:RC, TMP1
779 | b >1
780 |. sd STR:RC, 0(CARG3)
781 |
782 |->vmeta_tgetb: // TMP0 = index
783 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
784 | settp TMP0, TISNUM
785 | sd TMP0, 0(CARG3)
786 |
787 |->vmeta_tgetv:
788 |1:
789 | load_got lj_meta_tget
790 | sd BASE, L->base
791 | sd PC, SAVE_PC
792 | call_intern lj_meta_tget // (lua_State *L, TValue *o, TValue *k)
793 |. move CARG1, L
794 | // Returns TValue * (finished) or NULL (metamethod).
795 | beqz CRET1, >3
796 |. daddiu TMP1, BASE, -FRAME_CONT
797 | ld CARG1, 0(CRET1)
798 | ins_next1
799 | sd CARG1, 0(RA)
800 | ins_next2
801 |
802 |3: // Call __index metamethod.
803 | // BASE = base, L->top = new base, stack = cont/func/t/k
804 | ld BASE, L->top
805 | sd PC, -24(BASE) // [cont|PC]
806 | dsubu PC, BASE, TMP1
807 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
808 | cleartp LFUNC:RB
809 | b ->vm_call_dispatch_f
810 |. li NARGS8:RC, 16 // 2 args for func(t, k).
811 |
812 |->vmeta_tgetr:
813 | load_got lj_tab_getinth
814 | call_intern lj_tab_getinth // (GCtab *t, int32_t key)
815 |. nop
816 | // Returns cTValue * or NULL.
817 | beqz CRET1, ->BC_TGETR_Z
818 |. move CARG2, TISNIL
819 | b ->BC_TGETR_Z
820 |. ld CARG2, 0(CRET1)
821 |
822 |//-----------------------------------------------------------------------
823 |
824 |->vmeta_tsets1:
825 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
826 | li TMP0, LJ_TSTR
827 | settp STR:RC, TMP0
828 | b >1
829 |. sd STR:RC, 0(CARG3)
830 |
831 |->vmeta_tsets:
832 | daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
833 | li TMP0, LJ_TTAB
834 | li TMP1, LJ_TSTR
835 | settp TAB:RB, TMP0
836 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2)
837 | sd TAB:RB, 0(CARG2)
838 | settp STR:RC, TMP1
839 | b >1
840 |. sd STR:RC, 0(CARG3)
841 |
842 |->vmeta_tsetb: // TMP0 = index
843 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
844 | settp TMP0, TISNUM
845 | sd TMP0, 0(CARG3)
846 |
847 |->vmeta_tsetv:
848 |1:
849 | load_got lj_meta_tset
850 | sd BASE, L->base
851 | sd PC, SAVE_PC
852 | call_intern lj_meta_tset // (lua_State *L, TValue *o, TValue *k)
853 |. move CARG1, L
854 | // Returns TValue * (finished) or NULL (metamethod).
855 | beqz CRET1, >3
856 |. ld CARG1, 0(RA)
857 | // NOBARRIER: lj_meta_tset ensures the table is not black.
858 | ins_next1
859 | sd CARG1, 0(CRET1)
860 | ins_next2
861 |
862 |3: // Call __newindex metamethod.
863 | // BASE = base, L->top = new base, stack = cont/func/t/k/(v)
864 | daddiu TMP1, BASE, -FRAME_CONT
865 | ld BASE, L->top
866 | sd PC, -24(BASE) // [cont|PC]
867 | dsubu PC, BASE, TMP1
868 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
869 | cleartp LFUNC:RB
870 | sd CARG1, 16(BASE) // Copy value to third argument.
871 | b ->vm_call_dispatch_f
872 |. li NARGS8:RC, 24 // 3 args for func(t, k, v)
873 |
874 |->vmeta_tsetr:
875 | load_got lj_tab_setinth
876 | sd BASE, L->base
877 | sd PC, SAVE_PC
878 | call_intern lj_tab_setinth // (lua_State *L, GCtab *t, int32_t key)
879 |. move CARG1, L
880 | // Returns TValue *.
881 | b ->BC_TSETR_Z
882 |. nop
883 |
884 |//-- Comparison metamethods ---------------------------------------------
885 |
886 |->vmeta_comp:
887 | // RA/RD point to o1/o2.
888 | move CARG2, RA
889 | move CARG3, RD
890 | load_got lj_meta_comp
891 | daddiu PC, PC, -4
892 | sd BASE, L->base
893 | sd PC, SAVE_PC
894 | decode_OP1 CARG4, INS
895 | call_intern lj_meta_comp // (lua_State *L, TValue *o1, *o2, int op)
896 |. move CARG1, L
897 | // Returns 0/1 or TValue * (metamethod).
898 |3:
899 | sltiu AT, CRET1, 2
900 | beqz AT, ->vmeta_binop
901 | negu TMP2, CRET1
902 |4:
903 | lhu RD, OFS_RD(PC)
904 | daddiu PC, PC, 4
905 | lui TMP1, (-(BCBIAS_J*4 >> 16) & 65535)
906 | sll RD, RD, 2
907 | addu RD, RD, TMP1
908 | and RD, RD, TMP2
909 | daddu PC, PC, RD
910 |->cont_nop:
911 | ins_next
912 |
913 |->cont_ra: // RA = resultptr
914 | lbu TMP1, -4+OFS_RA(PC)
915 | ld CRET1, 0(RA)
916 | sll TMP1, TMP1, 3
917 | daddu TMP1, BASE, TMP1
918 | b ->cont_nop
919 |. sd CRET1, 0(TMP1)
920 |
921 |->cont_condt: // RA = resultptr
922 | ld TMP0, 0(RA)
923 | gettp TMP0, TMP0
924 | sltiu AT, TMP0, LJ_TISTRUECOND
925 | b <4
926 |. negu TMP2, AT // Branch if result is true.
927 |
928 |->cont_condf: // RA = resultptr
929 | ld TMP0, 0(RA)
930 | gettp TMP0, TMP0
931 | sltiu AT, TMP0, LJ_TISTRUECOND
932 | b <4
933 |. addiu TMP2, AT, -1 // Branch if result is false.
934 |
935 |->vmeta_equal:
936 | // CARG1/CARG2 point to o1/o2. TMP0 is set to 0/1.
937 | load_got lj_meta_equal
938 | cleartp LFUNC:CARG3, CARG2
939 | cleartp LFUNC:CARG2, CARG1
940 | move CARG4, TMP0
941 | daddiu PC, PC, -4
942 | sd BASE, L->base
943 | sd PC, SAVE_PC
944 | call_intern lj_meta_equal // (lua_State *L, GCobj *o1, *o2, int ne)
945 |. move CARG1, L
946 | // Returns 0/1 or TValue * (metamethod).
947 | b <3
948 |. nop
949 |
950 |->vmeta_equal_cd:
951 |.if FFI
952 | load_got lj_meta_equal_cd
953 | move CARG2, INS
954 | daddiu PC, PC, -4
955 | sd BASE, L->base
956 | sd PC, SAVE_PC
957 | call_intern lj_meta_equal_cd // (lua_State *L, BCIns op)
958 |. move CARG1, L
959 | // Returns 0/1 or TValue * (metamethod).
960 | b <3
961 |. nop
962 |.endif
963 |
964 |->vmeta_istype:
965 | load_got lj_meta_istype
966 | daddiu PC, PC, -4
967 | sd BASE, L->base
968 | srl CARG2, RA, 3
969 | srl CARG3, RD, 3
970 | sd PC, SAVE_PC
971 | call_intern lj_meta_istype // (lua_State *L, BCReg ra, BCReg tp)
972 |. move CARG1, L
973 | b ->cont_nop
974 |. nop
975 |
976 |//-- Arithmetic metamethods ---------------------------------------------
977 |
978 |->vmeta_unm:
979 | move RC, RB
980 |
981 |->vmeta_arith:
982 | load_got lj_meta_arith
983 | sd BASE, L->base
984 | move CARG2, RA
985 | sd PC, SAVE_PC
986 | move CARG3, RB
987 | move CARG4, RC
988 | decode_OP1 CARG5, INS // CARG5 == RB.
989 | call_intern lj_meta_arith // (lua_State *L, TValue *ra,*rb,*rc, BCReg op)
990 |. move CARG1, L
991 | // Returns NULL (finished) or TValue * (metamethod).
992 | beqz CRET1, ->cont_nop
993 |. nop
994 |
995 | // Call metamethod for binary op.
996 |->vmeta_binop:
997 | // BASE = old base, CRET1 = new base, stack = cont/func/o1/o2
998 | dsubu TMP1, CRET1, BASE
999 | sd PC, -24(CRET1) // [cont|PC]
1000 | move TMP2, BASE
1001 | daddiu PC, TMP1, FRAME_CONT
1002 | move BASE, CRET1
1003 | b ->vm_call_dispatch
1004 |. li NARGS8:RC, 16 // 2 args for func(o1, o2).
1005 |
1006 |->vmeta_len:
1007 | // CARG2 already set by BC_LEN.
1008#if LJ_52
1009 | move MULTRES, CARG1
1010#endif
1011 | load_got lj_meta_len
1012 | sd BASE, L->base
1013 | sd PC, SAVE_PC
1014 | call_intern lj_meta_len // (lua_State *L, TValue *o)
1015 |. move CARG1, L
1016 | // Returns NULL (retry) or TValue * (metamethod base).
1017#if LJ_52
1018 | bnez CRET1, ->vmeta_binop // Binop call for compatibility.
1019 |. nop
1020 | b ->BC_LEN_Z
1021 |. move CARG1, MULTRES
1022#else
1023 | b ->vmeta_binop // Binop call for compatibility.
1024 |. nop
1025#endif
1026 |
1027 |//-- Call metamethod ----------------------------------------------------
1028 |
1029 |->vmeta_call: // Resolve and call __call metamethod.
1030 | // TMP2 = old base, BASE = new base, RC = nargs*8
1031 | load_got lj_meta_call
1032 | sd TMP2, L->base // This is the callers base!
1033 | daddiu CARG2, BASE, -16
1034 | sd PC, SAVE_PC
1035 | daddu CARG3, BASE, RC
1036 | move MULTRES, NARGS8:RC
1037 | call_intern lj_meta_call // (lua_State *L, TValue *func, TValue *top)
1038 |. move CARG1, L
1039 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
1040 | daddiu NARGS8:RC, MULTRES, 8 // Got one more argument now.
1041 | cleartp LFUNC:RB
1042 | ins_call
1043 |
1044 |->vmeta_callt: // Resolve __call for BC_CALLT.
1045 | // BASE = old base, RA = new base, RC = nargs*8
1046 | load_got lj_meta_call
1047 | sd BASE, L->base
1048 | daddiu CARG2, RA, -16
1049 | sd PC, SAVE_PC
1050 | daddu CARG3, RA, RC
1051 | move MULTRES, NARGS8:RC
1052 | call_intern lj_meta_call // (lua_State *L, TValue *func, TValue *top)
1053 |. move CARG1, L
1054 | ld RB, FRAME_FUNC(RA) // Guaranteed to be a function here.
1055 | ld TMP1, FRAME_PC(BASE)
1056 | daddiu NARGS8:RC, MULTRES, 8 // Got one more argument now.
1057 | b ->BC_CALLT_Z
1058 |. cleartp LFUNC:CARG3, RB
1059 |
1060 |//-- Argument coercion for 'for' statement ------------------------------
1061 |
1062 |->vmeta_for:
1063 | load_got lj_meta_for
1064 | sd BASE, L->base
1065 | move CARG2, RA
1066 | sd PC, SAVE_PC
1067 | move MULTRES, INS
1068 | call_intern lj_meta_for // (lua_State *L, TValue *base)
1069 |. move CARG1, L
1070 |.if JIT
1071 | decode_OP1 TMP0, MULTRES
1072 | li AT, BC_JFORI
1073 |.endif
1074 | decode_RA8a RA, MULTRES
1075 | decode_RD8a RD, MULTRES
1076 | decode_RA8b RA
1077 |.if JIT
1078 | beq TMP0, AT, =>BC_JFORI
1079 |. decode_RD8b RD
1080 | b =>BC_FORI
1081 |. nop
1082 |.else
1083 | b =>BC_FORI
1084 |. decode_RD8b RD
1085 |.endif
1086 |
1087 |//-----------------------------------------------------------------------
1088 |//-- Fast functions -----------------------------------------------------
1089 |//-----------------------------------------------------------------------
1090 |
1091 |.macro .ffunc, name
1092 |->ff_ .. name:
1093 |.endmacro
1094 |
1095 |.macro .ffunc_1, name
1096 |->ff_ .. name:
1097 | beqz NARGS8:RC, ->fff_fallback
1098 |. ld CARG1, 0(BASE)
1099 |.endmacro
1100 |
1101 |.macro .ffunc_2, name
1102 |->ff_ .. name:
1103 | sltiu AT, NARGS8:RC, 16
1104 | ld CARG1, 0(BASE)
1105 | bnez AT, ->fff_fallback
1106 |. ld CARG2, 8(BASE)
1107 |.endmacro
1108 |
1109 |.macro .ffunc_n, name // Caveat: has delay slot!
1110 |->ff_ .. name:
1111 | ld CARG1, 0(BASE)
1112 | beqz NARGS8:RC, ->fff_fallback
1113 | // Either ldc1 or the 1st instruction of checknum is in the delay slot.
1114 | .FPU ldc1 FARG1, 0(BASE)
1115 | checknum CARG1, ->fff_fallback
1116 |.endmacro
1117 |
1118 |.macro .ffunc_nn, name // Caveat: has delay slot!
1119 |->ff_ .. name:
1120 | ld CARG1, 0(BASE)
1121 | sltiu AT, NARGS8:RC, 16
1122 | ld CARG2, 8(BASE)
1123 | bnez AT, ->fff_fallback
1124 |. gettp TMP0, CARG1
1125 | gettp TMP1, CARG2
1126 | sltiu TMP0, TMP0, LJ_TISNUM
1127 | sltiu TMP1, TMP1, LJ_TISNUM
1128 | .FPU ldc1 FARG1, 0(BASE)
1129 | and TMP0, TMP0, TMP1
1130 | .FPU ldc1 FARG2, 8(BASE)
1131 | beqz TMP0, ->fff_fallback
1132 |.endmacro
1133 |
1134 |// Inlined GC threshold check. Caveat: uses TMP0 and TMP1 and has delay slot!
1135 |// MIPSR6: no delay slot, but a forbidden slot.
1136 |.macro ffgccheck
1137 | ld TMP0, DISPATCH_GL(gc.total)(DISPATCH)
1138 | ld TMP1, DISPATCH_GL(gc.threshold)(DISPATCH)
1139 | dsubu AT, TMP0, TMP1
1140 |.if MIPSR6
1141 | bgezalc AT, ->fff_gcstep
1142 |.else
1143 | bgezal AT, ->fff_gcstep
1144 |.endif
1145 |.endmacro
1146 |
1147 |//-- Base library: checks -----------------------------------------------
1148 |.ffunc_1 assert
1149 | gettp AT, CARG1
1150 | sltiu AT, AT, LJ_TISTRUECOND
1151 | beqz AT, ->fff_fallback
1152 |. daddiu RA, BASE, -16
1153 | ld PC, FRAME_PC(BASE)
1154 | addiu RD, NARGS8:RC, 8 // Compute (nresults+1)*8.
1155 | daddu TMP2, RA, RD
1156 | daddiu TMP1, BASE, 8
1157 | beq BASE, TMP2, ->fff_res // Done if exactly 1 argument.
1158 |. sd CARG1, 0(RA)
1159 |1:
1160 | ld CRET1, 0(TMP1)
1161 | sd CRET1, -16(TMP1)
1162 | bne TMP1, TMP2, <1
1163 |. daddiu TMP1, TMP1, 8
1164 | b ->fff_res
1165 |. nop
1166 |
1167 |.ffunc_1 type
1168 | gettp TMP0, CARG1
1169 | sltu TMP1, TISNUM, TMP0
1170 | not TMP2, TMP0
1171 | li TMP3, ~LJ_TISNUM
1172 |.if MIPSR6
1173 | selnez TMP2, TMP2, TMP1
1174 | seleqz TMP3, TMP3, TMP1
1175 | or TMP2, TMP2, TMP3
1176 |.else
1177 | movz TMP2, TMP3, TMP1
1178 |.endif
1179 | dsll TMP2, TMP2, 3
1180 | daddu TMP2, CFUNC:RB, TMP2
1181 | b ->fff_restv
1182 |. ld CARG1, CFUNC:TMP2->upvalue
1183 |
1184 |//-- Base library: getters and setters ---------------------------------
1185 |
1186 |.ffunc_1 getmetatable
1187 | gettp TMP2, CARG1
1188 | daddiu TMP0, TMP2, -LJ_TTAB
1189 | daddiu TMP1, TMP2, -LJ_TUDATA
1190 |.if MIPSR6
1191 | selnez TMP0, TMP1, TMP0
1192 |.else
1193 | movn TMP0, TMP1, TMP0
1194 |.endif
1195 | bnez TMP0, >6
1196 |. cleartp TAB:CARG1
1197 |1: // Field metatable must be at same offset for GCtab and GCudata!
1198 | ld TAB:RB, TAB:CARG1->metatable
1199 |2:
1200 | ld STR:RC, DISPATCH_GL(gcroot[GCROOT_MMNAME+MM_metatable])(DISPATCH)
1201 | beqz TAB:RB, ->fff_restv
1202 |. li CARG1, LJ_TNIL
1203 | lw TMP0, TAB:RB->hmask
1204 | lw TMP1, STR:RC->hash
1205 | ld NODE:TMP2, TAB:RB->node
1206 | and TMP1, TMP1, TMP0 // idx = str->hash & tab->hmask
1207 | dsll TMP0, TMP1, 5
1208 | dsll TMP1, TMP1, 3
1209 | dsubu TMP1, TMP0, TMP1
1210 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8)
1211 | li CARG4, LJ_TSTR
1212 | settp STR:RC, CARG4 // Tagged key to look for.
1213 |3: // Rearranged logic, because we expect _not_ to find the key.
1214 | ld TMP0, NODE:TMP2->key
1215 | ld CARG1, NODE:TMP2->val
1216 | ld NODE:TMP2, NODE:TMP2->next
1217 | beq RC, TMP0, >5
1218 |. li AT, LJ_TTAB
1219 | bnez NODE:TMP2, <3
1220 |. nop
1221 |4:
1222 | move CARG1, RB
1223 | b ->fff_restv // Not found, keep default result.
1224 |. settp CARG1, AT
1225 |5:
1226 | bne CARG1, TISNIL, ->fff_restv
1227 |. nop
1228 | b <4 // Ditto for nil value.
1229 |. nop
1230 |
1231 |6:
1232 | sltiu AT, TMP2, LJ_TISNUM
1233 |.if MIPSR6
1234 | selnez TMP0, TISNUM, AT
1235 | seleqz AT, TMP2, AT
1236 | or TMP2, TMP0, AT
1237 |.else
1238 | movn TMP2, TISNUM, AT
1239 |.endif
1240 | dsll TMP2, TMP2, 3
1241 | dsubu TMP0, DISPATCH, TMP2
1242 | b <2
1243 |. ld TAB:RB, DISPATCH_GL(gcroot[GCROOT_BASEMT])-8(TMP0)
1244 |
1245 |.ffunc_2 setmetatable
1246 | // Fast path: no mt for table yet and not clearing the mt.
1247 | checktp TMP1, CARG1, -LJ_TTAB, ->fff_fallback
1248 | gettp TMP3, CARG2
1249 | ld TAB:TMP0, TAB:TMP1->metatable
1250 | lbu TMP2, TAB:TMP1->marked
1251 | daddiu AT, TMP3, -LJ_TTAB
1252 | cleartp TAB:CARG2
1253 | or AT, AT, TAB:TMP0
1254 | bnez AT, ->fff_fallback
1255 |. andi AT, TMP2, LJ_GC_BLACK // isblack(table)
1256 | beqz AT, ->fff_restv
1257 |. sd TAB:CARG2, TAB:TMP1->metatable
1258 | barrierback TAB:TMP1, TMP2, TMP0, ->fff_restv
1259 |
1260 |.ffunc rawget
1261 | ld CARG2, 0(BASE)
1262 | sltiu AT, NARGS8:RC, 16
1263 | load_got lj_tab_get
1264 | gettp TMP0, CARG2
1265 | cleartp CARG2
1266 | daddiu TMP0, TMP0, -LJ_TTAB
1267 | or AT, AT, TMP0
1268 | bnez AT, ->fff_fallback
1269 |. daddiu CARG3, BASE, 8
1270 | call_intern lj_tab_get // (lua_State *L, GCtab *t, cTValue *key)
1271 |. move CARG1, L
1272 | b ->fff_restv
1273 |. ld CARG1, 0(CRET1)
1274 |
1275 |//-- Base library: conversions ------------------------------------------
1276 |
1277 |.ffunc tonumber
1278 | // Only handles the number case inline (without a base argument).
1279 | ld CARG1, 0(BASE)
1280 | xori AT, NARGS8:RC, 8 // Exactly one number argument.
1281 | gettp TMP1, CARG1
1282 | sltu TMP0, TISNUM, TMP1
1283 | or AT, AT, TMP0
1284 | bnez AT, ->fff_fallback
1285 |. nop
1286 | b ->fff_restv
1287 |. nop
1288 |
1289 |.ffunc_1 tostring
1290 | // Only handles the string or number case inline.
1291 | gettp TMP0, CARG1
1292 | daddiu AT, TMP0, -LJ_TSTR
1293 | // A __tostring method in the string base metatable is ignored.
1294 | beqz AT, ->fff_restv // String key?
1295 | // Handle numbers inline, unless a number base metatable is present.
1296 |. ld TMP1, DISPATCH_GL(gcroot[GCROOT_BASEMT_NUM])(DISPATCH)
1297 | sltu TMP0, TISNUM, TMP0
1298 | or TMP0, TMP0, TMP1
1299 | bnez TMP0, ->fff_fallback
1300 |. sd BASE, L->base // Add frame since C call can throw.
1301 |.if MIPSR6
1302 | sd PC, SAVE_PC // Redundant (but a defined value).
1303 | ffgccheck
1304 |.else
1305 | ffgccheck
1306 |. sd PC, SAVE_PC // Redundant (but a defined value).
1307 |.endif
1308 | load_got lj_strfmt_number
1309 | move CARG1, L
1310 | call_intern lj_strfmt_number // (lua_State *L, cTValue *o)
1311 |. move CARG2, BASE
1312 | // Returns GCstr *.
1313 | li AT, LJ_TSTR
1314 | settp CRET1, AT
1315 | b ->fff_restv
1316 |. move CARG1, CRET1
1317 |
1318 |//-- Base library: iterators -------------------------------------------
1319 |
1320 |.ffunc_1 next
1321 | checktp CARG2, CARG1, -LJ_TTAB, ->fff_fallback
1322 | daddu TMP2, BASE, NARGS8:RC
1323 | sd TISNIL, 0(TMP2) // Set missing 2nd arg to nil.
1324 | ld PC, FRAME_PC(BASE)
1325 | load_got lj_tab_next
1326 | sd BASE, L->base // Add frame since C call can throw.
1327 | sd BASE, L->top // Dummy frame length is ok.
1328 | daddiu CARG3, BASE, 8
1329 | sd PC, SAVE_PC
1330 | call_intern lj_tab_next // (lua_State *L, GCtab *t, TValue *key)
1331 |. move CARG1, L
1332 | // Returns 0 at end of traversal.
1333 | beqz CRET1, ->fff_restv // End of traversal: return nil.
1334 |. move CARG1, TISNIL
1335 | ld TMP0, 8(BASE)
1336 | daddiu RA, BASE, -16
1337 | ld TMP2, 16(BASE)
1338 | sd TMP0, 0(RA)
1339 | sd TMP2, 8(RA)
1340 | b ->fff_res
1341 |. li RD, (2+1)*8
1342 |
1343 |.ffunc_1 pairs
1344 | checktp TAB:TMP1, CARG1, -LJ_TTAB, ->fff_fallback
1345 | ld PC, FRAME_PC(BASE)
1346#if LJ_52
1347 | ld TAB:TMP2, TAB:TMP1->metatable
1348 | ld TMP0, CFUNC:RB->upvalue[0]
1349 | bnez TAB:TMP2, ->fff_fallback
1350#else
1351 | ld TMP0, CFUNC:RB->upvalue[0]
1352#endif
1353 |. daddiu RA, BASE, -16
1354 | sd TISNIL, 0(BASE)
1355 | sd CARG1, -8(BASE)
1356 | sd TMP0, 0(RA)
1357 | b ->fff_res
1358 |. li RD, (3+1)*8
1359 |
1360 |.ffunc_2 ipairs_aux
1361 | checktab CARG1, ->fff_fallback
1362 | checkint CARG2, ->fff_fallback
1363 |. lw TMP0, TAB:CARG1->asize
1364 | ld TMP1, TAB:CARG1->array
1365 | ld PC, FRAME_PC(BASE)
1366 | sextw TMP2, CARG2
1367 | addiu TMP2, TMP2, 1
1368 | sltu AT, TMP2, TMP0
1369 | daddiu RA, BASE, -16
1370 | zextw TMP0, TMP2
1371 | settp TMP0, TISNUM
1372 | beqz AT, >2 // Not in array part?
1373 |. sd TMP0, 0(RA)
1374 | dsll TMP3, TMP2, 3
1375 | daddu TMP3, TMP1, TMP3
1376 | ld TMP1, 0(TMP3)
1377 |1:
1378 | beq TMP1, TISNIL, ->fff_res // End of iteration, return 0 results.
1379 |. li RD, (0+1)*8
1380 | sd TMP1, -8(BASE)
1381 | b ->fff_res
1382 |. li RD, (2+1)*8
1383 |2: // Check for empty hash part first. Otherwise call C function.
1384 | lw TMP0, TAB:CARG1->hmask
1385 | load_got lj_tab_getinth
1386 | beqz TMP0, ->fff_res
1387 |. li RD, (0+1)*8
1388 | call_intern lj_tab_getinth // (GCtab *t, int32_t key)
1389 |. move CARG2, TMP2
1390 | // Returns cTValue * or NULL.
1391 | beqz CRET1, ->fff_res
1392 |. li RD, (0+1)*8
1393 | b <1
1394 |. ld TMP1, 0(CRET1)
1395 |
1396 |.ffunc_1 ipairs
1397 | checktp TAB:TMP1, CARG1, -LJ_TTAB, ->fff_fallback
1398 | ld PC, FRAME_PC(BASE)
1399#if LJ_52
1400 | ld TAB:TMP2, TAB:TMP1->metatable
1401 | ld CFUNC:TMP0, CFUNC:RB->upvalue[0]
1402 | bnez TAB:TMP2, ->fff_fallback
1403#else
1404 | ld TMP0, CFUNC:RB->upvalue[0]
1405#endif
1406 | daddiu RA, BASE, -16
1407 | dsll AT, TISNUM, 47
1408 | sd CARG1, -8(BASE)
1409 | sd AT, 0(BASE)
1410 | sd CFUNC:TMP0, 0(RA)
1411 | b ->fff_res
1412 |. li RD, (3+1)*8
1413 |
1414 |//-- Base library: catch errors ----------------------------------------
1415 |
1416 |.ffunc pcall
1417 | daddiu NARGS8:RC, NARGS8:RC, -8
1418 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
1419 | bltz NARGS8:RC, ->fff_fallback
1420 |. move TMP2, BASE
1421 | daddiu BASE, BASE, 16
1422 | // Remember active hook before pcall.
1423 | srl TMP3, TMP3, HOOK_ACTIVE_SHIFT
1424 | andi TMP3, TMP3, 1
1425 | daddiu PC, TMP3, 16+FRAME_PCALL
1426 | beqz NARGS8:RC, ->vm_call_dispatch
1427 |1:
1428 |. daddu TMP0, BASE, NARGS8:RC
1429 |2:
1430 | ld TMP1, -16(TMP0)
1431 | sd TMP1, -8(TMP0)
1432 | daddiu TMP0, TMP0, -8
1433 | bne TMP0, BASE, <2
1434 |. nop
1435 | b ->vm_call_dispatch
1436 |. nop
1437 |
1438 |.ffunc xpcall
1439 | daddiu NARGS8:TMP0, NARGS8:RC, -16
1440 | ld CARG1, 0(BASE)
1441 | ld CARG2, 8(BASE)
1442 | bltz NARGS8:TMP0, ->fff_fallback
1443 |. lbu TMP1, DISPATCH_GL(hookmask)(DISPATCH)
1444 | gettp AT, CARG2
1445 | daddiu AT, AT, -LJ_TFUNC
1446 | bnez AT, ->fff_fallback // Traceback must be a function.
1447 |. move TMP2, BASE
1448 | move NARGS8:RC, NARGS8:TMP0
1449 | daddiu BASE, BASE, 24
1450 | // Remember active hook before pcall.
1451 | srl TMP3, TMP3, HOOK_ACTIVE_SHIFT
1452 | sd CARG2, 0(TMP2) // Swap function and traceback.
1453 | andi TMP3, TMP3, 1
1454 | sd CARG1, 8(TMP2)
1455 | beqz NARGS8:RC, ->vm_call_dispatch
1456 |. daddiu PC, TMP3, 24+FRAME_PCALL
1457 | b <1
1458 |. nop
1459 |
1460 |//-- Coroutine library --------------------------------------------------
1461 |
1462 |.macro coroutine_resume_wrap, resume
1463 |.if resume
1464 |.ffunc_1 coroutine_resume
1465 | checktp CARG1, CARG1, -LJ_TTHREAD, ->fff_fallback
1466 |.else
1467 |.ffunc coroutine_wrap_aux
1468 | ld L:CARG1, CFUNC:RB->upvalue[0].gcr
1469 | cleartp L:CARG1
1470 |.endif
1471 | lbu TMP0, L:CARG1->status
1472 | ld TMP1, L:CARG1->cframe
1473 | ld CARG2, L:CARG1->top
1474 | ld TMP2, L:CARG1->base
1475 | addiu AT, TMP0, -LUA_YIELD
1476 | daddu CARG3, CARG2, TMP0
1477 | daddiu TMP3, CARG2, 8
1478 |.if MIPSR6
1479 | seleqz CARG2, CARG2, AT
1480 | selnez TMP3, TMP3, AT
1481 | bgtz AT, ->fff_fallback // st > LUA_YIELD?
1482 |. or CARG2, TMP3, CARG2
1483 |.else
1484 | bgtz AT, ->fff_fallback // st > LUA_YIELD?
1485 |. movn CARG2, TMP3, AT
1486 |.endif
1487 | xor TMP2, TMP2, CARG3
1488 | bnez TMP1, ->fff_fallback // cframe != 0?
1489 |. or AT, TMP2, TMP0
1490 | ld TMP0, L:CARG1->maxstack
1491 | beqz AT, ->fff_fallback // base == top && st == 0?
1492 |. ld PC, FRAME_PC(BASE)
1493 | daddu TMP2, CARG2, NARGS8:RC
1494 | sltu AT, TMP0, TMP2
1495 | bnez AT, ->fff_fallback // Stack overflow?
1496 |. sd PC, SAVE_PC
1497 | sd BASE, L->base
1498 |1:
1499 |.if resume
1500 | daddiu BASE, BASE, 8 // Keep resumed thread in stack for GC.
1501 | daddiu NARGS8:RC, NARGS8:RC, -8
1502 | daddiu TMP2, TMP2, -8
1503 |.endif
1504 | sd TMP2, L:CARG1->top
1505 | daddu TMP1, BASE, NARGS8:RC
1506 | move CARG3, CARG2
1507 | sd BASE, L->top
1508 |2: // Move args to coroutine.
1509 | ld CRET1, 0(BASE)
1510 | sltu AT, BASE, TMP1
1511 | beqz AT, >3
1512 |. daddiu BASE, BASE, 8
1513 | sd CRET1, 0(CARG3)
1514 | b <2
1515 |. daddiu CARG3, CARG3, 8
1516 |3:
1517 | bal ->vm_resume // (lua_State *L, TValue *base, 0, 0)
1518 |. move L:RA, L:CARG1
1519 | // Returns thread status.
1520 |4:
1521 | ld TMP2, L:RA->base
1522 | sltiu AT, CRET1, LUA_YIELD+1
1523 | ld TMP3, L:RA->top
1524 | li_vmstate INTERP
1525 | ld BASE, L->base
1526 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
1527 | st_vmstate
1528 | beqz AT, >8
1529 |. dsubu RD, TMP3, TMP2
1530 | ld TMP0, L->maxstack
1531 | beqz RD, >6 // No results?
1532 |. daddu TMP1, BASE, RD
1533 | sltu AT, TMP0, TMP1
1534 | bnez AT, >9 // Need to grow stack?
1535 |. daddu TMP3, TMP2, RD
1536 | sd TMP2, L:RA->top // Clear coroutine stack.
1537 | move TMP1, BASE
1538 |5: // Move results from coroutine.
1539 | ld CRET1, 0(TMP2)
1540 | daddiu TMP2, TMP2, 8
1541 | sltu AT, TMP2, TMP3
1542 | sd CRET1, 0(TMP1)
1543 | bnez AT, <5
1544 |. daddiu TMP1, TMP1, 8
1545 |6:
1546 | andi TMP0, PC, FRAME_TYPE
1547 |.if resume
1548 | mov_true TMP1
1549 | daddiu RA, BASE, -8
1550 | sd TMP1, -8(BASE) // Prepend true to results.
1551 | daddiu RD, RD, 16
1552 |.else
1553 | move RA, BASE
1554 | daddiu RD, RD, 8
1555 |.endif
1556 |7:
1557 | sd PC, SAVE_PC
1558 | beqz TMP0, ->BC_RET_Z
1559 |. move MULTRES, RD
1560 | b ->vm_return
1561 |. nop
1562 |
1563 |8: // Coroutine returned with error (at co->top-1).
1564 |.if resume
1565 | daddiu TMP3, TMP3, -8
1566 | mov_false TMP1
1567 | ld CRET1, 0(TMP3)
1568 | sd TMP3, L:RA->top // Remove error from coroutine stack.
1569 | li RD, (2+1)*8
1570 | sd TMP1, -8(BASE) // Prepend false to results.
1571 | daddiu RA, BASE, -8
1572 | sd CRET1, 0(BASE) // Copy error message.
1573 | b <7
1574 |. andi TMP0, PC, FRAME_TYPE
1575 |.else
1576 | load_got lj_ffh_coroutine_wrap_err
1577 | move CARG2, L:RA
1578 | call_intern lj_ffh_coroutine_wrap_err // (lua_State *L, lua_State *co)
1579 |. move CARG1, L
1580 |.endif
1581 |
1582 |9: // Handle stack expansion on return from yield.
1583 | load_got lj_state_growstack
1584 | srl CARG2, RD, 3
1585 | call_intern lj_state_growstack // (lua_State *L, int n)
1586 |. move CARG1, L
1587 | b <4
1588 |. li CRET1, 0
1589 |.endmacro
1590 |
1591 | coroutine_resume_wrap 1 // coroutine.resume
1592 | coroutine_resume_wrap 0 // coroutine.wrap
1593 |
1594 |.ffunc coroutine_yield
1595 | ld TMP0, L->cframe
1596 | daddu TMP1, BASE, NARGS8:RC
1597 | sd BASE, L->base
1598 | andi TMP0, TMP0, CFRAME_RESUME
1599 | sd TMP1, L->top
1600 | beqz TMP0, ->fff_fallback
1601 |. li CRET1, LUA_YIELD
1602 | sd r0, L->cframe
1603 | b ->vm_leave_unw
1604 |. sb CRET1, L->status
1605 |
1606 |//-- Math library -------------------------------------------------------
1607 |
1608 |.ffunc_1 math_abs
1609 | gettp CARG2, CARG1
1610 | daddiu AT, CARG2, -LJ_TISNUM
1611 | bnez AT, >1
1612 |. sextw TMP1, CARG1
1613 | sra TMP0, TMP1, 31 // Extract sign.
1614 | xor TMP1, TMP1, TMP0
1615 | dsubu CARG1, TMP1, TMP0
1616 | dsll TMP3, CARG1, 32
1617 | bgez TMP3, ->fff_restv
1618 |. settp CARG1, TISNUM
1619 | li CARG1, 0x41e0 // 2^31 as a double.
1620 | b ->fff_restv
1621 |. dsll CARG1, CARG1, 48
1622 |1:
1623 | sltiu AT, CARG2, LJ_TISNUM
1624 | beqz AT, ->fff_fallback
1625 |. dextm CARG1, CARG1, 0, 30
1626 |// fallthrough
1627 |
1628 |->fff_restv:
1629 | // CARG1 = TValue result.
1630 | ld PC, FRAME_PC(BASE)
1631 | daddiu RA, BASE, -16
1632 | sd CARG1, -16(BASE)
1633 |->fff_res1:
1634 | // RA = results, PC = return.
1635 | li RD, (1+1)*8
1636 |->fff_res:
1637 | // RA = results, RD = (nresults+1)*8, PC = return.
1638 | andi TMP0, PC, FRAME_TYPE
1639 | bnez TMP0, ->vm_return
1640 |. move MULTRES, RD
1641 | lw INS, -4(PC)
1642 | decode_RB8a RB, INS
1643 | decode_RB8b RB
1644 |5:
1645 | sltu AT, RD, RB
1646 | bnez AT, >6 // More results expected?
1647 |. decode_RA8a TMP0, INS
1648 | decode_RA8b TMP0
1649 | ins_next1
1650 | // Adjust BASE. KBASE is assumed to be set for the calling frame.
1651 | dsubu BASE, RA, TMP0
1652 | ins_next2
1653 |
1654 |6: // Fill up results with nil.
1655 | daddu TMP1, RA, RD
1656 | daddiu RD, RD, 8
1657 | b <5
1658 |. sd TISNIL, -8(TMP1)
1659 |
1660 |.macro math_extern, func
1661 | .ffunc_n math_ .. func
1662 | load_got func
1663 | call_extern
1664 |. nop
1665 | b ->fff_resn
1666 |. nop
1667 |.endmacro
1668 |
1669 |.macro math_extern2, func
1670 | .ffunc_nn math_ .. func
1671 |. load_got func
1672 | call_extern
1673 |. nop
1674 | b ->fff_resn
1675 |. nop
1676 |.endmacro
1677 |
1678 |// TODO: Return integer type if result is integer (own sf implementation).
1679 |.macro math_round, func
1680 |->ff_math_ .. func:
1681 | ld CARG1, 0(BASE)
1682 | beqz NARGS8:RC, ->fff_fallback
1683 |. gettp TMP0, CARG1
1684 | beq TMP0, TISNUM, ->fff_restv
1685 |. sltu AT, TMP0, TISNUM
1686 | beqz AT, ->fff_fallback
1687 |.if FPU
1688 |. ldc1 FARG1, 0(BASE)
1689 | bal ->vm_ .. func
1690 |. nop
1691 |.else
1692 |. load_got func
1693 | call_extern
1694 |. nop
1695 |.endif
1696 | b ->fff_resn
1697 |. nop
1698 |.endmacro
1699 |
1700 | math_round floor
1701 | math_round ceil
1702 |
1703 |.ffunc math_log
1704 | li AT, 8
1705 | bne NARGS8:RC, AT, ->fff_fallback // Exactly 1 argument.
1706 |. ld CARG1, 0(BASE)
1707 | checknum CARG1, ->fff_fallback
1708 |. load_got log
1709 |.if FPU
1710 | call_extern
1711 |. ldc1 FARG1, 0(BASE)
1712 |.else
1713 | call_extern
1714 |. nop
1715 |.endif
1716 | b ->fff_resn
1717 |. nop
1718 |
1719 | math_extern log10
1720 | math_extern exp
1721 | math_extern sin
1722 | math_extern cos
1723 | math_extern tan
1724 | math_extern asin
1725 | math_extern acos
1726 | math_extern atan
1727 | math_extern sinh
1728 | math_extern cosh
1729 | math_extern tanh
1730 | math_extern2 pow
1731 | math_extern2 atan2
1732 | math_extern2 fmod
1733 |
1734 |.if FPU
1735 |.ffunc_n math_sqrt
1736 |. sqrt.d FRET1, FARG1
1737 |// fallthrough to ->fff_resn
1738 |.else
1739 | math_extern sqrt
1740 |.endif
1741 |
1742 |->fff_resn:
1743 | ld PC, FRAME_PC(BASE)
1744 | daddiu RA, BASE, -16
1745 | b ->fff_res1
1746 |.if FPU
1747 |. sdc1 FRET1, 0(RA)
1748 |.else
1749 |. sd CRET1, 0(RA)
1750 |.endif
1751 |
1752 |
1753 |.ffunc_2 math_ldexp
1754 | checknum CARG1, ->fff_fallback
1755 | checkint CARG2, ->fff_fallback
1756 |. load_got ldexp
1757 | .FPU ldc1 FARG1, 0(BASE)
1758 | call_extern
1759 |. lw CARG2, 8+LO(BASE)
1760 | b ->fff_resn
1761 |. nop
1762 |
1763 |.ffunc_n math_frexp
1764 | load_got frexp
1765 | ld PC, FRAME_PC(BASE)
1766 | call_extern
1767 |. daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
1768 | lw TMP1, DISPATCH_GL(tmptv)(DISPATCH)
1769 | daddiu RA, BASE, -16
1770 |.if FPU
1771 | mtc1 TMP1, FARG2
1772 | sdc1 FRET1, 0(RA)
1773 | cvt.d.w FARG2, FARG2
1774 | sdc1 FARG2, 8(RA)
1775 |.else
1776 | sd CRET1, 0(RA)
1777 | zextw TMP1, TMP1
1778 | settp TMP1, TISNUM
1779 | sd TMP1, 8(RA)
1780 |.endif
1781 | b ->fff_res
1782 |. li RD, (2+1)*8
1783 |
1784 |.ffunc_n math_modf
1785 | load_got modf
1786 | ld PC, FRAME_PC(BASE)
1787 | call_extern
1788 |. daddiu CARG2, BASE, -16
1789 | daddiu RA, BASE, -16
1790 |.if FPU
1791 | sdc1 FRET1, -8(BASE)
1792 |.else
1793 | sd CRET1, -8(BASE)
1794 |.endif
1795 | b ->fff_res
1796 |. li RD, (2+1)*8
1797 |
1798 |.macro math_minmax, name, intins, intinsc, fpins
1799 | .ffunc_1 name
1800 | daddu TMP3, BASE, NARGS8:RC
1801 | checkint CARG1, >5
1802 |. daddiu TMP2, BASE, 8
1803 |1: // Handle integers.
1804 | beq TMP2, TMP3, ->fff_restv
1805 |. ld CARG2, 0(TMP2)
1806 | checkint CARG2, >3
1807 |. sextw CARG1, CARG1
1808 | lw CARG2, LO(TMP2)
1809 |. slt AT, CARG1, CARG2
1810 |.if MIPSR6
1811 | intins TMP1, CARG2, AT
1812 | intinsc CARG1, CARG1, AT
1813 | or CARG1, CARG1, TMP1
1814 |.else
1815 | intins CARG1, CARG2, AT
1816 |.endif
1817 | daddiu TMP2, TMP2, 8
1818 | zextw CARG1, CARG1
1819 | b <1
1820 |. settp CARG1, TISNUM
1821 |
1822 |3: // Convert intermediate result to number and continue with number loop.
1823 | checknum CARG2, ->fff_fallback
1824 |.if FPU
1825 |. mtc1 CARG1, FRET1
1826 | cvt.d.w FRET1, FRET1
1827 | b >7
1828 |. ldc1 FARG1, 0(TMP2)
1829 |.else
1830 |. nop
1831 | bal ->vm_sfi2d_1
1832 |. nop
1833 | b >7
1834 |. nop
1835 |.endif
1836 |
1837 |5:
1838 | .FPU ldc1 FRET1, 0(BASE)
1839 | checknum CARG1, ->fff_fallback
1840 |6: // Handle numbers.
1841 |. ld CARG2, 0(TMP2)
1842 | beq TMP2, TMP3, ->fff_resn
1843 |.if FPU
1844 | ldc1 FARG1, 0(TMP2)
1845 |.else
1846 | move CRET1, CARG1
1847 |.endif
1848 | checknum CARG2, >8
1849 |. nop
1850 |7:
1851 |.if FPU
1852 |.if MIPSR6
1853 | fpins FRET1, FRET1, FARG1
1854 |.else
1855 | c.olt.d FRET1, FARG1
1856 | fpins FRET1, FARG1
1857 |.endif
1858 |.else
1859 | bal ->vm_sfcmpolt
1860 |. nop
1861 |.if MIPSR6
1862 | intins AT, CARG2, CRET1
1863 | intinsc CARG1, CARG1, CRET1
1864 | or CARG1, CARG1, AT
1865 |.else
1866 | intins CARG1, CARG2, CRET1
1867 |.endif
1868 |.endif
1869 | b <6
1870 |. daddiu TMP2, TMP2, 8
1871 |
1872 |8: // Convert integer to number and continue with number loop.
1873 | checkint CARG2, ->fff_fallback
1874 |.if FPU
1875 |. lwc1 FARG1, LO(TMP2)
1876 | b <7
1877 |. cvt.d.w FARG1, FARG1
1878 |.else
1879 |. lw CARG2, LO(TMP2)
1880 | bal ->vm_sfi2d_2
1881 |. nop
1882 | b <7
1883 |. nop
1884 |.endif
1885 |
1886 |.endmacro
1887 |
1888 |.if MIPSR6
1889 | math_minmax math_min, seleqz, selnez, min.d
1890 | math_minmax math_max, selnez, seleqz, max.d
1891 |.else
1892 | math_minmax math_min, movz, _, movf.d
1893 | math_minmax math_max, movn, _, movt.d
1894 |.endif
1895 |
1896 |//-- String library -----------------------------------------------------
1897 |
1898 |.ffunc string_byte // Only handle the 1-arg case here.
1899 | ld CARG1, 0(BASE)
1900 | gettp TMP0, CARG1
1901 | xori AT, NARGS8:RC, 8
1902 | daddiu TMP0, TMP0, -LJ_TSTR
1903 | or AT, AT, TMP0
1904 | bnez AT, ->fff_fallback // Need exactly 1 string argument.
1905 |. cleartp STR:CARG1
1906 | lw TMP0, STR:CARG1->len
1907 | daddiu RA, BASE, -16
1908 | ld PC, FRAME_PC(BASE)
1909 | sltu RD, r0, TMP0
1910 | lbu TMP1, STR:CARG1[1] // Access is always ok (NUL at end).
1911 | addiu RD, RD, 1
1912 | sll RD, RD, 3 // RD = ((str->len != 0)+1)*8
1913 | settp TMP1, TISNUM
1914 | b ->fff_res
1915 |. sd TMP1, 0(RA)
1916 |
1917 |.ffunc string_char // Only handle the 1-arg case here.
1918 | ffgccheck
1919 |.if not MIPSR6
1920 |. nop
1921 |.endif
1922 | ld CARG1, 0(BASE)
1923 | gettp TMP0, CARG1
1924 | xori AT, NARGS8:RC, 8 // Exactly 1 argument.
1925 | daddiu TMP0, TMP0, -LJ_TISNUM // Integer.
1926 | li TMP1, 255
1927 | sextw CARG1, CARG1
1928 | or AT, AT, TMP0
1929 | sltu TMP1, TMP1, CARG1 // !(255 < n).
1930 | or AT, AT, TMP1
1931 | bnez AT, ->fff_fallback
1932 |. li CARG3, 1
1933 | daddiu CARG2, sp, TMPD_OFS
1934 | sb CARG1, TMPD
1935 |->fff_newstr:
1936 | load_got lj_str_new
1937 | sd BASE, L->base
1938 | sd PC, SAVE_PC
1939 | call_intern lj_str_new // (lua_State *L, char *str, size_t l)
1940 |. move CARG1, L
1941 | // Returns GCstr *.
1942 | ld BASE, L->base
1943 |->fff_resstr:
1944 | li AT, LJ_TSTR
1945 | settp CRET1, AT
1946 | b ->fff_restv
1947 |. move CARG1, CRET1
1948 |
1949 |.ffunc string_sub
1950 | ffgccheck
1951 |.if not MIPSR6
1952 |. nop
1953 |.endif
1954 | addiu AT, NARGS8:RC, -16
1955 | ld TMP0, 0(BASE)
1956 | bltz AT, ->fff_fallback
1957 |. gettp TMP3, TMP0
1958 | cleartp STR:CARG1, TMP0
1959 | ld CARG2, 8(BASE)
1960 | beqz AT, >1
1961 |. li CARG4, -1
1962 | ld CARG3, 16(BASE)
1963 | checkint CARG3, ->fff_fallback
1964 |. sextw CARG4, CARG3
1965 |1:
1966 | checkint CARG2, ->fff_fallback
1967 |. li AT, LJ_TSTR
1968 | bne TMP3, AT, ->fff_fallback
1969 |. sextw CARG3, CARG2
1970 | lw CARG2, STR:CARG1->len
1971 | // STR:CARG1 = str, CARG2 = str->len, CARG3 = start, CARG4 = end
1972 | slt AT, CARG4, r0
1973 | addiu TMP0, CARG2, 1
1974 | addu TMP1, CARG4, TMP0
1975 | slt TMP3, CARG3, r0
1976 |.if MIPSR6
1977 | seleqz CARG4, CARG4, AT
1978 | selnez TMP1, TMP1, AT
1979 | or CARG4, TMP1, CARG4 // if (end < 0) end += len+1
1980 |.else
1981 | movn CARG4, TMP1, AT // if (end < 0) end += len+1
1982 |.endif
1983 | addu TMP1, CARG3, TMP0
1984 |.if MIPSR6
1985 | selnez TMP1, TMP1, TMP3
1986 | seleqz CARG3, CARG3, TMP3
1987 | or CARG3, TMP1, CARG3 // if (start < 0) start += len+1
1988 | li TMP2, 1
1989 | slt AT, CARG4, r0
1990 | slt TMP3, r0, CARG3
1991 | seleqz CARG4, CARG4, AT // if (end < 0) end = 0
1992 | selnez CARG3, CARG3, TMP3
1993 | seleqz TMP2, TMP2, TMP3
1994 | or CARG3, TMP2, CARG3 // if (start < 1) start = 1
1995 | slt AT, CARG2, CARG4
1996 | seleqz CARG4, CARG4, AT
1997 | selnez CARG2, CARG2, AT
1998 | or CARG4, CARG2, CARG4 // if (end > len) end = len
1999 |.else
2000 | movn CARG3, TMP1, TMP3 // if (start < 0) start += len+1
2001 | li TMP2, 1
2002 | slt AT, CARG4, r0
2003 | slt TMP3, r0, CARG3
2004 | movn CARG4, r0, AT // if (end < 0) end = 0
2005 | movz CARG3, TMP2, TMP3 // if (start < 1) start = 1
2006 | slt AT, CARG2, CARG4
2007 | movn CARG4, CARG2, AT // if (end > len) end = len
2008 |.endif
2009 | daddu CARG2, STR:CARG1, CARG3
2010 | subu CARG3, CARG4, CARG3 // len = end - start
2011 | daddiu CARG2, CARG2, sizeof(GCstr)-1
2012 | bgez CARG3, ->fff_newstr
2013 |. addiu CARG3, CARG3, 1 // len++
2014 |->fff_emptystr: // Return empty string.
2015 | li AT, LJ_TSTR
2016 | daddiu STR:CARG1, DISPATCH, DISPATCH_GL(strempty)
2017 | b ->fff_restv
2018 |. settp CARG1, AT
2019 |
2020 |.macro ffstring_op, name
2021 | .ffunc string_ .. name
2022 | ffgccheck
2023 |. nop
2024 | beqz NARGS8:RC, ->fff_fallback
2025 |. ld CARG2, 0(BASE)
2026 | checkstr STR:CARG2, ->fff_fallback
2027 | daddiu SBUF:CARG1, DISPATCH, DISPATCH_GL(tmpbuf)
2028 | load_got lj_buf_putstr_ .. name
2029 | ld TMP0, SBUF:CARG1->b
2030 | sd L, SBUF:CARG1->L
2031 | sd BASE, L->base
2032 | sd TMP0, SBUF:CARG1->p
2033 | call_intern extern lj_buf_putstr_ .. name
2034 |. sd PC, SAVE_PC
2035 | load_got lj_buf_tostr
2036 | call_intern lj_buf_tostr
2037 |. move SBUF:CARG1, SBUF:CRET1
2038 | b ->fff_resstr
2039 |. ld BASE, L->base
2040 |.endmacro
2041 |
2042 |ffstring_op reverse
2043 |ffstring_op lower
2044 |ffstring_op upper
2045 |
2046 |//-- Bit library --------------------------------------------------------
2047 |
2048 |->vm_tobit_fb:
2049 | beqz TMP1, ->fff_fallback
2050 |.if FPU
2051 |. ldc1 FARG1, 0(BASE)
2052 | add.d FARG1, FARG1, TOBIT
2053 | mfc1 CRET1, FARG1
2054 | jr ra
2055 |. zextw CRET1, CRET1
2056 |.else
2057 |// FP number to bit conversion for soft-float.
2058 |->vm_tobit:
2059 | dsll TMP0, CARG1, 1
2060 | li CARG3, 1076
2061 | dsrl AT, TMP0, 53
2062 | dsubu CARG3, CARG3, AT
2063 | sltiu AT, CARG3, 54
2064 | beqz AT, >1
2065 |. dextm TMP0, TMP0, 0, 20
2066 | dinsu TMP0, AT, 21, 21
2067 | slt AT, CARG1, r0
2068 | dsrlv CRET1, TMP0, CARG3
2069 | dsubu TMP0, r0, CRET1
2070 |.if MIPSR6
2071 | selnez TMP0, TMP0, AT
2072 | seleqz CRET1, CRET1, AT
2073 | or CRET1, CRET1, TMP0
2074 |.else
2075 | movn CRET1, TMP0, AT
2076 |.endif
2077 | jr ra
2078 |. zextw CRET1, CRET1
2079 |1:
2080 | jr ra
2081 |. move CRET1, r0
2082 |
2083 |// FP number to int conversion with a check for soft-float.
2084 |// Modifies CARG1, CRET1, CRET2, TMP0, AT.
2085 |->vm_tointg:
2086 |.if JIT
2087 | dsll CRET2, CARG1, 1
2088 | beqz CRET2, >2
2089 |. li TMP0, 1076
2090 | dsrl AT, CRET2, 53
2091 | dsubu TMP0, TMP0, AT
2092 | sltiu AT, TMP0, 54
2093 | beqz AT, >1
2094 |. dextm CRET2, CRET2, 0, 20
2095 | dinsu CRET2, AT, 21, 21
2096 | slt AT, CARG1, r0
2097 | dsrlv CRET1, CRET2, TMP0
2098 | dsubu CARG1, r0, CRET1
2099 |.if MIPSR6
2100 | seleqz CRET1, CRET1, AT
2101 | selnez CARG1, CARG1, AT
2102 | or CRET1, CRET1, CARG1
2103 |.else
2104 | movn CRET1, CARG1, AT
2105 |.endif
2106 | li CARG1, 64
2107 | subu TMP0, CARG1, TMP0
2108 | dsllv CRET2, CRET2, TMP0 // Integer check.
2109 | sextw AT, CRET1
2110 | xor AT, CRET1, AT // Range check.
2111 | jr ra
2112 |.if MIPSR6
2113 | seleqz AT, AT, CRET2
2114 | selnez CRET2, CRET2, CRET2
2115 | jr ra
2116 |. or CRET2, AT, CRET2
2117 |.else
2118 | jr ra
2119 |. movz CRET2, AT, CRET2
2120 |.endif
2121 |1:
2122 | jr ra
2123 |. li CRET2, 1
2124 |2:
2125 | jr ra
2126 |. move CRET1, r0
2127 |.endif
2128 |.endif
2129 |
2130 |.macro .ffunc_bit, name
2131 | .ffunc_1 bit_..name
2132 | gettp TMP0, CARG1
2133 | beq TMP0, TISNUM, >6
2134 |. zextw CRET1, CARG1
2135 | bal ->vm_tobit_fb
2136 |. sltiu TMP1, TMP0, LJ_TISNUM
2137 |6:
2138 |.endmacro
2139 |
2140 |.macro .ffunc_bit_op, name, bins
2141 | .ffunc_bit name
2142 | daddiu TMP2, BASE, 8
2143 | daddu TMP3, BASE, NARGS8:RC
2144 |1:
2145 | beq TMP2, TMP3, ->fff_resi
2146 |. ld CARG1, 0(TMP2)
2147 | gettp TMP0, CARG1
2148 |.if FPU
2149 | bne TMP0, TISNUM, >2
2150 |. daddiu TMP2, TMP2, 8
2151 | zextw CARG1, CARG1
2152 | b <1
2153 |. bins CRET1, CRET1, CARG1
2154 |2:
2155 | ldc1 FARG1, -8(TMP2)
2156 | sltiu AT, TMP0, LJ_TISNUM
2157 | beqz AT, ->fff_fallback
2158 |. add.d FARG1, FARG1, TOBIT
2159 | mfc1 CARG1, FARG1
2160 | zextw CARG1, CARG1
2161 | b <1
2162 |. bins CRET1, CRET1, CARG1
2163 |.else
2164 | beq TMP0, TISNUM, >2
2165 |. move CRET2, CRET1
2166 | bal ->vm_tobit_fb
2167 |. sltiu TMP1, TMP0, LJ_TISNUM
2168 | move CARG1, CRET2
2169 |2:
2170 | zextw CARG1, CARG1
2171 | bins CRET1, CRET1, CARG1
2172 | b <1
2173 |. daddiu TMP2, TMP2, 8
2174 |.endif
2175 |.endmacro
2176 |
2177 |.ffunc_bit_op band, and
2178 |.ffunc_bit_op bor, or
2179 |.ffunc_bit_op bxor, xor
2180 |
2181 |.ffunc_bit bswap
2182 | dsrl TMP0, CRET1, 8
2183 | dsrl TMP1, CRET1, 24
2184 | andi TMP2, TMP0, 0xff00
2185 | dins TMP1, CRET1, 24, 31
2186 | dins TMP2, TMP0, 16, 23
2187 | b ->fff_resi
2188 |. or CRET1, TMP1, TMP2
2189 |
2190 |.ffunc_bit bnot
2191 | not CRET1, CRET1
2192 | b ->fff_resi
2193 |. zextw CRET1, CRET1
2194 |
2195 |.macro .ffunc_bit_sh, name, shins, shmod
2196 | .ffunc_2 bit_..name
2197 | gettp TMP0, CARG1
2198 | beq TMP0, TISNUM, >1
2199 |. nop
2200 | bal ->vm_tobit_fb
2201 |. sltiu TMP1, TMP0, LJ_TISNUM
2202 | move CARG1, CRET1
2203 |1:
2204 | gettp TMP0, CARG2
2205 | bne TMP0, TISNUM, ->fff_fallback
2206 |. zextw CARG2, CARG2
2207 | sextw CARG1, CARG1
2208 |.if shmod == 1
2209 | negu CARG2, CARG2
2210 |.endif
2211 | shins CRET1, CARG1, CARG2
2212 | b ->fff_resi
2213 |. zextw CRET1, CRET1
2214 |.endmacro
2215 |
2216 |.ffunc_bit_sh lshift, sllv, 0
2217 |.ffunc_bit_sh rshift, srlv, 0
2218 |.ffunc_bit_sh arshift, srav, 0
2219 |.ffunc_bit_sh rol, rotrv, 1
2220 |.ffunc_bit_sh ror, rotrv, 0
2221 |
2222 |.ffunc_bit tobit
2223 |->fff_resi:
2224 | ld PC, FRAME_PC(BASE)
2225 | daddiu RA, BASE, -16
2226 | settp CRET1, TISNUM
2227 | b ->fff_res1
2228 |. sd CRET1, -16(BASE)
2229 |
2230 |//-----------------------------------------------------------------------
2231 |->fff_fallback: // Call fast function fallback handler.
2232 | // BASE = new base, RB = CFUNC, RC = nargs*8
2233 | ld TMP3, CFUNC:RB->f
2234 | daddu TMP1, BASE, NARGS8:RC
2235 | ld PC, FRAME_PC(BASE) // Fallback may overwrite PC.
2236 | daddiu TMP0, TMP1, 8*LUA_MINSTACK
2237 | ld TMP2, L->maxstack
2238 | sd PC, SAVE_PC // Redundant (but a defined value).
2239 | sltu AT, TMP2, TMP0
2240 | sd BASE, L->base
2241 | sd TMP1, L->top
2242 | bnez AT, >5 // Need to grow stack.
2243 |. move CFUNCADDR, TMP3
2244 | jalr TMP3 // (lua_State *L)
2245 |. move CARG1, L
2246 | // Either throws an error, or recovers and returns -1, 0 or nresults+1.
2247 | ld BASE, L->base
2248 | sll RD, CRET1, 3
2249 | bgtz CRET1, ->fff_res // Returned nresults+1?
2250 |. daddiu RA, BASE, -16
2251 |1: // Returned 0 or -1: retry fast path.
2252 | ld LFUNC:RB, FRAME_FUNC(BASE)
2253 | ld TMP0, L->top
2254 | cleartp LFUNC:RB
2255 | bnez CRET1, ->vm_call_tail // Returned -1?
2256 |. dsubu NARGS8:RC, TMP0, BASE
2257 | ins_callt // Returned 0: retry fast path.
2258 |
2259 |// Reconstruct previous base for vmeta_call during tailcall.
2260 |->vm_call_tail:
2261 | andi TMP0, PC, FRAME_TYPE
2262 | li AT, -4
2263 | bnez TMP0, >3
2264 |. and TMP1, PC, AT
2265 | lbu TMP1, OFS_RA(PC)
2266 | sll TMP1, TMP1, 3
2267 | addiu TMP1, TMP1, 16
2268 |3:
2269 | b ->vm_call_dispatch // Resolve again for tailcall.
2270 |. dsubu TMP2, BASE, TMP1
2271 |
2272 |5: // Grow stack for fallback handler.
2273 | load_got lj_state_growstack
2274 | li CARG2, LUA_MINSTACK
2275 | call_intern lj_state_growstack // (lua_State *L, int n)
2276 |. move CARG1, L
2277 | ld BASE, L->base
2278 | b <1
2279 |. li CRET1, 0 // Force retry.
2280 |
2281 |->fff_gcstep: // Call GC step function.
2282 | // BASE = new base, RC = nargs*8
2283 | move MULTRES, ra
2284 | load_got lj_gc_step
2285 | sd BASE, L->base
2286 | daddu TMP0, BASE, NARGS8:RC
2287 | sd PC, SAVE_PC // Redundant (but a defined value).
2288 | sd TMP0, L->top
2289 | call_intern lj_gc_step // (lua_State *L)
2290 |. move CARG1, L
2291 | ld BASE, L->base
2292 | move ra, MULTRES
2293 | ld TMP0, L->top
2294 | ld CFUNC:RB, FRAME_FUNC(BASE)
2295 | cleartp CFUNC:RB
2296 | jr ra
2297 |. dsubu NARGS8:RC, TMP0, BASE
2298 |
2299 |//-----------------------------------------------------------------------
2300 |//-- Special dispatch targets -------------------------------------------
2301 |//-----------------------------------------------------------------------
2302 |
2303 |->vm_record: // Dispatch target for recording phase.
2304 |.if JIT
2305 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
2306 | andi AT, TMP3, HOOK_VMEVENT // No recording while in vmevent.
2307 | bnez AT, >5
2308 | // Decrement the hookcount for consistency, but always do the call.
2309 |. lw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2310 | andi AT, TMP3, HOOK_ACTIVE
2311 | bnez AT, >1
2312 |. addiu TMP2, TMP2, -1
2313 | andi AT, TMP3, LUA_MASKLINE|LUA_MASKCOUNT
2314 | beqz AT, >1
2315 |. nop
2316 | b >1
2317 |. sw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2318 |.endif
2319 |
2320 |->vm_rethook: // Dispatch target for return hooks.
2321 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
2322 | andi AT, TMP3, HOOK_ACTIVE // Hook already active?
2323 | beqz AT, >1
2324 |5: // Re-dispatch to static ins.
2325 |. ld AT, GG_DISP2STATIC(TMP0) // Assumes TMP0 holds DISPATCH+OP*4.
2326 | jr AT
2327 |. nop
2328 |
2329 |->vm_inshook: // Dispatch target for instr/line hooks.
2330 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
2331 | lw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2332 | andi AT, TMP3, HOOK_ACTIVE // Hook already active?
2333 | bnez AT, <5
2334 |. andi AT, TMP3, LUA_MASKLINE|LUA_MASKCOUNT
2335 | beqz AT, <5
2336 |. addiu TMP2, TMP2, -1
2337 | beqz TMP2, >1
2338 |. sw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2339 | andi AT, TMP3, LUA_MASKLINE
2340 | beqz AT, <5
2341 |1:
2342 |. load_got lj_dispatch_ins
2343 | sw MULTRES, SAVE_MULTRES
2344 | move CARG2, PC
2345 | sd BASE, L->base
2346 | // SAVE_PC must hold the _previous_ PC. The callee updates it with PC.
2347 | call_intern lj_dispatch_ins // (lua_State *L, const BCIns *pc)
2348 |. move CARG1, L
2349 |3:
2350 | ld BASE, L->base
2351 |4: // Re-dispatch to static ins.
2352 | lw INS, -4(PC)
2353 | decode_OP8a TMP1, INS
2354 | decode_OP8b TMP1
2355 | daddu TMP0, DISPATCH, TMP1
2356 | decode_RD8a RD, INS
2357 | ld AT, GG_DISP2STATIC(TMP0)
2358 | decode_RA8a RA, INS
2359 | decode_RD8b RD
2360 | jr AT
2361 | decode_RA8b RA
2362 |
2363 |->cont_hook: // Continue from hook yield.
2364 | daddiu PC, PC, 4
2365 | b <4
2366 |. lw MULTRES, -24+LO(RB) // Restore MULTRES for *M ins.
2367 |
2368 |->vm_hotloop: // Hot loop counter underflow.
2369 |.if JIT
2370 | ld LFUNC:TMP1, FRAME_FUNC(BASE)
2371 | daddiu CARG1, DISPATCH, GG_DISP2J
2372 | cleartp LFUNC:TMP1
2373 | sd PC, SAVE_PC
2374 | ld TMP1, LFUNC:TMP1->pc
2375 | move CARG2, PC
2376 | sd L, DISPATCH_J(L)(DISPATCH)
2377 | lbu TMP1, PC2PROTO(framesize)(TMP1)
2378 | load_got lj_trace_hot
2379 | sd BASE, L->base
2380 | dsll TMP1, TMP1, 3
2381 | daddu TMP1, BASE, TMP1
2382 | call_intern lj_trace_hot // (jit_State *J, const BCIns *pc)
2383 |. sd TMP1, L->top
2384 | b <3
2385 |. nop
2386 |.endif
2387 |
2388 |
2389 |->vm_callhook: // Dispatch target for call hooks.
2390 |.if JIT
2391 | b >1
2392 |.endif
2393 |. move CARG2, PC
2394 |
2395 |->vm_hotcall: // Hot call counter underflow.
2396 |.if JIT
2397 | ori CARG2, PC, 1
2398 |1:
2399 |.endif
2400 | load_got lj_dispatch_call
2401 | daddu TMP0, BASE, RC
2402 | sd PC, SAVE_PC
2403 | sd BASE, L->base
2404 | dsubu RA, RA, BASE
2405 | sd TMP0, L->top
2406 | call_intern lj_dispatch_call // (lua_State *L, const BCIns *pc)
2407 |. move CARG1, L
2408 | // Returns ASMFunction.
2409 | ld BASE, L->base
2410 | ld TMP0, L->top
2411 | sd r0, SAVE_PC // Invalidate for subsequent line hook.
2412 | dsubu NARGS8:RC, TMP0, BASE
2413 | daddu RA, BASE, RA
2414 | ld LFUNC:RB, FRAME_FUNC(BASE)
2415 | cleartp LFUNC:RB
2416 | jr CRET1
2417 |. lw INS, -4(PC)
2418 |
2419 |->cont_stitch: // Trace stitching.
2420 |.if JIT
2421 | // RA = resultptr, RB = meta base
2422 | lw INS, -4(PC)
2423 | ld TRACE:TMP2, -40(RB) // Save previous trace.
2424 | decode_RA8a RC, INS
2425 | daddiu AT, MULTRES, -8
2426 | cleartp TRACE:TMP2
2427 | decode_RA8b RC
2428 | beqz AT, >2
2429 |. daddu RC, BASE, RC // Call base.
2430 |1: // Move results down.
2431 | ld CARG1, 0(RA)
2432 | daddiu AT, AT, -8
2433 | daddiu RA, RA, 8
2434 | sd CARG1, 0(RC)
2435 | bnez AT, <1
2436 |. daddiu RC, RC, 8
2437 |2:
2438 | decode_RA8a RA, INS
2439 | decode_RB8a RB, INS
2440 | decode_RA8b RA
2441 | decode_RB8b RB
2442 | daddu RA, RA, RB
2443 | daddu RA, BASE, RA
2444 |3:
2445 | sltu AT, RC, RA
2446 | bnez AT, >9 // More results wanted?
2447 |. nop
2448 |
2449 | lhu TMP3, TRACE:TMP2->traceno
2450 | lhu RD, TRACE:TMP2->link
2451 | beq RD, TMP3, ->cont_nop // Blacklisted.
2452 |. load_got lj_dispatch_stitch
2453 | bnez RD, =>BC_JLOOP // Jump to stitched trace.
2454 |. sll RD, RD, 3
2455 |
2456 | // Stitch a new trace to the previous trace.
2457 | sw TMP3, DISPATCH_J(exitno)(DISPATCH)
2458 | sd L, DISPATCH_J(L)(DISPATCH)
2459 | sd BASE, L->base
2460 | daddiu CARG1, DISPATCH, GG_DISP2J
2461 | call_intern lj_dispatch_stitch // (jit_State *J, const BCIns *pc)
2462 |. move CARG2, PC
2463 | b ->cont_nop
2464 |. ld BASE, L->base
2465 |
2466 |9:
2467 | sd TISNIL, 0(RC)
2468 | b <3
2469 |. daddiu RC, RC, 8
2470 |.endif
2471 |
2472 |->vm_profhook: // Dispatch target for profiler hook.
2473#if LJ_HASPROFILE
2474 | load_got lj_dispatch_profile
2475 | sw MULTRES, SAVE_MULTRES
2476 | move CARG2, PC
2477 | sd BASE, L->base
2478 | call_intern lj_dispatch_profile // (lua_State *L, const BCIns *pc)
2479 |. move CARG1, L
2480 | // HOOK_PROFILE is off again, so re-dispatch to dynamic instruction.
2481 | daddiu PC, PC, -4
2482 | b ->cont_nop
2483 |. ld BASE, L->base
2484#endif
2485 |
2486 |//-----------------------------------------------------------------------
2487 |//-- Trace exit handler -------------------------------------------------
2488 |//-----------------------------------------------------------------------
2489 |
2490 |.macro savex_, a, b
2491 |.if FPU
2492 | sdc1 f..a, a*8(sp)
2493 | sdc1 f..b, b*8(sp)
2494 | sd r..a, 32*8+a*8(sp)
2495 | sd r..b, 32*8+b*8(sp)
2496 |.else
2497 | sd r..a, a*8(sp)
2498 | sd r..b, b*8(sp)
2499 |.endif
2500 |.endmacro
2501 |
2502 |->vm_exit_handler:
2503 |.if JIT
2504 |.if FPU
2505 | daddiu sp, sp, -(32*8+32*8)
2506 |.else
2507 | daddiu sp, sp, -(32*8)
2508 |.endif
2509 | savex_ 0, 1
2510 | savex_ 2, 3
2511 | savex_ 4, 5
2512 | savex_ 6, 7
2513 | savex_ 8, 9
2514 | savex_ 10, 11
2515 | savex_ 12, 13
2516 | savex_ 14, 15
2517 | savex_ 16, 17
2518 | savex_ 18, 19
2519 | savex_ 20, 21
2520 | savex_ 22, 23
2521 | savex_ 24, 25
2522 | savex_ 26, 27
2523 | savex_ 28, 30
2524 |.if FPU
2525 | sdc1 f29, 29*8(sp)
2526 | sdc1 f31, 31*8(sp)
2527 | sd r0, 32*8+31*8(sp) // Clear RID_TMP.
2528 | daddiu TMP2, sp, 32*8+32*8 // Recompute original value of sp.
2529 | sd TMP2, 32*8+29*8(sp) // Store sp in RID_SP
2530 |.else
2531 | sd r0, 31*8(sp) // Clear RID_TMP.
2532 | daddiu TMP2, sp, 32*8 // Recompute original value of sp.
2533 | sd TMP2, 29*8(sp) // Store sp in RID_SP
2534 |.endif
2535 | li_vmstate EXIT
2536 | daddiu DISPATCH, JGL, -GG_DISP2G-32768
2537 | lw TMP1, 0(TMP2) // Load exit number.
2538 | st_vmstate
2539 | ld L, DISPATCH_GL(cur_L)(DISPATCH)
2540 | ld BASE, DISPATCH_GL(jit_base)(DISPATCH)
2541 | load_got lj_trace_exit
2542 | sd L, DISPATCH_J(L)(DISPATCH)
2543 | sw ra, DISPATCH_J(parent)(DISPATCH) // Store trace number.
2544 | sd BASE, L->base
2545 | sw TMP1, DISPATCH_J(exitno)(DISPATCH) // Store exit number.
2546 | daddiu CARG1, DISPATCH, GG_DISP2J
2547 | sd r0, DISPATCH_GL(jit_base)(DISPATCH)
2548 | call_intern lj_trace_exit // (jit_State *J, ExitState *ex)
2549 |. move CARG2, sp
2550 | // Returns MULTRES (unscaled) or negated error code.
2551 | ld TMP1, L->cframe
2552 | li AT, -4
2553 | ld BASE, L->base
2554 | and sp, TMP1, AT
2555 | ld PC, SAVE_PC // Get SAVE_PC.
2556 | b >1
2557 |. sd L, SAVE_L // Set SAVE_L (on-trace resume/yield).
2558 |.endif
2559 |->vm_exit_interp:
2560 |.if JIT
2561 | // CRET1 = MULTRES or negated error code, BASE, PC and JGL set.
2562 | ld L, SAVE_L
2563 | daddiu DISPATCH, JGL, -GG_DISP2G-32768
2564 | sd BASE, L->base
2565 |1:
2566 | bltz CRET1, >9 // Check for error from exit.
2567 |. ld LFUNC:RB, FRAME_FUNC(BASE)
2568 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
2569 | dsll MULTRES, CRET1, 3
2570 | cleartp LFUNC:RB
2571 | sw MULTRES, SAVE_MULTRES
2572 | li TISNIL, LJ_TNIL
2573 | li TISNUM, LJ_TISNUM // Setup type comparison constants.
2574 | .FPU mtc1 TMP3, TOBIT
2575 | ld TMP1, LFUNC:RB->pc
2576 | sd r0, DISPATCH_GL(jit_base)(DISPATCH)
2577 | ld KBASE, PC2PROTO(k)(TMP1)
2578 | .FPU cvt.d.s TOBIT, TOBIT
2579 | // Modified copy of ins_next which handles function header dispatch, too.
2580 | lw INS, 0(PC)
2581 | daddiu PC, PC, 4
2582 | // Assumes TISNIL == ~LJ_VMST_INTERP == -1
2583 | sw TISNIL, DISPATCH_GL(vmstate)(DISPATCH)
2584 | decode_OP8a TMP1, INS
2585 | decode_OP8b TMP1
2586 | sltiu TMP2, TMP1, BC_FUNCF*8
2587 | daddu TMP0, DISPATCH, TMP1
2588 | decode_RD8a RD, INS
2589 | ld AT, 0(TMP0)
2590 | decode_RA8a RA, INS
2591 | beqz TMP2, >2
2592 |. decode_RA8b RA
2593 | jr AT
2594 |. decode_RD8b RD
2595 |2:
2596 | sltiu TMP2, TMP1, (BC_FUNCC+2)*8 // Fast function?
2597 | bnez TMP2, >3
2598 |. ld TMP1, FRAME_PC(BASE)
2599 | // Check frame below fast function.
2600 | andi TMP0, TMP1, FRAME_TYPE
2601 | bnez TMP0, >3 // Trace stitching continuation?
2602 |. nop
2603 | // Otherwise set KBASE for Lua function below fast function.
2604 | lw TMP2, -4(TMP1)
2605 | decode_RA8a TMP0, TMP2
2606 | decode_RA8b TMP0
2607 | dsubu TMP1, BASE, TMP0
2608 | ld LFUNC:TMP2, -32(TMP1)
2609 | cleartp LFUNC:TMP2
2610 | ld TMP1, LFUNC:TMP2->pc
2611 | ld KBASE, PC2PROTO(k)(TMP1)
2612 |3:
2613 | daddiu RC, MULTRES, -8
2614 | jr AT
2615 |. daddu RA, RA, BASE
2616 |
2617 |9: // Rethrow error from the right C frame.
2618 | load_got lj_err_throw
2619 | negu CARG2, CRET1
2620 | call_intern lj_err_throw // (lua_State *L, int errcode)
2621 |. move CARG1, L
2622 |.endif
2623 |
2624 |//-----------------------------------------------------------------------
2625 |//-- Math helper functions ----------------------------------------------
2626 |//-----------------------------------------------------------------------
2627 |
2628 |// Hard-float round to integer.
2629 |// Modifies AT, TMP0, FRET1, FRET2, f4. Keeps all others incl. FARG1.
2630 |// MIPSR6: Modifies FTMP1, too.
2631 |.macro vm_round_hf, func
2632 | lui TMP0, 0x4330 // Hiword of 2^52 (double).
2633 | dsll TMP0, TMP0, 32
2634 | dmtc1 TMP0, f4
2635 | abs.d FRET2, FARG1 // |x|
2636 | dmfc1 AT, FARG1
2637 |.if MIPSR6
2638 | cmp.lt.d FTMP1, FRET2, f4
2639 | add.d FRET1, FRET2, f4 // (|x| + 2^52) - 2^52
2640 | bc1eqz FTMP1, >1 // Truncate only if |x| < 2^52.
2641 |.else
2642 | c.olt.d 0, FRET2, f4
2643 | add.d FRET1, FRET2, f4 // (|x| + 2^52) - 2^52
2644 | bc1f 0, >1 // Truncate only if |x| < 2^52.
2645 |.endif
2646 |. sub.d FRET1, FRET1, f4
2647 | slt AT, AT, r0
2648 |.if "func" == "ceil"
2649 | lui TMP0, 0xbff0 // Hiword of -1 (double). Preserves -0.
2650 |.else
2651 | lui TMP0, 0x3ff0 // Hiword of +1 (double).
2652 |.endif
2653 |.if "func" == "trunc"
2654 | dsll TMP0, TMP0, 32
2655 | dmtc1 TMP0, f4
2656 |.if MIPSR6
2657 | cmp.lt.d FTMP1, FRET2, FRET1 // |x| < result?
2658 | sub.d FRET2, FRET1, f4
2659 | sel.d FTMP1, FRET1, FRET2 // If yes, subtract +1.
2660 | dmtc1 AT, FRET1
2661 | neg.d FRET2, FTMP1
2662 | jr ra
2663 |. sel.d FRET1, FTMP1, FRET2 // Merge sign bit back in.
2664 |.else
2665 | c.olt.d 0, FRET2, FRET1 // |x| < result?
2666 | sub.d FRET2, FRET1, f4
2667 | movt.d FRET1, FRET2, 0 // If yes, subtract +1.
2668 | neg.d FRET2, FRET1
2669 | jr ra
2670 |. movn.d FRET1, FRET2, AT // Merge sign bit back in.
2671 |.endif
2672 |.else
2673 | neg.d FRET2, FRET1
2674 | dsll TMP0, TMP0, 32
2675 | dmtc1 TMP0, f4
2676 |.if MIPSR6
2677 | dmtc1 AT, FTMP1
2678 | sel.d FTMP1, FRET1, FRET2
2679 |.if "func" == "ceil"
2680 | cmp.lt.d FRET1, FTMP1, FARG1 // x > result?
2681 |.else
2682 | cmp.lt.d FRET1, FARG1, FTMP1 // x < result?
2683 |.endif
2684 | sub.d FRET2, FTMP1, f4 // If yes, subtract +-1.
2685 | jr ra
2686 |. sel.d FRET1, FTMP1, FRET2
2687 |.else
2688 | movn.d FRET1, FRET2, AT // Merge sign bit back in.
2689 |.if "func" == "ceil"
2690 | c.olt.d 0, FRET1, FARG1 // x > result?
2691 |.else
2692 | c.olt.d 0, FARG1, FRET1 // x < result?
2693 |.endif
2694 | sub.d FRET2, FRET1, f4 // If yes, subtract +-1.
2695 | jr ra
2696 |. movt.d FRET1, FRET2, 0
2697 |.endif
2698 |.endif
2699 |1:
2700 | jr ra
2701 |. mov.d FRET1, FARG1
2702 |.endmacro
2703 |
2704 |.macro vm_round, func
2705 |.if FPU
2706 | vm_round_hf, func
2707 |.endif
2708 |.endmacro
2709 |
2710 |->vm_floor:
2711 | vm_round floor
2712 |->vm_ceil:
2713 | vm_round ceil
2714 |->vm_trunc:
2715 |.if JIT
2716 | vm_round trunc
2717 |.endif
2718 |
2719 |// Soft-float integer to number conversion.
2720 |.macro sfi2d, ARG
2721 |.if not FPU
2722 | beqz ARG, >9 // Handle zero first.
2723 |. sra TMP0, ARG, 31
2724 | xor TMP1, ARG, TMP0
2725 | dsubu TMP1, TMP1, TMP0 // Absolute value in TMP1.
2726 | dclz ARG, TMP1
2727 | addiu ARG, ARG, -11
2728 | li AT, 0x3ff+63-11-1
2729 | dsllv TMP1, TMP1, ARG // Align mantissa left with leading 1.
2730 | subu ARG, AT, ARG // Exponent - 1.
2731 | ins ARG, TMP0, 11, 11 // Sign | Exponent.
2732 | dsll ARG, ARG, 52 // Align left.
2733 | jr ra
2734 |. daddu ARG, ARG, TMP1 // Add mantissa, increment exponent.
2735 |9:
2736 | jr ra
2737 |. nop
2738 |.endif
2739 |.endmacro
2740 |
2741 |// Input CARG1. Output: CARG1. Temporaries: AT, TMP0, TMP1.
2742 |->vm_sfi2d_1:
2743 | sfi2d CARG1
2744 |
2745 |// Input CARG2. Output: CARG2. Temporaries: AT, TMP0, TMP1.
2746 |->vm_sfi2d_2:
2747 | sfi2d CARG2
2748 |
2749 |// Soft-float comparison. Equivalent to c.eq.d.
2750 |// Input: CARG*. Output: CRET1. Temporaries: AT, TMP0, TMP1.
2751 |->vm_sfcmpeq:
2752 |.if not FPU
2753 | dsll AT, CARG1, 1
2754 | dsll TMP0, CARG2, 1
2755 | or TMP1, AT, TMP0
2756 | beqz TMP1, >8 // Both args +-0: return 1.
2757 |. lui TMP1, 0xffe0
2758 | dsll TMP1, TMP1, 32
2759 | sltu AT, TMP1, AT
2760 | sltu TMP0, TMP1, TMP0
2761 | or TMP1, AT, TMP0
2762 | bnez TMP1, >9 // Either arg is NaN: return 0;
2763 |. xor AT, CARG1, CARG2
2764 | jr ra
2765 |. sltiu CRET1, AT, 1 // Same values: return 1.
2766 |8:
2767 | jr ra
2768 |. li CRET1, 1
2769 |9:
2770 | jr ra
2771 |. li CRET1, 0
2772 |.endif
2773 |
2774 |// Soft-float comparison. Equivalent to c.ult.d and c.olt.d.
2775 |// Input: CARG1, CARG2. Output: CRET1. Temporaries: AT, TMP0, TMP1, CRET2.
2776 |->vm_sfcmpult:
2777 |.if not FPU
2778 | b >1
2779 |. li CRET2, 1
2780 |.endif
2781 |
2782 |->vm_sfcmpolt:
2783 |.if not FPU
2784 | li CRET2, 0
2785 |1:
2786 | dsll AT, CARG1, 1
2787 | dsll TMP0, CARG2, 1
2788 | or TMP1, AT, TMP0
2789 | beqz TMP1, >8 // Both args +-0: return 0.
2790 |. lui TMP1, 0xffe0
2791 | dsll TMP1, TMP1, 32
2792 | sltu AT, TMP1, AT
2793 | sltu TMP0, TMP1, TMP0
2794 | or TMP1, AT, TMP0
2795 | bnez TMP1, >9 // Either arg is NaN: return 0 or 1;
2796 |. and AT, CARG1, CARG2
2797 | bltz AT, >5 // Both args negative?
2798 |. nop
2799 | jr ra
2800 |. slt CRET1, CARG1, CARG2
2801 |5: // Swap conditions if both operands are negative.
2802 | jr ra
2803 |. slt CRET1, CARG2, CARG1
2804 |8:
2805 | jr ra
2806 |. li CRET1, 0
2807 |9:
2808 | jr ra
2809 |. move CRET1, CRET2
2810 |.endif
2811 |
2812 |// Soft-float comparison. Equivalent to c.ole.d a, b or c.ole.d b, a.
2813 |// Input: CARG1, CARG2, TMP3. Output: CRET1. Temporaries: AT, TMP0, TMP1.
2814 |->vm_sfcmpolex:
2815 |.if not FPU
2816 | dsll AT, CARG1, 1
2817 | dsll TMP0, CARG2, 1
2818 | or TMP1, AT, TMP0
2819 | beqz TMP1, >8 // Both args +-0: return 1.
2820 |. lui TMP1, 0xffe0
2821 | dsll TMP1, TMP1, 32
2822 | sltu AT, TMP1, AT
2823 | sltu TMP0, TMP1, TMP0
2824 | or TMP1, AT, TMP0
2825 | bnez TMP1, >9 // Either arg is NaN: return 0;
2826 |. and AT, CARG1, CARG2
2827 | xor AT, AT, TMP3
2828 | bltz AT, >5 // Both args negative?
2829 |. nop
2830 | jr ra
2831 |. slt CRET1, CARG2, CARG1
2832 |5: // Swap conditions if both operands are negative.
2833 | jr ra
2834 |. slt CRET1, CARG1, CARG2
2835 |8:
2836 | jr ra
2837 |. li CRET1, 1
2838 |9:
2839 | jr ra
2840 |. li CRET1, 0
2841 |.endif
2842 |
2843 |.macro sfmin_max, name, intins, intinsc
2844 |->vm_sf .. name:
2845 |.if JIT and not FPU
2846 | move TMP2, ra
2847 | bal ->vm_sfcmpolt
2848 |. nop
2849 | move ra, TMP2
2850 | move TMP0, CRET1
2851 | move CRET1, CARG1
2852 |.if MIPSR6
2853 | intins CRET1, CRET1, TMP0
2854 | intinsc TMP0, CARG2, TMP0
2855 | jr ra
2856 |. or CRET1, CRET1, TMP0
2857 |.else
2858 | jr ra
2859 |. intins CRET1, CARG2, TMP0
2860 |.endif
2861 |.endif
2862 |.endmacro
2863 |
2864 |.if MIPSR6
2865 | sfmin_max min, selnez, seleqz
2866 | sfmin_max max, seleqz, selnez
2867 |.else
2868 | sfmin_max min, movz, _
2869 | sfmin_max max, movn, _
2870 |.endif
2871 |
2872 |//-----------------------------------------------------------------------
2873 |//-- Miscellaneous functions --------------------------------------------
2874 |//-----------------------------------------------------------------------
2875 |
2876 |//-----------------------------------------------------------------------
2877 |//-- FFI helper functions -----------------------------------------------
2878 |//-----------------------------------------------------------------------
2879 |
2880 |// Handler for callback functions. Callback slot number in r1, g in r2.
2881 |->vm_ffi_callback:
2882 |.if FFI
2883 |.type CTSTATE, CTState, PC
2884 | saveregs
2885 | ld CTSTATE, GL:r2->ctype_state
2886 | daddiu DISPATCH, r2, GG_G2DISP
2887 | load_got lj_ccallback_enter
2888 | sw r1, CTSTATE->cb.slot
2889 | sd CARG1, CTSTATE->cb.gpr[0]
2890 | .FPU sdc1 FARG1, CTSTATE->cb.fpr[0]
2891 | sd CARG2, CTSTATE->cb.gpr[1]
2892 | .FPU sdc1 FARG2, CTSTATE->cb.fpr[1]
2893 | sd CARG3, CTSTATE->cb.gpr[2]
2894 | .FPU sdc1 FARG3, CTSTATE->cb.fpr[2]
2895 | sd CARG4, CTSTATE->cb.gpr[3]
2896 | .FPU sdc1 FARG4, CTSTATE->cb.fpr[3]
2897 | sd CARG5, CTSTATE->cb.gpr[4]
2898 | .FPU sdc1 FARG5, CTSTATE->cb.fpr[4]
2899 | sd CARG6, CTSTATE->cb.gpr[5]
2900 | .FPU sdc1 FARG6, CTSTATE->cb.fpr[5]
2901 | sd CARG7, CTSTATE->cb.gpr[6]
2902 | .FPU sdc1 FARG7, CTSTATE->cb.fpr[6]
2903 | sd CARG8, CTSTATE->cb.gpr[7]
2904 | .FPU sdc1 FARG8, CTSTATE->cb.fpr[7]
2905 | daddiu TMP0, sp, CFRAME_SPACE
2906 | sd TMP0, CTSTATE->cb.stack
2907 | sd r0, SAVE_PC // Any value outside of bytecode is ok.
2908 | move CARG2, sp
2909 | call_intern lj_ccallback_enter // (CTState *cts, void *cf)
2910 |. move CARG1, CTSTATE
2911 | // Returns lua_State *.
2912 | ld BASE, L:CRET1->base
2913 | ld RC, L:CRET1->top
2914 | move L, CRET1
2915 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
2916 | ld LFUNC:RB, FRAME_FUNC(BASE)
2917 | .FPU mtc1 TMP3, TOBIT
2918 | li TISNIL, LJ_TNIL
2919 | li TISNUM, LJ_TISNUM
2920 | li_vmstate INTERP
2921 | subu RC, RC, BASE
2922 | cleartp LFUNC:RB
2923 | st_vmstate
2924 | .FPU cvt.d.s TOBIT, TOBIT
2925 | ins_callt
2926 |.endif
2927 |
2928 |->cont_ffi_callback: // Return from FFI callback.
2929 |.if FFI
2930 | load_got lj_ccallback_leave
2931 | ld CTSTATE, DISPATCH_GL(ctype_state)(DISPATCH)
2932 | sd BASE, L->base
2933 | sd RB, L->top
2934 | sd L, CTSTATE->L
2935 | move CARG2, RA
2936 | call_intern lj_ccallback_leave // (CTState *cts, TValue *o)
2937 |. move CARG1, CTSTATE
2938 | .FPU ldc1 FRET1, CTSTATE->cb.fpr[0]
2939 | ld CRET1, CTSTATE->cb.gpr[0]
2940 | .FPU ldc1 FRET2, CTSTATE->cb.fpr[1]
2941 | b ->vm_leave_unw
2942 |. ld CRET2, CTSTATE->cb.gpr[1]
2943 |.endif
2944 |
2945 |->vm_ffi_call: // Call C function via FFI.
2946 | // Caveat: needs special frame unwinding, see below.
2947 |.if FFI
2948 | .type CCSTATE, CCallState, CARG1
2949 | lw TMP1, CCSTATE->spadj
2950 | lbu CARG2, CCSTATE->nsp
2951 | move TMP2, sp
2952 | dsubu sp, sp, TMP1
2953 | sd ra, -8(TMP2)
2954 | sll CARG2, CARG2, 3
2955 | sd r16, -16(TMP2)
2956 | sd CCSTATE, -24(TMP2)
2957 | move r16, TMP2
2958 | daddiu TMP1, CCSTATE, offsetof(CCallState, stack)
2959 | move TMP2, sp
2960 | beqz CARG2, >2
2961 |. daddu TMP3, TMP1, CARG2
2962 |1:
2963 | ld TMP0, 0(TMP1)
2964 | daddiu TMP1, TMP1, 8
2965 | sltu AT, TMP1, TMP3
2966 | sd TMP0, 0(TMP2)
2967 | bnez AT, <1
2968 |. daddiu TMP2, TMP2, 8
2969 |2:
2970 | ld CFUNCADDR, CCSTATE->func
2971 | .FPU ldc1 FARG1, CCSTATE->gpr[0]
2972 | ld CARG2, CCSTATE->gpr[1]
2973 | .FPU ldc1 FARG2, CCSTATE->gpr[1]
2974 | ld CARG3, CCSTATE->gpr[2]
2975 | .FPU ldc1 FARG3, CCSTATE->gpr[2]
2976 | ld CARG4, CCSTATE->gpr[3]
2977 | .FPU ldc1 FARG4, CCSTATE->gpr[3]
2978 | ld CARG5, CCSTATE->gpr[4]
2979 | .FPU ldc1 FARG5, CCSTATE->gpr[4]
2980 | ld CARG6, CCSTATE->gpr[5]
2981 | .FPU ldc1 FARG6, CCSTATE->gpr[5]
2982 | ld CARG7, CCSTATE->gpr[6]
2983 | .FPU ldc1 FARG7, CCSTATE->gpr[6]
2984 | ld CARG8, CCSTATE->gpr[7]
2985 | .FPU ldc1 FARG8, CCSTATE->gpr[7]
2986 | jalr CFUNCADDR
2987 |. ld CARG1, CCSTATE->gpr[0] // Do this last, since CCSTATE is CARG1.
2988 | ld CCSTATE:TMP1, -24(r16)
2989 | ld TMP2, -16(r16)
2990 | ld ra, -8(r16)
2991 | sd CRET1, CCSTATE:TMP1->gpr[0]
2992 | sd CRET2, CCSTATE:TMP1->gpr[1]
2993 |.if FPU
2994 | sdc1 FRET1, CCSTATE:TMP1->fpr[0]
2995 | sdc1 FRET2, CCSTATE:TMP1->fpr[1]
2996 |.else
2997 | sd CARG1, CCSTATE:TMP1->gpr[2] // 2nd FP struct field for soft-float.
2998 |.endif
2999 | move sp, r16
3000 | jr ra
3001 |. move r16, TMP2
3002 |.endif
3003 |// Note: vm_ffi_call must be the last function in this object file!
3004 |
3005 |//-----------------------------------------------------------------------
3006}
3007
3008/* Generate the code for a single instruction. */
3009static void build_ins(BuildCtx *ctx, BCOp op, int defop)
3010{
3011 int vk = 0;
3012 |=>defop:
3013
3014 switch (op) {
3015
3016 /* -- Comparison ops ---------------------------------------------------- */
3017
3018 /* Remember: all ops branch for a true comparison, fall through otherwise. */
3019
3020 case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT:
3021 | // RA = src1*8, RD = src2*8, JMP with RD = target
3022 |.macro bc_comp, FRA, FRD, ARGRA, ARGRD, movop, fmovop, fcomp, sfcomp
3023 | daddu RA, BASE, RA
3024 | daddu RD, BASE, RD
3025 | ld ARGRA, 0(RA)
3026 | ld ARGRD, 0(RD)
3027 | lhu TMP2, OFS_RD(PC)
3028 | gettp CARG3, ARGRA
3029 | gettp CARG4, ARGRD
3030 | bne CARG3, TISNUM, >2
3031 |. daddiu PC, PC, 4
3032 | bne CARG4, TISNUM, >5
3033 |. decode_RD4b TMP2
3034 | sextw ARGRA, ARGRA
3035 | sextw ARGRD, ARGRD
3036 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3037 | slt AT, CARG1, CARG2
3038 | addu TMP2, TMP2, TMP3
3039 |.if MIPSR6
3040 | movop TMP2, TMP2, AT
3041 |.else
3042 | movop TMP2, r0, AT
3043 |.endif
3044 |1:
3045 | daddu PC, PC, TMP2
3046 | ins_next
3047 |
3048 |2: // RA is not an integer.
3049 | sltiu AT, CARG3, LJ_TISNUM
3050 | beqz AT, ->vmeta_comp
3051 |. lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3052 | sltiu AT, CARG4, LJ_TISNUM
3053 | beqz AT, >4
3054 |. decode_RD4b TMP2
3055 |.if FPU
3056 | ldc1 FRA, 0(RA)
3057 | ldc1 FRD, 0(RD)
3058 |.endif
3059 |3: // RA and RD are both numbers.
3060 |.if FPU
3061 |.if MIPSR6
3062 | fcomp FTMP0, FTMP0, FTMP2
3063 | addu TMP2, TMP2, TMP3
3064 | mfc1 TMP3, FTMP0
3065 | b <1
3066 |. fmovop TMP2, TMP2, TMP3
3067 |.else
3068 | fcomp FTMP0, FTMP2
3069 | addu TMP2, TMP2, TMP3
3070 | b <1
3071 |. fmovop TMP2, r0
3072 |.endif
3073 |.else
3074 | bal sfcomp
3075 |. addu TMP2, TMP2, TMP3
3076 | b <1
3077 |.if MIPSR6
3078 |. movop TMP2, TMP2, CRET1
3079 |.else
3080 |. movop TMP2, r0, CRET1
3081 |.endif
3082 |.endif
3083 |
3084 |4: // RA is a number, RD is not a number.
3085 | bne CARG4, TISNUM, ->vmeta_comp
3086 | // RA is a number, RD is an integer. Convert RD to a number.
3087 |.if FPU
3088 |. lwc1 FRD, LO(RD)
3089 | ldc1 FRA, 0(RA)
3090 | b <3
3091 |. cvt.d.w FRD, FRD
3092 |.else
3093 |.if "ARGRD" == "CARG1"
3094 |. sextw CARG1, CARG1
3095 | bal ->vm_sfi2d_1
3096 |. nop
3097 |.else
3098 |. sextw CARG2, CARG2
3099 | bal ->vm_sfi2d_2
3100 |. nop
3101 |.endif
3102 | b <3
3103 |. nop
3104 |.endif
3105 |
3106 |5: // RA is an integer, RD is not an integer
3107 | sltiu AT, CARG4, LJ_TISNUM
3108 | beqz AT, ->vmeta_comp
3109 |. lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3110 | // RA is an integer, RD is a number. Convert RA to a number.
3111 |.if FPU
3112 | lwc1 FRA, LO(RA)
3113 | ldc1 FRD, 0(RD)
3114 | b <3
3115 | cvt.d.w FRA, FRA
3116 |.else
3117 |.if "ARGRA" == "CARG1"
3118 | bal ->vm_sfi2d_1
3119 |. sextw CARG1, CARG1
3120 |.else
3121 | bal ->vm_sfi2d_2
3122 |. sextw CARG2, CARG2
3123 |.endif
3124 | b <3
3125 |. nop
3126 |.endif
3127 |.endmacro
3128 |
3129 |.if MIPSR6
3130 if (op == BC_ISLT) {
3131 | bc_comp FTMP0, FTMP2, CARG1, CARG2, selnez, selnez, cmp.lt.d, ->vm_sfcmpolt
3132 } else if (op == BC_ISGE) {
3133 | bc_comp FTMP0, FTMP2, CARG1, CARG2, seleqz, seleqz, cmp.lt.d, ->vm_sfcmpolt
3134 } else if (op == BC_ISLE) {
3135 | bc_comp FTMP2, FTMP0, CARG2, CARG1, seleqz, seleqz, cmp.ult.d, ->vm_sfcmpult
3136 } else {
3137 | bc_comp FTMP2, FTMP0, CARG2, CARG1, selnez, selnez, cmp.ult.d, ->vm_sfcmpult
3138 }
3139 |.else
3140 if (op == BC_ISLT) {
3141 | bc_comp FTMP0, FTMP2, CARG1, CARG2, movz, movf, c.olt.d, ->vm_sfcmpolt
3142 } else if (op == BC_ISGE) {
3143 | bc_comp FTMP0, FTMP2, CARG1, CARG2, movn, movt, c.olt.d, ->vm_sfcmpolt
3144 } else if (op == BC_ISLE) {
3145 | bc_comp FTMP2, FTMP0, CARG2, CARG1, movn, movt, c.ult.d, ->vm_sfcmpult
3146 } else {
3147 | bc_comp FTMP2, FTMP0, CARG2, CARG1, movz, movf, c.ult.d, ->vm_sfcmpult
3148 }
3149 |.endif
3150 break;
3151
3152 case BC_ISEQV: case BC_ISNEV:
3153 vk = op == BC_ISEQV;
3154 | // RA = src1*8, RD = src2*8, JMP with RD = target
3155 | daddu RA, BASE, RA
3156 | daddiu PC, PC, 4
3157 | daddu RD, BASE, RD
3158 | ld CARG1, 0(RA)
3159 | lhu TMP2, -4+OFS_RD(PC)
3160 | ld CARG2, 0(RD)
3161 | gettp CARG3, CARG1
3162 | gettp CARG4, CARG2
3163 | sltu AT, TISNUM, CARG3
3164 | sltu TMP1, TISNUM, CARG4
3165 | or AT, AT, TMP1
3166 if (vk) {
3167 | beqz AT, ->BC_ISEQN_Z
3168 } else {
3169 | beqz AT, ->BC_ISNEN_Z
3170 }
3171 | // Either or both types are not numbers.
3172 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3173 |.if FFI
3174 |. li AT, LJ_TCDATA
3175 | beq CARG3, AT, ->vmeta_equal_cd
3176 |.endif
3177 | decode_RD4b TMP2
3178 |.if FFI
3179 | beq CARG4, AT, ->vmeta_equal_cd
3180 |. nop
3181 |.endif
3182 | bne CARG1, CARG2, >2
3183 |. addu TMP2, TMP2, TMP3
3184 | // Tag and value are equal.
3185 if (vk) {
3186 |->BC_ISEQV_Z:
3187 | daddu PC, PC, TMP2
3188 }
3189 |1:
3190 | ins_next
3191 |
3192 |2: // Check if the tags are the same and it's a table or userdata.
3193 | xor AT, CARG3, CARG4 // Same type?
3194 | sltiu TMP0, CARG3, LJ_TISTABUD+1 // Table or userdata?
3195 |.if MIPSR6
3196 | seleqz TMP0, TMP0, AT
3197 |.else
3198 | movn TMP0, r0, AT
3199 |.endif
3200 if (vk) {
3201 | beqz TMP0, <1
3202 } else {
3203 | beqz TMP0, ->BC_ISEQV_Z // Reuse code from opposite instruction.
3204 }
3205 | // Different tables or userdatas. Need to check __eq metamethod.
3206 | // Field metatable must be at same offset for GCtab and GCudata!
3207 |. cleartp TAB:TMP1, CARG1
3208 | ld TAB:TMP3, TAB:TMP1->metatable
3209 if (vk) {
3210 | beqz TAB:TMP3, <1 // No metatable?
3211 |. nop
3212 | lbu TMP3, TAB:TMP3->nomm
3213 | andi TMP3, TMP3, 1<<MM_eq
3214 | bnez TMP3, >1 // Or 'no __eq' flag set?
3215 } else {
3216 | beqz TAB:TMP3,->BC_ISEQV_Z // No metatable?
3217 |. nop
3218 | lbu TMP3, TAB:TMP3->nomm
3219 | andi TMP3, TMP3, 1<<MM_eq
3220 | bnez TMP3, ->BC_ISEQV_Z // Or 'no __eq' flag set?
3221 }
3222 |. nop
3223 | b ->vmeta_equal // Handle __eq metamethod.
3224 |. li TMP0, 1-vk // ne = 0 or 1.
3225 break;
3226
3227 case BC_ISEQS: case BC_ISNES:
3228 vk = op == BC_ISEQS;
3229 | // RA = src*8, RD = str_const*8 (~), JMP with RD = target
3230 | daddu RA, BASE, RA
3231 | daddiu PC, PC, 4
3232 | ld CARG1, 0(RA)
3233 | dsubu RD, KBASE, RD
3234 | lhu TMP2, -4+OFS_RD(PC)
3235 | ld CARG2, -8(RD) // KBASE-8-str_const*8
3236 |.if FFI
3237 | gettp TMP0, CARG1
3238 | li AT, LJ_TCDATA
3239 |.endif
3240 | li TMP1, LJ_TSTR
3241 | decode_RD4b TMP2
3242 |.if FFI
3243 | beq TMP0, AT, ->vmeta_equal_cd
3244 |.endif
3245 |. settp CARG2, TMP1
3246 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3247 | xor TMP1, CARG1, CARG2
3248 | addu TMP2, TMP2, TMP3
3249 |.if MIPSR6
3250 if (vk) {
3251 | seleqz TMP2, TMP2, TMP1
3252 } else {
3253 | selnez TMP2, TMP2, TMP1
3254 }
3255 |.else
3256 if (vk) {
3257 | movn TMP2, r0, TMP1
3258 } else {
3259 | movz TMP2, r0, TMP1
3260 }
3261 |.endif
3262 | daddu PC, PC, TMP2
3263 | ins_next
3264 break;
3265
3266 case BC_ISEQN: case BC_ISNEN:
3267 vk = op == BC_ISEQN;
3268 | // RA = src*8, RD = num_const*8, JMP with RD = target
3269 | daddu RA, BASE, RA
3270 | daddu RD, KBASE, RD
3271 | ld CARG1, 0(RA)
3272 | ld CARG2, 0(RD)
3273 | lhu TMP2, OFS_RD(PC)
3274 | gettp CARG3, CARG1
3275 | gettp CARG4, CARG2
3276 | daddiu PC, PC, 4
3277 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3278 if (vk) {
3279 |->BC_ISEQN_Z:
3280 } else {
3281 |->BC_ISNEN_Z:
3282 }
3283 | bne CARG3, TISNUM, >3
3284 |. decode_RD4b TMP2
3285 | bne CARG4, TISNUM, >6
3286 |. addu TMP2, TMP2, TMP3
3287 | xor AT, CARG1, CARG2
3288 |.if MIPSR6
3289 if (vk) {
3290 | seleqz TMP2, TMP2, AT
3291 |1:
3292 | daddu PC, PC, TMP2
3293 |2:
3294 } else {
3295 | selnez TMP2, TMP2, AT
3296 |1:
3297 |2:
3298 | daddu PC, PC, TMP2
3299 }
3300 |.else
3301 if (vk) {
3302 | movn TMP2, r0, AT
3303 |1:
3304 | daddu PC, PC, TMP2
3305 |2:
3306 } else {
3307 | movz TMP2, r0, AT
3308 |1:
3309 |2:
3310 | daddu PC, PC, TMP2
3311 }
3312 |.endif
3313 | ins_next
3314 |
3315 |3: // RA is not an integer.
3316 | sltu AT, CARG3, TISNUM
3317 |.if FFI
3318 | beqz AT, >8
3319 |.else
3320 | beqz AT, <2
3321 |.endif
3322 |. addu TMP2, TMP2, TMP3
3323 | sltu AT, CARG4, TISNUM
3324 |.if FPU
3325 | ldc1 FTMP0, 0(RA)
3326 | ldc1 FTMP2, 0(RD)
3327 |.endif
3328 | beqz AT, >5
3329 |. nop
3330 |4: // RA and RD are both numbers.
3331 |.if FPU
3332 |.if MIPSR6
3333 | cmp.eq.d FTMP0, FTMP0, FTMP2
3334 | dmfc1 TMP1, FTMP0
3335 | b <1
3336 if (vk) {
3337 |. selnez TMP2, TMP2, TMP1
3338 } else {
3339 |. seleqz TMP2, TMP2, TMP1
3340 }
3341 |.else
3342 | c.eq.d FTMP0, FTMP2
3343 | b <1
3344 if (vk) {
3345 |. movf TMP2, r0
3346 } else {
3347 |. movt TMP2, r0
3348 }
3349 |.endif
3350 |.else
3351 | bal ->vm_sfcmpeq
3352 |. nop
3353 | b <1
3354 |.if MIPSR6
3355 if (vk) {
3356 |. selnez TMP2, TMP2, CRET1
3357 } else {
3358 |. seleqz TMP2, TMP2, CRET1
3359 }
3360 |.else
3361 if (vk) {
3362 |. movz TMP2, r0, CRET1
3363 } else {
3364 |. movn TMP2, r0, CRET1
3365 }
3366 |.endif
3367 |.endif
3368 |
3369 |5: // RA is a number, RD is not a number.
3370 |.if FFI
3371 | bne CARG4, TISNUM, >9
3372 |.else
3373 | bne CARG4, TISNUM, <2
3374 |.endif
3375 | // RA is a number, RD is an integer. Convert RD to a number.
3376 |.if FPU
3377 |. lwc1 FTMP2, LO(RD)
3378 | b <4
3379 |. cvt.d.w FTMP2, FTMP2
3380 |.else
3381 |. sextw CARG2, CARG2
3382 | bal ->vm_sfi2d_2
3383 |. nop
3384 | b <4
3385 |. nop
3386 |.endif
3387 |
3388 |6: // RA is an integer, RD is not an integer
3389 | sltu AT, CARG4, TISNUM
3390 |.if FFI
3391 | beqz AT, >9
3392 |.else
3393 | beqz AT, <2
3394 |.endif
3395 | // RA is an integer, RD is a number. Convert RA to a number.
3396 |.if FPU
3397 |. lwc1 FTMP0, LO(RA)
3398 | ldc1 FTMP2, 0(RD)
3399 | b <4
3400 | cvt.d.w FTMP0, FTMP0
3401 |.else
3402 |. sextw CARG1, CARG1
3403 | bal ->vm_sfi2d_1
3404 |. nop
3405 | b <4
3406 |. nop
3407 |.endif
3408 |
3409 |.if FFI
3410 |8:
3411 | li AT, LJ_TCDATA
3412 | bne CARG3, AT, <2
3413 |. nop
3414 | b ->vmeta_equal_cd
3415 |. nop
3416 |9:
3417 | li AT, LJ_TCDATA
3418 | bne CARG4, AT, <2
3419 |. nop
3420 | b ->vmeta_equal_cd
3421 |. nop
3422 |.endif
3423 break;
3424
3425 case BC_ISEQP: case BC_ISNEP:
3426 vk = op == BC_ISEQP;
3427 | // RA = src*8, RD = primitive_type*8 (~), JMP with RD = target
3428 | daddu RA, BASE, RA
3429 | srl TMP1, RD, 3
3430 | ld TMP0, 0(RA)
3431 | lhu TMP2, OFS_RD(PC)
3432 | not TMP1, TMP1
3433 | gettp TMP0, TMP0
3434 | daddiu PC, PC, 4
3435 |.if FFI
3436 | li AT, LJ_TCDATA
3437 | beq TMP0, AT, ->vmeta_equal_cd
3438 |.endif
3439 |. xor TMP0, TMP0, TMP1
3440 | decode_RD4b TMP2
3441 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3442 | addu TMP2, TMP2, TMP3
3443 |.if MIPSR6
3444 if (vk) {
3445 | seleqz TMP2, TMP2, TMP0
3446 } else {
3447 | selnez TMP2, TMP2, TMP0
3448 }
3449 |.else
3450 if (vk) {
3451 | movn TMP2, r0, TMP0
3452 } else {
3453 | movz TMP2, r0, TMP0
3454 }
3455 |.endif
3456 | daddu PC, PC, TMP2
3457 | ins_next
3458 break;
3459
3460 /* -- Unary test and copy ops ------------------------------------------- */
3461
3462 case BC_ISTC: case BC_ISFC: case BC_IST: case BC_ISF:
3463 | // RA = dst*8 or unused, RD = src*8, JMP with RD = target
3464 | daddu RD, BASE, RD
3465 | lhu TMP2, OFS_RD(PC)
3466 | ld TMP0, 0(RD)
3467 | daddiu PC, PC, 4
3468 | gettp TMP0, TMP0
3469 | sltiu TMP0, TMP0, LJ_TISTRUECOND
3470 if (op == BC_IST || op == BC_ISF) {
3471 | decode_RD4b TMP2
3472 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3473 | addu TMP2, TMP2, TMP3
3474 |.if MIPSR6
3475 if (op == BC_IST) {
3476 | selnez TMP2, TMP2, TMP0;
3477 } else {
3478 | seleqz TMP2, TMP2, TMP0;
3479 }
3480 |.else
3481 if (op == BC_IST) {
3482 | movz TMP2, r0, TMP0
3483 } else {
3484 | movn TMP2, r0, TMP0
3485 }
3486 |.endif
3487 | daddu PC, PC, TMP2
3488 } else {
3489 | ld CRET1, 0(RD)
3490 if (op == BC_ISTC) {
3491 | beqz TMP0, >1
3492 } else {
3493 | bnez TMP0, >1
3494 }
3495 |. daddu RA, BASE, RA
3496 | decode_RD4b TMP2
3497 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3498 | addu TMP2, TMP2, TMP3
3499 | sd CRET1, 0(RA)
3500 | daddu PC, PC, TMP2
3501 |1:
3502 }
3503 | ins_next
3504 break;
3505
3506 case BC_ISTYPE:
3507 | // RA = src*8, RD = -type*8
3508 | daddu TMP2, BASE, RA
3509 | srl TMP1, RD, 3
3510 | ld TMP0, 0(TMP2)
3511 | ins_next1
3512 | gettp TMP0, TMP0
3513 | daddu AT, TMP0, TMP1
3514 | bnez AT, ->vmeta_istype
3515 |. ins_next2
3516 break;
3517 case BC_ISNUM:
3518 | // RA = src*8, RD = -(TISNUM-1)*8
3519 | daddu TMP2, BASE, RA
3520 | ld TMP0, 0(TMP2)
3521 | ins_next1
3522 | checknum TMP0, ->vmeta_istype
3523 |. ins_next2
3524 break;
3525
3526 /* -- Unary ops --------------------------------------------------------- */
3527
3528 case BC_MOV:
3529 | // RA = dst*8, RD = src*8
3530 | daddu RD, BASE, RD
3531 | daddu RA, BASE, RA
3532 | ld CRET1, 0(RD)
3533 | ins_next1
3534 | sd CRET1, 0(RA)
3535 | ins_next2
3536 break;
3537 case BC_NOT:
3538 | // RA = dst*8, RD = src*8
3539 | daddu RD, BASE, RD
3540 | daddu RA, BASE, RA
3541 | ld TMP0, 0(RD)
3542 | li AT, LJ_TTRUE
3543 | gettp TMP0, TMP0
3544 | sltu TMP0, AT, TMP0
3545 | addiu TMP0, TMP0, 1
3546 | dsll TMP0, TMP0, 47
3547 | not TMP0, TMP0
3548 | ins_next1
3549 | sd TMP0, 0(RA)
3550 | ins_next2
3551 break;
3552 case BC_UNM:
3553 | // RA = dst*8, RD = src*8
3554 | daddu RB, BASE, RD
3555 | ld CARG1, 0(RB)
3556 | daddu RA, BASE, RA
3557 | gettp CARG3, CARG1
3558 | bne CARG3, TISNUM, >2
3559 |. lui TMP1, 0x8000
3560 | sextw CARG1, CARG1
3561 | beq CARG1, TMP1, ->vmeta_unm // Meta handler deals with -2^31.
3562 |. negu CARG1, CARG1
3563 | zextw CARG1, CARG1
3564 | settp CARG1, TISNUM
3565 |1:
3566 | ins_next1
3567 | sd CARG1, 0(RA)
3568 | ins_next2
3569 |2:
3570 | sltiu AT, CARG3, LJ_TISNUM
3571 | beqz AT, ->vmeta_unm
3572 |. dsll TMP1, TMP1, 32
3573 | b <1
3574 |. xor CARG1, CARG1, TMP1
3575 break;
3576 case BC_LEN:
3577 | // RA = dst*8, RD = src*8
3578 | daddu CARG2, BASE, RD
3579 | daddu RA, BASE, RA
3580 | ld TMP0, 0(CARG2)
3581 | gettp TMP1, TMP0
3582 | daddiu AT, TMP1, -LJ_TSTR
3583 | bnez AT, >2
3584 |. cleartp STR:CARG1, TMP0
3585 | lw CRET1, STR:CARG1->len
3586 |1:
3587 | settp CRET1, TISNUM
3588 | ins_next1
3589 | sd CRET1, 0(RA)
3590 | ins_next2
3591 |2:
3592 | daddiu AT, TMP1, -LJ_TTAB
3593 | bnez AT, ->vmeta_len
3594 |. nop
3595#if LJ_52
3596 | ld TAB:TMP2, TAB:CARG1->metatable
3597 | bnez TAB:TMP2, >9
3598 |. nop
3599 |3:
3600#endif
3601 |->BC_LEN_Z:
3602 | load_got lj_tab_len
3603 | call_intern lj_tab_len // (GCtab *t)
3604 |. nop
3605 | // Returns uint32_t (but less than 2^31).
3606 | b <1
3607 |. nop
3608#if LJ_52
3609 |9:
3610 | lbu TMP0, TAB:TMP2->nomm
3611 | andi TMP0, TMP0, 1<<MM_len
3612 | bnez TMP0, <3 // 'no __len' flag set: done.
3613 |. nop
3614 | b ->vmeta_len
3615 |. nop
3616#endif
3617 break;
3618
3619 /* -- Binary ops -------------------------------------------------------- */
3620
3621 |.macro fpmod, a, b, c
3622 | bal ->vm_floor // floor(b/c)
3623 |. div.d FARG1, b, c
3624 | mul.d a, FRET1, c
3625 | sub.d a, b, a // b - floor(b/c)*c
3626 |.endmacro
3627
3628 |.macro sfpmod
3629 | daddiu sp, sp, -16
3630 |
3631 | load_got __divdf3
3632 | sd CARG1, 0(sp)
3633 | call_extern
3634 |. sd CARG2, 8(sp)
3635 |
3636 | load_got floor
3637 | call_extern
3638 |. move CARG1, CRET1
3639 |
3640 | load_got __muldf3
3641 | move CARG1, CRET1
3642 | call_extern
3643 |. ld CARG2, 8(sp)
3644 |
3645 | load_got __subdf3
3646 | ld CARG1, 0(sp)
3647 | call_extern
3648 |. move CARG2, CRET1
3649 |
3650 | daddiu sp, sp, 16
3651 |.endmacro
3652
3653 |.macro ins_arithpre, label
3654 ||vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN);
3655 | // RA = dst*8, RB = src1*8, RC = src2*8 | num_const*8
3656 ||switch (vk) {
3657 ||case 0:
3658 | decode_RB8a RB, INS
3659 | decode_RB8b RB
3660 | decode_RDtoRC8 RC, RD
3661 | // RA = dst*8, RB = src1*8, RC = num_const*8
3662 | daddu RB, BASE, RB
3663 |.if "label" ~= "none"
3664 | b label
3665 |.endif
3666 |. daddu RC, KBASE, RC
3667 || break;
3668 ||case 1:
3669 | decode_RB8a RC, INS
3670 | decode_RB8b RC
3671 | decode_RDtoRC8 RB, RD
3672 | // RA = dst*8, RB = num_const*8, RC = src1*8
3673 | daddu RC, BASE, RC
3674 |.if "label" ~= "none"
3675 | b label
3676 |.endif
3677 |. daddu RB, KBASE, RB
3678 || break;
3679 ||default:
3680 | decode_RB8a RB, INS
3681 | decode_RB8b RB
3682 | decode_RDtoRC8 RC, RD
3683 | // RA = dst*8, RB = src1*8, RC = src2*8
3684 | daddu RB, BASE, RB
3685 |.if "label" ~= "none"
3686 | b label
3687 |.endif
3688 |. daddu RC, BASE, RC
3689 || break;
3690 ||}
3691 |.endmacro
3692 |
3693 |.macro ins_arith, intins, fpins, fpcall, label
3694 | ins_arithpre none
3695 |
3696 |.if "label" ~= "none"
3697 |label:
3698 |.endif
3699 |
3700 |// Used in 5.
3701 | ld CARG1, 0(RB)
3702 | ld CARG2, 0(RC)
3703 | gettp TMP0, CARG1
3704 | gettp TMP1, CARG2
3705 |
3706 |.if "intins" ~= "div"
3707 |
3708 | // Check for two integers.
3709 | sextw CARG3, CARG1
3710 | bne TMP0, TISNUM, >5
3711 |. sextw CARG4, CARG2
3712 | bne TMP1, TISNUM, >5
3713 |
3714 |.if "intins" == "addu"
3715 |. intins CRET1, CARG3, CARG4
3716 | xor TMP1, CRET1, CARG3 // ((y^a) & (y^b)) < 0: overflow.
3717 | xor TMP2, CRET1, CARG4
3718 | and TMP1, TMP1, TMP2
3719 | bltz TMP1, ->vmeta_arith
3720 |. daddu RA, BASE, RA
3721 |.elif "intins" == "subu"
3722 |. intins CRET1, CARG3, CARG4
3723 | xor TMP1, CRET1, CARG3 // ((y^a) & (a^b)) < 0: overflow.
3724 | xor TMP2, CARG3, CARG4
3725 | and TMP1, TMP1, TMP2
3726 | bltz TMP1, ->vmeta_arith
3727 |. daddu RA, BASE, RA
3728 |.elif "intins" == "mult"
3729 |.if MIPSR6
3730 |. nop
3731 | mul CRET1, CARG3, CARG4
3732 | muh TMP2, CARG3, CARG4
3733 |.else
3734 |. intins CARG3, CARG4
3735 | mflo CRET1
3736 | mfhi TMP2
3737 |.endif
3738 | sra TMP1, CRET1, 31
3739 | bne TMP1, TMP2, ->vmeta_arith
3740 |. daddu RA, BASE, RA
3741 |.else
3742 |. load_got lj_vm_modi
3743 | beqz CARG4, ->vmeta_arith
3744 |. daddu RA, BASE, RA
3745 | move CARG1, CARG3
3746 | call_extern
3747 |. move CARG2, CARG4
3748 |.endif
3749 |
3750 | zextw CRET1, CRET1
3751 | settp CRET1, TISNUM
3752 | ins_next1
3753 | sd CRET1, 0(RA)
3754 |3:
3755 | ins_next2
3756 |
3757 |.endif
3758 |
3759 |5: // Check for two numbers.
3760 | .FPU ldc1 FTMP0, 0(RB)
3761 | sltu AT, TMP0, TISNUM
3762 | sltu TMP0, TMP1, TISNUM
3763 | .FPU ldc1 FTMP2, 0(RC)
3764 | and AT, AT, TMP0
3765 | beqz AT, ->vmeta_arith
3766 |. daddu RA, BASE, RA
3767 |
3768 |.if FPU
3769 | fpins FRET1, FTMP0, FTMP2
3770 |.elif "fpcall" == "sfpmod"
3771 | sfpmod
3772 |.else
3773 | load_got fpcall
3774 | call_extern
3775 |. nop
3776 |.endif
3777 |
3778 | ins_next1
3779 |.if "intins" ~= "div"
3780 | b <3
3781 |.endif
3782 |.if FPU
3783 |. sdc1 FRET1, 0(RA)
3784 |.else
3785 |. sd CRET1, 0(RA)
3786 |.endif
3787 |.if "intins" == "div"
3788 | ins_next2
3789 |.endif
3790 |
3791 |.endmacro
3792
3793 case BC_ADDVN: case BC_ADDNV: case BC_ADDVV:
3794 | ins_arith addu, add.d, __adddf3, none
3795 break;
3796 case BC_SUBVN: case BC_SUBNV: case BC_SUBVV:
3797 | ins_arith subu, sub.d, __subdf3, none
3798 break;
3799 case BC_MULVN: case BC_MULNV: case BC_MULVV:
3800 | ins_arith mult, mul.d, __muldf3, none
3801 break;
3802 case BC_DIVVN:
3803 | ins_arith div, div.d, __divdf3, ->BC_DIVVN_Z
3804 break;
3805 case BC_DIVNV: case BC_DIVVV:
3806 | ins_arithpre ->BC_DIVVN_Z
3807 break;
3808 case BC_MODVN:
3809 | ins_arith modi, fpmod, sfpmod, ->BC_MODVN_Z
3810 break;
3811 case BC_MODNV: case BC_MODVV:
3812 | ins_arithpre ->BC_MODVN_Z
3813 break;
3814 case BC_POW:
3815 | ins_arithpre none
3816 | ld CARG1, 0(RB)
3817 | ld CARG2, 0(RC)
3818 | gettp TMP0, CARG1
3819 | gettp TMP1, CARG2
3820 | sltiu TMP0, TMP0, LJ_TISNUM
3821 | sltiu TMP1, TMP1, LJ_TISNUM
3822 | and AT, TMP0, TMP1
3823 | load_got pow
3824 | beqz AT, ->vmeta_arith
3825 |. daddu RA, BASE, RA
3826 |.if FPU
3827 | ldc1 FARG1, 0(RB)
3828 | ldc1 FARG2, 0(RC)
3829 |.endif
3830 | call_extern
3831 |. nop
3832 | ins_next1
3833 |.if FPU
3834 | sdc1 FRET1, 0(RA)
3835 |.else
3836 | sd CRET1, 0(RA)
3837 |.endif
3838 | ins_next2
3839 break;
3840
3841 case BC_CAT:
3842 | // RA = dst*8, RB = src_start*8, RC = src_end*8
3843 | decode_RB8a RB, INS
3844 | decode_RB8b RB
3845 | decode_RDtoRC8 RC, RD
3846 | dsubu CARG3, RC, RB
3847 | sd BASE, L->base
3848 | daddu CARG2, BASE, RC
3849 | move MULTRES, RB
3850 |->BC_CAT_Z:
3851 | load_got lj_meta_cat
3852 | srl CARG3, CARG3, 3
3853 | sd PC, SAVE_PC
3854 | call_intern lj_meta_cat // (lua_State *L, TValue *top, int left)
3855 |. move CARG1, L
3856 | // Returns NULL (finished) or TValue * (metamethod).
3857 | bnez CRET1, ->vmeta_binop
3858 |. ld BASE, L->base
3859 | daddu RB, BASE, MULTRES
3860 | ld CRET1, 0(RB)
3861 | daddu RA, BASE, RA
3862 | ins_next1
3863 | sd CRET1, 0(RA)
3864 | ins_next2
3865 break;
3866
3867 /* -- Constant ops ------------------------------------------------------ */
3868
3869 case BC_KSTR:
3870 | // RA = dst*8, RD = str_const*8 (~)
3871 | dsubu TMP1, KBASE, RD
3872 | ins_next1
3873 | li TMP2, LJ_TSTR
3874 | ld TMP0, -8(TMP1) // KBASE-8-str_const*8
3875 | daddu RA, BASE, RA
3876 | settp TMP0, TMP2
3877 | sd TMP0, 0(RA)
3878 | ins_next2
3879 break;
3880 case BC_KCDATA:
3881 |.if FFI
3882 | // RA = dst*8, RD = cdata_const*8 (~)
3883 | dsubu TMP1, KBASE, RD
3884 | ins_next1
3885 | ld TMP0, -8(TMP1) // KBASE-8-cdata_const*8
3886 | li TMP2, LJ_TCDATA
3887 | daddu RA, BASE, RA
3888 | settp TMP0, TMP2
3889 | sd TMP0, 0(RA)
3890 | ins_next2
3891 |.endif
3892 break;
3893 case BC_KSHORT:
3894 | // RA = dst*8, RD = int16_literal*8
3895 | sra RD, INS, 16
3896 | daddu RA, BASE, RA
3897 | zextw RD, RD
3898 | ins_next1
3899 | settp RD, TISNUM
3900 | sd RD, 0(RA)
3901 | ins_next2
3902 break;
3903 case BC_KNUM:
3904 | // RA = dst*8, RD = num_const*8
3905 | daddu RD, KBASE, RD
3906 | daddu RA, BASE, RA
3907 | ld CRET1, 0(RD)
3908 | ins_next1
3909 | sd CRET1, 0(RA)
3910 | ins_next2
3911 break;
3912 case BC_KPRI:
3913 | // RA = dst*8, RD = primitive_type*8 (~)
3914 | daddu RA, BASE, RA
3915 | dsll TMP0, RD, 44
3916 | not TMP0, TMP0
3917 | ins_next1
3918 | sd TMP0, 0(RA)
3919 | ins_next2
3920 break;
3921 case BC_KNIL:
3922 | // RA = base*8, RD = end*8
3923 | daddu RA, BASE, RA
3924 | sd TISNIL, 0(RA)
3925 | daddiu RA, RA, 8
3926 | daddu RD, BASE, RD
3927 |1:
3928 | sd TISNIL, 0(RA)
3929 | slt AT, RA, RD
3930 | bnez AT, <1
3931 |. daddiu RA, RA, 8
3932 | ins_next_
3933 break;
3934
3935 /* -- Upvalue and function ops ------------------------------------------ */
3936
3937 case BC_UGET:
3938 | // RA = dst*8, RD = uvnum*8
3939 | ld LFUNC:RB, FRAME_FUNC(BASE)
3940 | daddu RA, BASE, RA
3941 | cleartp LFUNC:RB
3942 | daddu RD, RD, LFUNC:RB
3943 | ld UPVAL:RB, LFUNC:RD->uvptr
3944 | ins_next1
3945 | ld TMP1, UPVAL:RB->v
3946 | ld CRET1, 0(TMP1)
3947 | sd CRET1, 0(RA)
3948 | ins_next2
3949 break;
3950 case BC_USETV:
3951 | // RA = uvnum*8, RD = src*8
3952 | ld LFUNC:RB, FRAME_FUNC(BASE)
3953 | daddu RD, BASE, RD
3954 | cleartp LFUNC:RB
3955 | daddu RA, RA, LFUNC:RB
3956 | ld UPVAL:RB, LFUNC:RA->uvptr
3957 | ld CRET1, 0(RD)
3958 | lbu TMP3, UPVAL:RB->marked
3959 | ld CARG2, UPVAL:RB->v
3960 | andi TMP3, TMP3, LJ_GC_BLACK // isblack(uv)
3961 | lbu TMP0, UPVAL:RB->closed
3962 | gettp TMP2, CRET1
3963 | sd CRET1, 0(CARG2)
3964 | li AT, LJ_GC_BLACK|1
3965 | or TMP3, TMP3, TMP0
3966 | beq TMP3, AT, >2 // Upvalue is closed and black?
3967 |. daddiu TMP2, TMP2, -(LJ_TNUMX+1)
3968 |1:
3969 | ins_next
3970 |
3971 |2: // Check if new value is collectable.
3972 | sltiu AT, TMP2, LJ_TISGCV - (LJ_TNUMX+1)
3973 | beqz AT, <1 // tvisgcv(v)
3974 |. cleartp GCOBJ:CRET1, CRET1
3975 | lbu TMP3, GCOBJ:CRET1->gch.marked
3976 | andi TMP3, TMP3, LJ_GC_WHITES // iswhite(v)
3977 | beqz TMP3, <1
3978 |. load_got lj_gc_barrieruv
3979 | // Crossed a write barrier. Move the barrier forward.
3980 | call_intern lj_gc_barrieruv // (global_State *g, TValue *tv)
3981 |. daddiu CARG1, DISPATCH, GG_DISP2G
3982 | b <1
3983 |. nop
3984 break;
3985 case BC_USETS:
3986 | // RA = uvnum*8, RD = str_const*8 (~)
3987 | ld LFUNC:RB, FRAME_FUNC(BASE)
3988 | dsubu TMP1, KBASE, RD
3989 | cleartp LFUNC:RB
3990 | daddu RA, RA, LFUNC:RB
3991 | ld UPVAL:RB, LFUNC:RA->uvptr
3992 | ld STR:TMP1, -8(TMP1) // KBASE-8-str_const*8
3993 | lbu TMP2, UPVAL:RB->marked
3994 | ld CARG2, UPVAL:RB->v
3995 | lbu TMP3, STR:TMP1->marked
3996 | andi AT, TMP2, LJ_GC_BLACK // isblack(uv)
3997 | lbu TMP2, UPVAL:RB->closed
3998 | li TMP0, LJ_TSTR
3999 | settp TMP1, TMP0
4000 | bnez AT, >2
4001 |. sd TMP1, 0(CARG2)
4002 |1:
4003 | ins_next
4004 |
4005 |2: // Check if string is white and ensure upvalue is closed.
4006 | beqz TMP2, <1
4007 |. andi AT, TMP3, LJ_GC_WHITES // iswhite(str)
4008 | beqz AT, <1
4009 |. load_got lj_gc_barrieruv
4010 | // Crossed a write barrier. Move the barrier forward.
4011 | call_intern lj_gc_barrieruv // (global_State *g, TValue *tv)
4012 |. daddiu CARG1, DISPATCH, GG_DISP2G
4013 | b <1
4014 |. nop
4015 break;
4016 case BC_USETN:
4017 | // RA = uvnum*8, RD = num_const*8
4018 | ld LFUNC:RB, FRAME_FUNC(BASE)
4019 | daddu RD, KBASE, RD
4020 | cleartp LFUNC:RB
4021 | daddu RA, RA, LFUNC:RB
4022 | ld UPVAL:RB, LFUNC:RA->uvptr
4023 | ld CRET1, 0(RD)
4024 | ld TMP1, UPVAL:RB->v
4025 | ins_next1
4026 | sd CRET1, 0(TMP1)
4027 | ins_next2
4028 break;
4029 case BC_USETP:
4030 | // RA = uvnum*8, RD = primitive_type*8 (~)
4031 | ld LFUNC:RB, FRAME_FUNC(BASE)
4032 | dsll TMP0, RD, 44
4033 | cleartp LFUNC:RB
4034 | daddu RA, RA, LFUNC:RB
4035 | not TMP0, TMP0
4036 | ld UPVAL:RB, LFUNC:RA->uvptr
4037 | ins_next1
4038 | ld TMP1, UPVAL:RB->v
4039 | sd TMP0, 0(TMP1)
4040 | ins_next2
4041 break;
4042
4043 case BC_UCLO:
4044 | // RA = level*8, RD = target
4045 | ld TMP2, L->openupval
4046 | branch_RD // Do this first since RD is not saved.
4047 | load_got lj_func_closeuv
4048 | sd BASE, L->base
4049 | beqz TMP2, >1
4050 |. move CARG1, L
4051 | call_intern lj_func_closeuv // (lua_State *L, TValue *level)
4052 |. daddu CARG2, BASE, RA
4053 | ld BASE, L->base
4054 |1:
4055 | ins_next
4056 break;
4057
4058 case BC_FNEW:
4059 | // RA = dst*8, RD = proto_const*8 (~) (holding function prototype)
4060 | load_got lj_func_newL_gc
4061 | dsubu TMP1, KBASE, RD
4062 | ld CARG3, FRAME_FUNC(BASE)
4063 | ld CARG2, -8(TMP1) // KBASE-8-tab_const*8
4064 | sd BASE, L->base
4065 | sd PC, SAVE_PC
4066 | cleartp CARG3
4067 | // (lua_State *L, GCproto *pt, GCfuncL *parent)
4068 | call_intern lj_func_newL_gc
4069 |. move CARG1, L
4070 | // Returns GCfuncL *.
4071 | li TMP0, LJ_TFUNC
4072 | ld BASE, L->base
4073 | ins_next1
4074 | settp CRET1, TMP0
4075 | daddu RA, BASE, RA
4076 | sd CRET1, 0(RA)
4077 | ins_next2
4078 break;
4079
4080 /* -- Table ops --------------------------------------------------------- */
4081
4082 case BC_TNEW:
4083 case BC_TDUP:
4084 | // RA = dst*8, RD = (hbits|asize)*8 | tab_const*8 (~)
4085 | ld TMP0, DISPATCH_GL(gc.total)(DISPATCH)
4086 | ld TMP1, DISPATCH_GL(gc.threshold)(DISPATCH)
4087 | sd BASE, L->base
4088 | sd PC, SAVE_PC
4089 | sltu AT, TMP0, TMP1
4090 | beqz AT, >5
4091 |1:
4092 if (op == BC_TNEW) {
4093 | load_got lj_tab_new
4094 | srl CARG2, RD, 3
4095 | andi CARG2, CARG2, 0x7ff
4096 | li TMP0, 0x801
4097 | addiu AT, CARG2, -0x7ff
4098 | srl CARG3, RD, 14
4099 |.if MIPSR6
4100 | seleqz TMP0, TMP0, AT
4101 | selnez CARG2, CARG2, AT
4102 | or CARG2, CARG2, TMP0
4103 |.else
4104 | movz CARG2, TMP0, AT
4105 |.endif
4106 | // (lua_State *L, int32_t asize, uint32_t hbits)
4107 | call_intern lj_tab_new
4108 |. move CARG1, L
4109 | // Returns Table *.
4110 } else {
4111 | load_got lj_tab_dup
4112 | dsubu TMP1, KBASE, RD
4113 | move CARG1, L
4114 | call_intern lj_tab_dup // (lua_State *L, Table *kt)
4115 |. ld CARG2, -8(TMP1) // KBASE-8-str_const*8
4116 | // Returns Table *.
4117 }
4118 | li TMP0, LJ_TTAB
4119 | ld BASE, L->base
4120 | ins_next1
4121 | daddu RA, BASE, RA
4122 | settp CRET1, TMP0
4123 | sd CRET1, 0(RA)
4124 | ins_next2
4125 |5:
4126 | load_got lj_gc_step_fixtop
4127 | move MULTRES, RD
4128 | call_intern lj_gc_step_fixtop // (lua_State *L)
4129 |. move CARG1, L
4130 | b <1
4131 |. move RD, MULTRES
4132 break;
4133
4134 case BC_GGET:
4135 | // RA = dst*8, RD = str_const*8 (~)
4136 case BC_GSET:
4137 | // RA = src*8, RD = str_const*8 (~)
4138 | ld LFUNC:TMP2, FRAME_FUNC(BASE)
4139 | dsubu TMP1, KBASE, RD
4140 | ld STR:RC, -8(TMP1) // KBASE-8-str_const*8
4141 | cleartp LFUNC:TMP2
4142 | ld TAB:RB, LFUNC:TMP2->env
4143 if (op == BC_GGET) {
4144 | b ->BC_TGETS_Z
4145 } else {
4146 | b ->BC_TSETS_Z
4147 }
4148 |. daddu RA, BASE, RA
4149 break;
4150
4151 case BC_TGETV:
4152 | // RA = dst*8, RB = table*8, RC = key*8
4153 | decode_RB8a RB, INS
4154 | decode_RB8b RB
4155 | decode_RDtoRC8 RC, RD
4156 | daddu CARG2, BASE, RB
4157 | daddu CARG3, BASE, RC
4158 | ld TAB:RB, 0(CARG2)
4159 | ld TMP2, 0(CARG3)
4160 | daddu RA, BASE, RA
4161 | checktab TAB:RB, ->vmeta_tgetv
4162 | gettp TMP3, TMP2
4163 | bne TMP3, TISNUM, >5 // Integer key?
4164 |. lw TMP0, TAB:RB->asize
4165 | sextw TMP2, TMP2
4166 | ld TMP1, TAB:RB->array
4167 | sltu AT, TMP2, TMP0
4168 | sll TMP2, TMP2, 3
4169 | beqz AT, ->vmeta_tgetv // Integer key and in array part?
4170 |. daddu TMP2, TMP1, TMP2
4171 | ld AT, 0(TMP2)
4172 | beq AT, TISNIL, >2
4173 |. ld CRET1, 0(TMP2)
4174 |1:
4175 | ins_next1
4176 | sd CRET1, 0(RA)
4177 | ins_next2
4178 |
4179 |2: // Check for __index if table value is nil.
4180 | ld TAB:TMP2, TAB:RB->metatable
4181 | beqz TAB:TMP2, <1 // No metatable: done.
4182 |. nop
4183 | lbu TMP0, TAB:TMP2->nomm
4184 | andi TMP0, TMP0, 1<<MM_index
4185 | bnez TMP0, <1 // 'no __index' flag set: done.
4186 |. nop
4187 | b ->vmeta_tgetv
4188 |. nop
4189 |
4190 |5:
4191 | li AT, LJ_TSTR
4192 | bne TMP3, AT, ->vmeta_tgetv
4193 |. cleartp RC, TMP2
4194 | b ->BC_TGETS_Z // String key?
4195 |. nop
4196 break;
4197 case BC_TGETS:
4198 | // RA = dst*8, RB = table*8, RC = str_const*8 (~)
4199 | decode_RB8a RB, INS
4200 | decode_RB8b RB
4201 | decode_RC8a RC, INS
4202 | daddu CARG2, BASE, RB
4203 | decode_RC8b RC
4204 | ld TAB:RB, 0(CARG2)
4205 | dsubu CARG3, KBASE, RC
4206 | daddu RA, BASE, RA
4207 | ld STR:RC, -8(CARG3) // KBASE-8-str_const*8
4208 | checktab TAB:RB, ->vmeta_tgets1
4209 |->BC_TGETS_Z:
4210 | // TAB:RB = GCtab *, STR:RC = GCstr *, RA = dst*8
4211 | lw TMP0, TAB:RB->hmask
4212 | lw TMP1, STR:RC->hash
4213 | ld NODE:TMP2, TAB:RB->node
4214 | and TMP1, TMP1, TMP0 // idx = str->hash & tab->hmask
4215 | sll TMP0, TMP1, 5
4216 | sll TMP1, TMP1, 3
4217 | subu TMP1, TMP0, TMP1
4218 | li TMP3, LJ_TSTR
4219 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8)
4220 | settp STR:RC, TMP3 // Tagged key to look for.
4221 |1:
4222 | ld CARG1, NODE:TMP2->key
4223 | ld CRET1, NODE:TMP2->val
4224 | ld NODE:TMP1, NODE:TMP2->next
4225 | bne CARG1, RC, >4
4226 |. ld TAB:TMP3, TAB:RB->metatable
4227 | beq CRET1, TISNIL, >5 // Key found, but nil value?
4228 |. nop
4229 |3:
4230 | ins_next1
4231 | sd CRET1, 0(RA)
4232 | ins_next2
4233 |
4234 |4: // Follow hash chain.
4235 | bnez NODE:TMP1, <1
4236 |. move NODE:TMP2, NODE:TMP1
4237 | // End of hash chain: key not found, nil result.
4238 |
4239 |5: // Check for __index if table value is nil.
4240 | beqz TAB:TMP3, <3 // No metatable: done.
4241 |. move CRET1, TISNIL
4242 | lbu TMP0, TAB:TMP3->nomm
4243 | andi TMP0, TMP0, 1<<MM_index
4244 | bnez TMP0, <3 // 'no __index' flag set: done.
4245 |. nop
4246 | b ->vmeta_tgets
4247 |. nop
4248 break;
4249 case BC_TGETB:
4250 | // RA = dst*8, RB = table*8, RC = index*8
4251 | decode_RB8a RB, INS
4252 | decode_RB8b RB
4253 | daddu CARG2, BASE, RB
4254 | decode_RDtoRC8 RC, RD
4255 | ld TAB:RB, 0(CARG2)
4256 | daddu RA, BASE, RA
4257 | srl TMP0, RC, 3
4258 | checktab TAB:RB, ->vmeta_tgetb
4259 | lw TMP1, TAB:RB->asize
4260 | ld TMP2, TAB:RB->array
4261 | sltu AT, TMP0, TMP1
4262 | beqz AT, ->vmeta_tgetb
4263 |. daddu RC, TMP2, RC
4264 | ld AT, 0(RC)
4265 | beq AT, TISNIL, >5
4266 |. ld CRET1, 0(RC)
4267 |1:
4268 | ins_next1
4269 | sd CRET1, 0(RA)
4270 | ins_next2
4271 |
4272 |5: // Check for __index if table value is nil.
4273 | ld TAB:TMP2, TAB:RB->metatable
4274 | beqz TAB:TMP2, <1 // No metatable: done.
4275 |. nop
4276 | lbu TMP1, TAB:TMP2->nomm
4277 | andi TMP1, TMP1, 1<<MM_index
4278 | bnez TMP1, <1 // 'no __index' flag set: done.
4279 |. nop
4280 | b ->vmeta_tgetb // Caveat: preserve TMP0 and CARG2!
4281 |. nop
4282 break;
4283 case BC_TGETR:
4284 | // RA = dst*8, RB = table*8, RC = key*8
4285 | decode_RB8a RB, INS
4286 | decode_RB8b RB
4287 | decode_RDtoRC8 RC, RD
4288 | daddu RB, BASE, RB
4289 | daddu RC, BASE, RC
4290 | ld TAB:CARG1, 0(RB)
4291 | lw CARG2, LO(RC)
4292 | daddu RA, BASE, RA
4293 | cleartp TAB:CARG1
4294 | lw TMP0, TAB:CARG1->asize
4295 | ld TMP1, TAB:CARG1->array
4296 | sltu AT, CARG2, TMP0
4297 | sll TMP2, CARG2, 3
4298 | beqz AT, ->vmeta_tgetr // In array part?
4299 |. daddu CRET1, TMP1, TMP2
4300 | ld CARG2, 0(CRET1)
4301 |->BC_TGETR_Z:
4302 | ins_next1
4303 | sd CARG2, 0(RA)
4304 | ins_next2
4305 break;
4306
4307 case BC_TSETV:
4308 | // RA = src*8, RB = table*8, RC = key*8
4309 | decode_RB8a RB, INS
4310 | decode_RB8b RB
4311 | decode_RDtoRC8 RC, RD
4312 | daddu CARG2, BASE, RB
4313 | daddu CARG3, BASE, RC
4314 | ld RB, 0(CARG2)
4315 | ld TMP2, 0(CARG3)
4316 | daddu RA, BASE, RA
4317 | checktab RB, ->vmeta_tsetv
4318 | checkint TMP2, >5
4319 |. sextw RC, TMP2
4320 | lw TMP0, TAB:RB->asize
4321 | ld TMP1, TAB:RB->array
4322 | sltu AT, RC, TMP0
4323 | sll TMP2, RC, 3
4324 | beqz AT, ->vmeta_tsetv // Integer key and in array part?
4325 |. daddu TMP1, TMP1, TMP2
4326 | ld TMP0, 0(TMP1)
4327 | lbu TMP3, TAB:RB->marked
4328 | beq TMP0, TISNIL, >3
4329 |. ld CRET1, 0(RA)
4330 |1:
4331 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4332 | bnez AT, >7
4333 |. sd CRET1, 0(TMP1)
4334 |2:
4335 | ins_next
4336 |
4337 |3: // Check for __newindex if previous value is nil.
4338 | ld TAB:TMP2, TAB:RB->metatable
4339 | beqz TAB:TMP2, <1 // No metatable: done.
4340 |. nop
4341 | lbu TMP2, TAB:TMP2->nomm
4342 | andi TMP2, TMP2, 1<<MM_newindex
4343 | bnez TMP2, <1 // 'no __newindex' flag set: done.
4344 |. nop
4345 | b ->vmeta_tsetv
4346 |. nop
4347 |
4348 |5:
4349 | gettp AT, TMP2
4350 | daddiu AT, AT, -LJ_TSTR
4351 | bnez AT, ->vmeta_tsetv
4352 |. nop
4353 | b ->BC_TSETS_Z // String key?
4354 |. cleartp STR:RC, TMP2
4355 |
4356 |7: // Possible table write barrier for the value. Skip valiswhite check.
4357 | barrierback TAB:RB, TMP3, TMP0, <2
4358 break;
4359 case BC_TSETS:
4360 | // RA = src*8, RB = table*8, RC = str_const*8 (~)
4361 | decode_RB8a RB, INS
4362 | decode_RB8b RB
4363 | daddu CARG2, BASE, RB
4364 | decode_RC8a RC, INS
4365 | ld TAB:RB, 0(CARG2)
4366 | decode_RC8b RC
4367 | dsubu CARG3, KBASE, RC
4368 | ld RC, -8(CARG3) // KBASE-8-str_const*8
4369 | daddu RA, BASE, RA
4370 | cleartp STR:RC
4371 | checktab TAB:RB, ->vmeta_tsets1
4372 |->BC_TSETS_Z:
4373 | // TAB:RB = GCtab *, STR:RC = GCstr *, RA = BASE+src*8
4374 | lw TMP0, TAB:RB->hmask
4375 | lw TMP1, STR:RC->hash
4376 | ld NODE:TMP2, TAB:RB->node
4377 | sb r0, TAB:RB->nomm // Clear metamethod cache.
4378 | and TMP1, TMP1, TMP0 // idx = str->hash & tab->hmask
4379 | sll TMP0, TMP1, 5
4380 | sll TMP1, TMP1, 3
4381 | subu TMP1, TMP0, TMP1
4382 | li TMP3, LJ_TSTR
4383 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8)
4384 | settp STR:RC, TMP3 // Tagged key to look for.
4385 |.if FPU
4386 | ldc1 FTMP0, 0(RA)
4387 |.else
4388 | ld CRET1, 0(RA)
4389 |.endif
4390 |1:
4391 | ld TMP0, NODE:TMP2->key
4392 | ld CARG2, NODE:TMP2->val
4393 | ld NODE:TMP1, NODE:TMP2->next
4394 | bne TMP0, RC, >5
4395 |. lbu TMP3, TAB:RB->marked
4396 | beq CARG2, TISNIL, >4 // Key found, but nil value?
4397 |. ld TAB:TMP0, TAB:RB->metatable
4398 |2:
4399 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4400 | bnez AT, >7
4401 |.if FPU
4402 |. sdc1 FTMP0, NODE:TMP2->val
4403 |.else
4404 |. sd CRET1, NODE:TMP2->val
4405 |.endif
4406 |3:
4407 | ins_next
4408 |
4409 |4: // Check for __newindex if previous value is nil.
4410 | beqz TAB:TMP0, <2 // No metatable: done.
4411 |. nop
4412 | lbu TMP0, TAB:TMP0->nomm
4413 | andi TMP0, TMP0, 1<<MM_newindex
4414 | bnez TMP0, <2 // 'no __newindex' flag set: done.
4415 |. nop
4416 | b ->vmeta_tsets
4417 |. nop
4418 |
4419 |5: // Follow hash chain.
4420 | bnez NODE:TMP1, <1
4421 |. move NODE:TMP2, NODE:TMP1
4422 | // End of hash chain: key not found, add a new one
4423 |
4424 | // But check for __newindex first.
4425 | ld TAB:TMP2, TAB:RB->metatable
4426 | beqz TAB:TMP2, >6 // No metatable: continue.
4427 |. daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
4428 | lbu TMP0, TAB:TMP2->nomm
4429 | andi TMP0, TMP0, 1<<MM_newindex
4430 | beqz TMP0, ->vmeta_tsets // 'no __newindex' flag NOT set: check.
4431 |6:
4432 | load_got lj_tab_newkey
4433 | sd RC, 0(CARG3)
4434 | sd BASE, L->base
4435 | move CARG2, TAB:RB
4436 | sd PC, SAVE_PC
4437 | call_intern lj_tab_newkey // (lua_State *L, GCtab *t, TValue *k
4438 |. move CARG1, L
4439 | // Returns TValue *.
4440 | ld BASE, L->base
4441 |.if FPU
4442 | b <3 // No 2nd write barrier needed.
4443 |. sdc1 FTMP0, 0(CRET1)
4444 |.else
4445 | ld CARG1, 0(RA)
4446 | b <3 // No 2nd write barrier needed.
4447 |. sd CARG1, 0(CRET1)
4448 |.endif
4449 |
4450 |7: // Possible table write barrier for the value. Skip valiswhite check.
4451 | barrierback TAB:RB, TMP3, TMP0, <3
4452 break;
4453 case BC_TSETB:
4454 | // RA = src*8, RB = table*8, RC = index*8
4455 | decode_RB8a RB, INS
4456 | decode_RB8b RB
4457 | daddu CARG2, BASE, RB
4458 | decode_RDtoRC8 RC, RD
4459 | ld TAB:RB, 0(CARG2)
4460 | daddu RA, BASE, RA
4461 | srl TMP0, RC, 3
4462 | checktab RB, ->vmeta_tsetb
4463 | lw TMP1, TAB:RB->asize
4464 | ld TMP2, TAB:RB->array
4465 | sltu AT, TMP0, TMP1
4466 | beqz AT, ->vmeta_tsetb
4467 |. daddu RC, TMP2, RC
4468 | ld TMP1, 0(RC)
4469 | lbu TMP3, TAB:RB->marked
4470 | beq TMP1, TISNIL, >5
4471 |1:
4472 |. ld CRET1, 0(RA)
4473 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4474 | bnez AT, >7
4475 |. sd CRET1, 0(RC)
4476 |2:
4477 | ins_next
4478 |
4479 |5: // Check for __newindex if previous value is nil.
4480 | ld TAB:TMP2, TAB:RB->metatable
4481 | beqz TAB:TMP2, <1 // No metatable: done.
4482 |. nop
4483 | lbu TMP1, TAB:TMP2->nomm
4484 | andi TMP1, TMP1, 1<<MM_newindex
4485 | bnez TMP1, <1 // 'no __newindex' flag set: done.
4486 |. nop
4487 | b ->vmeta_tsetb // Caveat: preserve TMP0 and CARG2!
4488 |. nop
4489 |
4490 |7: // Possible table write barrier for the value. Skip valiswhite check.
4491 | barrierback TAB:RB, TMP3, TMP0, <2
4492 break;
4493 case BC_TSETR:
4494 | // RA = dst*8, RB = table*8, RC = key*8
4495 | decode_RB8a RB, INS
4496 | decode_RB8b RB
4497 | decode_RDtoRC8 RC, RD
4498 | daddu CARG1, BASE, RB
4499 | daddu CARG3, BASE, RC
4500 | ld TAB:CARG2, 0(CARG1)
4501 | lw CARG3, LO(CARG3)
4502 | cleartp TAB:CARG2
4503 | lbu TMP3, TAB:CARG2->marked
4504 | lw TMP0, TAB:CARG2->asize
4505 | ld TMP1, TAB:CARG2->array
4506 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4507 | bnez AT, >7
4508 |. daddu RA, BASE, RA
4509 |2:
4510 | sltu AT, CARG3, TMP0
4511 | sll TMP2, CARG3, 3
4512 | beqz AT, ->vmeta_tsetr // In array part?
4513 |. daddu CRET1, TMP1, TMP2
4514 |->BC_TSETR_Z:
4515 | ld CARG1, 0(RA)
4516 | ins_next1
4517 | sd CARG1, 0(CRET1)
4518 | ins_next2
4519 |
4520 |7: // Possible table write barrier for the value. Skip valiswhite check.
4521 | barrierback TAB:CARG2, TMP3, CRET1, <2
4522 break;
4523
4524 case BC_TSETM:
4525 | // RA = base*8 (table at base-1), RD = num_const*8 (start index)
4526 | daddu RA, BASE, RA
4527 |1:
4528 | daddu TMP3, KBASE, RD
4529 | ld TAB:CARG2, -8(RA) // Guaranteed to be a table.
4530 | addiu TMP0, MULTRES, -8
4531 | lw TMP3, LO(TMP3) // Integer constant is in lo-word.
4532 | beqz TMP0, >4 // Nothing to copy?
4533 |. srl CARG3, TMP0, 3
4534 | cleartp CARG2
4535 | addu CARG3, CARG3, TMP3
4536 | lw TMP2, TAB:CARG2->asize
4537 | sll TMP1, TMP3, 3
4538 | lbu TMP3, TAB:CARG2->marked
4539 | ld CARG1, TAB:CARG2->array
4540 | sltu AT, TMP2, CARG3
4541 | bnez AT, >5
4542 |. daddu TMP2, RA, TMP0
4543 | daddu TMP1, TMP1, CARG1
4544 | andi TMP0, TMP3, LJ_GC_BLACK // isblack(table)
4545 |3: // Copy result slots to table.
4546 | ld CRET1, 0(RA)
4547 | daddiu RA, RA, 8
4548 | sltu AT, RA, TMP2
4549 | sd CRET1, 0(TMP1)
4550 | bnez AT, <3
4551 |. daddiu TMP1, TMP1, 8
4552 | bnez TMP0, >7
4553 |. nop
4554 |4:
4555 | ins_next
4556 |
4557 |5: // Need to resize array part.
4558 | load_got lj_tab_reasize
4559 | sd BASE, L->base
4560 | sd PC, SAVE_PC
4561 | move BASE, RD
4562 | call_intern lj_tab_reasize // (lua_State *L, GCtab *t, int nasize)
4563 |. move CARG1, L
4564 | // Must not reallocate the stack.
4565 | move RD, BASE
4566 | b <1
4567 |. ld BASE, L->base // Reload BASE for lack of a saved register.
4568 |
4569 |7: // Possible table write barrier for any value. Skip valiswhite check.
4570 | barrierback TAB:CARG2, TMP3, TMP0, <4
4571 break;
4572
4573 /* -- Calls and vararg handling ----------------------------------------- */
4574
4575 case BC_CALLM:
4576 | // RA = base*8, (RB = (nresults+1)*8,) RC = extra_nargs*8
4577 | decode_RDtoRC8 NARGS8:RC, RD
4578 | b ->BC_CALL_Z
4579 |. addu NARGS8:RC, NARGS8:RC, MULTRES
4580 break;
4581 case BC_CALL:
4582 | // RA = base*8, (RB = (nresults+1)*8,) RC = (nargs+1)*8
4583 | decode_RDtoRC8 NARGS8:RC, RD
4584 |->BC_CALL_Z:
4585 | move TMP2, BASE
4586 | daddu BASE, BASE, RA
4587 | ld LFUNC:RB, 0(BASE)
4588 | daddiu BASE, BASE, 16
4589 | addiu NARGS8:RC, NARGS8:RC, -8
4590 | checkfunc RB, ->vmeta_call
4591 | ins_call
4592 break;
4593
4594 case BC_CALLMT:
4595 | // RA = base*8, (RB = 0,) RC = extra_nargs*8
4596 | addu NARGS8:RD, NARGS8:RD, MULTRES // BC_CALLT gets RC from RD.
4597 | // Fall through. Assumes BC_CALLT follows.
4598 break;
4599 case BC_CALLT:
4600 | // RA = base*8, (RB = 0,) RC = (nargs+1)*8
4601 | daddu RA, BASE, RA
4602 | ld RB, 0(RA)
4603 | move NARGS8:RC, RD
4604 | ld TMP1, FRAME_PC(BASE)
4605 | daddiu RA, RA, 16
4606 | addiu NARGS8:RC, NARGS8:RC, -8
4607 | checktp CARG3, RB, -LJ_TFUNC, ->vmeta_callt
4608 |->BC_CALLT_Z:
4609 | andi TMP0, TMP1, FRAME_TYPE // Caveat: preserve TMP0 until the 'or'.
4610 | lbu TMP3, LFUNC:CARG3->ffid
4611 | bnez TMP0, >7
4612 |. xori TMP2, TMP1, FRAME_VARG
4613 |1:
4614 | sd RB, FRAME_FUNC(BASE) // Copy function down, but keep PC.
4615 | sltiu AT, TMP3, 2 // (> FF_C) Calling a fast function?
4616 | move TMP2, BASE
4617 | move RB, CARG3
4618 | beqz NARGS8:RC, >3
4619 |. move TMP3, NARGS8:RC
4620 |2:
4621 | ld CRET1, 0(RA)
4622 | daddiu RA, RA, 8
4623 | addiu TMP3, TMP3, -8
4624 | sd CRET1, 0(TMP2)
4625 | bnez TMP3, <2
4626 |. daddiu TMP2, TMP2, 8
4627 |3:
4628 | or TMP0, TMP0, AT
4629 | beqz TMP0, >5
4630 |. nop
4631 |4:
4632 | ins_callt
4633 |
4634 |5: // Tailcall to a fast function with a Lua frame below.
4635 | lw INS, -4(TMP1)
4636 | decode_RA8a RA, INS
4637 | decode_RA8b RA
4638 | dsubu TMP1, BASE, RA
4639 | ld TMP1, -32(TMP1)
4640 | cleartp LFUNC:TMP1
4641 | ld TMP1, LFUNC:TMP1->pc
4642 | b <4
4643 |. ld KBASE, PC2PROTO(k)(TMP1) // Need to prepare KBASE.
4644 |
4645 |7: // Tailcall from a vararg function.
4646 | andi AT, TMP2, FRAME_TYPEP
4647 | bnez AT, <1 // Vararg frame below?
4648 |. dsubu TMP2, BASE, TMP2 // Relocate BASE down.
4649 | move BASE, TMP2
4650 | ld TMP1, FRAME_PC(TMP2)
4651 | b <1
4652 |. andi TMP0, TMP1, FRAME_TYPE
4653 break;
4654
4655 case BC_ITERC:
4656 | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 ((2+1)*8))
4657 | move TMP2, BASE // Save old BASE fir vmeta_call.
4658 | daddu BASE, BASE, RA
4659 | ld RB, -24(BASE)
4660 | ld CARG1, -16(BASE)
4661 | ld CARG2, -8(BASE)
4662 | li NARGS8:RC, 16 // Iterators get 2 arguments.
4663 | sd RB, 0(BASE) // Copy callable.
4664 | sd CARG1, 16(BASE) // Copy state.
4665 | sd CARG2, 24(BASE) // Copy control var.
4666 | daddiu BASE, BASE, 16
4667 | checkfunc RB, ->vmeta_call
4668 | ins_call
4669 break;
4670
4671 case BC_ITERN:
4672 | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 (2+1)*8)
4673 |.if JIT
4674 | // NYI: add hotloop, record BC_ITERN.
4675 |.endif
4676 | daddu RA, BASE, RA
4677 | ld TAB:RB, -16(RA)
4678 | lw RC, -8+LO(RA) // Get index from control var.
4679 | cleartp TAB:RB
4680 | daddiu PC, PC, 4
4681 | lw TMP0, TAB:RB->asize
4682 | ld TMP1, TAB:RB->array
4683 | dsll CARG3, TISNUM, 47
4684 |1: // Traverse array part.
4685 | sltu AT, RC, TMP0
4686 | beqz AT, >5 // Index points after array part?
4687 |. sll TMP3, RC, 3
4688 | daddu TMP3, TMP1, TMP3
4689 | ld CARG1, 0(TMP3)
4690 | lhu RD, -4+OFS_RD(PC)
4691 | or TMP2, RC, CARG3
4692 | beq CARG1, TISNIL, <1 // Skip holes in array part.
4693 |. addiu RC, RC, 1
4694 | sd TMP2, 0(RA)
4695 | sd CARG1, 8(RA)
4696 | or TMP0, RC, CARG3
4697 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
4698 | decode_RD4b RD
4699 | daddu RD, RD, TMP3
4700 | sw TMP0, -8+LO(RA) // Update control var.
4701 | daddu PC, PC, RD
4702 |3:
4703 | ins_next
4704 |
4705 |5: // Traverse hash part.
4706 | lw TMP1, TAB:RB->hmask
4707 | subu RC, RC, TMP0
4708 | ld TMP2, TAB:RB->node
4709 |6:
4710 | sltu AT, TMP1, RC // End of iteration? Branch to ITERL+1.
4711 | bnez AT, <3
4712 |. sll TMP3, RC, 5
4713 | sll RB, RC, 3
4714 | subu TMP3, TMP3, RB
4715 | daddu NODE:TMP3, TMP3, TMP2
4716 | ld CARG1, 0(NODE:TMP3)
4717 | lhu RD, -4+OFS_RD(PC)
4718 | beq CARG1, TISNIL, <6 // Skip holes in hash part.
4719 |. addiu RC, RC, 1
4720 | ld CARG2, NODE:TMP3->key
4721 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
4722 | sd CARG1, 8(RA)
4723 | addu RC, RC, TMP0
4724 | decode_RD4b RD
4725 | addu RD, RD, TMP3
4726 | sd CARG2, 0(RA)
4727 | daddu PC, PC, RD
4728 | b <3
4729 |. sw RC, -8+LO(RA) // Update control var.
4730 break;
4731
4732 case BC_ISNEXT:
4733 | // RA = base*8, RD = target (points to ITERN)
4734 | daddu RA, BASE, RA
4735 | srl TMP0, RD, 1
4736 | ld CFUNC:CARG1, -24(RA)
4737 | daddu TMP0, PC, TMP0
4738 | ld CARG2, -16(RA)
4739 | ld CARG3, -8(RA)
4740 | lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535)
4741 | checkfunc CFUNC:CARG1, >5
4742 | gettp CARG2, CARG2
4743 | daddiu CARG2, CARG2, -LJ_TTAB
4744 | lbu TMP1, CFUNC:CARG1->ffid
4745 | daddiu CARG3, CARG3, -LJ_TNIL
4746 | or AT, CARG2, CARG3
4747 | daddiu TMP1, TMP1, -FF_next_N
4748 | or AT, AT, TMP1
4749 | bnez AT, >5
4750 |. lui TMP1, 0xfffe
4751 | daddu PC, TMP0, TMP2
4752 | ori TMP1, TMP1, 0x7fff
4753 | dsll TMP1, TMP1, 32
4754 | sd TMP1, -8(RA)
4755 |1:
4756 | ins_next
4757 |5: // Despecialize bytecode if any of the checks fail.
4758 | li TMP3, BC_JMP
4759 | li TMP1, BC_ITERC
4760 | sb TMP3, -4+OFS_OP(PC)
4761 | daddu PC, TMP0, TMP2
4762 | b <1
4763 |. sb TMP1, OFS_OP(PC)
4764 break;
4765
4766 case BC_VARG:
4767 | // RA = base*8, RB = (nresults+1)*8, RC = numparams*8
4768 | ld TMP0, FRAME_PC(BASE)
4769 | decode_RDtoRC8 RC, RD
4770 | decode_RB8a RB, INS
4771 | daddu RC, BASE, RC
4772 | decode_RB8b RB
4773 | daddu RA, BASE, RA
4774 | daddiu RC, RC, FRAME_VARG
4775 | daddu TMP2, RA, RB
4776 | daddiu TMP3, BASE, -16 // TMP3 = vtop
4777 | dsubu RC, RC, TMP0 // RC = vbase
4778 | // Note: RC may now be even _above_ BASE if nargs was < numparams.
4779 | beqz RB, >5 // Copy all varargs?
4780 |. dsubu TMP1, TMP3, RC
4781 | daddiu TMP2, TMP2, -16
4782 |1: // Copy vararg slots to destination slots.
4783 | ld CARG1, 0(RC)
4784 | sltu AT, RC, TMP3
4785 | daddiu RC, RC, 8
4786 |.if MIPSR6
4787 | selnez CARG1, CARG1, AT
4788 | seleqz AT, TISNIL, AT
4789 | or CARG1, CARG1, AT
4790 |.else
4791 | movz CARG1, TISNIL, AT
4792 |.endif
4793 | sd CARG1, 0(RA)
4794 | sltu AT, RA, TMP2
4795 | bnez AT, <1
4796 |. daddiu RA, RA, 8
4797 |3:
4798 | ins_next
4799 |
4800 |5: // Copy all varargs.
4801 | ld TMP0, L->maxstack
4802 | blez TMP1, <3 // No vararg slots?
4803 |. li MULTRES, 8 // MULTRES = (0+1)*8
4804 | daddu TMP2, RA, TMP1
4805 | sltu AT, TMP0, TMP2
4806 | bnez AT, >7
4807 |. daddiu MULTRES, TMP1, 8
4808 |6:
4809 | ld CRET1, 0(RC)
4810 | daddiu RC, RC, 8
4811 | sd CRET1, 0(RA)
4812 | sltu AT, RC, TMP3
4813 | bnez AT, <6 // More vararg slots?
4814 |. daddiu RA, RA, 8
4815 | b <3
4816 |. nop
4817 |
4818 |7: // Grow stack for varargs.
4819 | load_got lj_state_growstack
4820 | sd RA, L->top
4821 | dsubu RA, RA, BASE
4822 | sd BASE, L->base
4823 | dsubu BASE, RC, BASE // Need delta, because BASE may change.
4824 | sd PC, SAVE_PC
4825 | srl CARG2, TMP1, 3
4826 | call_intern lj_state_growstack // (lua_State *L, int n)
4827 |. move CARG1, L
4828 | move RC, BASE
4829 | ld BASE, L->base
4830 | daddu RA, BASE, RA
4831 | daddu RC, BASE, RC
4832 | b <6
4833 |. daddiu TMP3, BASE, -16
4834 break;
4835
4836 /* -- Returns ----------------------------------------------------------- */
4837
4838 case BC_RETM:
4839 | // RA = results*8, RD = extra_nresults*8
4840 | addu RD, RD, MULTRES // MULTRES >= 8, so RD >= 8.
4841 | // Fall through. Assumes BC_RET follows.
4842 break;
4843
4844 case BC_RET:
4845 | // RA = results*8, RD = (nresults+1)*8
4846 | ld PC, FRAME_PC(BASE)
4847 | daddu RA, BASE, RA
4848 | move MULTRES, RD
4849 |1:
4850 | andi TMP0, PC, FRAME_TYPE
4851 | bnez TMP0, ->BC_RETV_Z
4852 |. xori TMP1, PC, FRAME_VARG
4853 |
4854 |->BC_RET_Z:
4855 | // BASE = base, RA = resultptr, RD = (nresults+1)*8, PC = return
4856 | lw INS, -4(PC)
4857 | daddiu TMP2, BASE, -16
4858 | daddiu RC, RD, -8
4859 | decode_RA8a TMP0, INS
4860 | decode_RB8a RB, INS
4861 | decode_RA8b TMP0
4862 | decode_RB8b RB
4863 | daddu TMP3, TMP2, RB
4864 | beqz RC, >3
4865 |. dsubu BASE, TMP2, TMP0
4866 |2:
4867 | ld CRET1, 0(RA)
4868 | daddiu RA, RA, 8
4869 | daddiu RC, RC, -8
4870 | sd CRET1, 0(TMP2)
4871 | bnez RC, <2
4872 |. daddiu TMP2, TMP2, 8
4873 |3:
4874 | daddiu TMP3, TMP3, -8
4875 |5:
4876 | sltu AT, TMP2, TMP3
4877 | bnez AT, >6
4878 |. ld LFUNC:TMP1, FRAME_FUNC(BASE)
4879 | ins_next1
4880 | cleartp LFUNC:TMP1
4881 | ld TMP1, LFUNC:TMP1->pc
4882 | ld KBASE, PC2PROTO(k)(TMP1)
4883 | ins_next2
4884 |
4885 |6: // Fill up results with nil.
4886 | sd TISNIL, 0(TMP2)
4887 | b <5
4888 |. daddiu TMP2, TMP2, 8
4889 |
4890 |->BC_RETV_Z: // Non-standard return case.
4891 | andi TMP2, TMP1, FRAME_TYPEP
4892 | bnez TMP2, ->vm_return
4893 |. nop
4894 | // Return from vararg function: relocate BASE down.
4895 | dsubu BASE, BASE, TMP1
4896 | b <1
4897 |. ld PC, FRAME_PC(BASE)
4898 break;
4899
4900 case BC_RET0: case BC_RET1:
4901 | // RA = results*8, RD = (nresults+1)*8
4902 | ld PC, FRAME_PC(BASE)
4903 | daddu RA, BASE, RA
4904 | move MULTRES, RD
4905 | andi TMP0, PC, FRAME_TYPE
4906 | bnez TMP0, ->BC_RETV_Z
4907 |. xori TMP1, PC, FRAME_VARG
4908 | lw INS, -4(PC)
4909 | daddiu TMP2, BASE, -16
4910 if (op == BC_RET1) {
4911 | ld CRET1, 0(RA)
4912 }
4913 | decode_RB8a RB, INS
4914 | decode_RA8a RA, INS
4915 | decode_RB8b RB
4916 | decode_RA8b RA
4917 | dsubu BASE, TMP2, RA
4918 if (op == BC_RET1) {
4919 | sd CRET1, 0(TMP2)
4920 }
4921 |5:
4922 | sltu AT, RD, RB
4923 | bnez AT, >6
4924 |. ld TMP1, FRAME_FUNC(BASE)
4925 | ins_next1
4926 | cleartp LFUNC:TMP1
4927 | ld TMP1, LFUNC:TMP1->pc
4928 | ld KBASE, PC2PROTO(k)(TMP1)
4929 | ins_next2
4930 |
4931 |6: // Fill up results with nil.
4932 | daddiu TMP2, TMP2, 8
4933 | daddiu RD, RD, 8
4934 | b <5
4935 if (op == BC_RET1) {
4936 |. sd TISNIL, 0(TMP2)
4937 } else {
4938 |. sd TISNIL, -8(TMP2)
4939 }
4940 break;
4941
4942 /* -- Loops and branches ------------------------------------------------ */
4943
4944 case BC_FORL:
4945 |.if JIT
4946 | hotloop
4947 |.endif
4948 | // Fall through. Assumes BC_IFORL follows.
4949 break;
4950
4951 case BC_JFORI:
4952 case BC_JFORL:
4953#if !LJ_HASJIT
4954 break;
4955#endif
4956 case BC_FORI:
4957 case BC_IFORL:
4958 | // RA = base*8, RD = target (after end of loop or start of loop)
4959 vk = (op == BC_IFORL || op == BC_JFORL);
4960 | daddu RA, BASE, RA
4961 | ld CARG1, FORL_IDX*8(RA) // IDX CARG1 - CARG3 type
4962 | gettp CARG3, CARG1
4963 if (op != BC_JFORL) {
4964 | srl RD, RD, 1
4965 | lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535)
4966 | daddu TMP2, RD, TMP2
4967 }
4968 if (!vk) {
4969 | ld CARG2, FORL_STOP*8(RA) // STOP CARG2 - CARG4 type
4970 | ld CRET1, FORL_STEP*8(RA) // STEP CRET1 - CRET2 type
4971 | gettp CARG4, CARG2
4972 | bne CARG3, TISNUM, >5
4973 |. gettp CRET2, CRET1
4974 | bne CARG4, TISNUM, ->vmeta_for
4975 |. sextw CARG3, CARG1
4976 | bne CRET2, TISNUM, ->vmeta_for
4977 |. sextw CARG2, CARG2
4978 | dext AT, CRET1, 31, 0
4979 | slt CRET1, CARG2, CARG3
4980 | slt TMP1, CARG3, CARG2
4981 |.if MIPSR6
4982 | selnez TMP1, TMP1, AT
4983 | seleqz CRET1, CRET1, AT
4984 | or CRET1, CRET1, TMP1
4985 |.else
4986 | movn CRET1, TMP1, AT
4987 |.endif
4988 } else {
4989 | bne CARG3, TISNUM, >5
4990 |. ld CARG2, FORL_STEP*8(RA) // STEP CARG2 - CARG4 type
4991 | ld CRET1, FORL_STOP*8(RA) // STOP CRET1 - CRET2 type
4992 | sextw TMP3, CARG1
4993 | sextw CARG2, CARG2
4994 | sextw CRET1, CRET1
4995 | addu CARG1, TMP3, CARG2
4996 | xor TMP0, CARG1, TMP3
4997 | xor TMP1, CARG1, CARG2
4998 | and TMP0, TMP0, TMP1
4999 | slt TMP1, CARG1, CRET1
5000 | slt CRET1, CRET1, CARG1
5001 | slt AT, CARG2, r0
5002 | slt TMP0, TMP0, r0 // ((y^a) & (y^b)) < 0: overflow.
5003 |.if MIPSR6
5004 | selnez TMP1, TMP1, AT
5005 | seleqz CRET1, CRET1, AT
5006 | or CRET1, CRET1, TMP1
5007 |.else
5008 | movn CRET1, TMP1, AT
5009 |.endif
5010 | or CRET1, CRET1, TMP0
5011 | zextw CARG1, CARG1
5012 | settp CARG1, TISNUM
5013 }
5014 |1:
5015 if (op == BC_FORI) {
5016 |.if MIPSR6
5017 | selnez TMP2, TMP2, CRET1
5018 |.else
5019 | movz TMP2, r0, CRET1
5020 |.endif
5021 | daddu PC, PC, TMP2
5022 } else if (op == BC_JFORI) {
5023 | daddu PC, PC, TMP2
5024 | lhu RD, -4+OFS_RD(PC)
5025 } else if (op == BC_IFORL) {
5026 |.if MIPSR6
5027 | seleqz TMP2, TMP2, CRET1
5028 |.else
5029 | movn TMP2, r0, CRET1
5030 |.endif
5031 | daddu PC, PC, TMP2
5032 }
5033 if (vk) {
5034 | sd CARG1, FORL_IDX*8(RA)
5035 }
5036 | ins_next1
5037 | sd CARG1, FORL_EXT*8(RA)
5038 |2:
5039 if (op == BC_JFORI) {
5040 | beqz CRET1, =>BC_JLOOP
5041 |. decode_RD8b RD
5042 } else if (op == BC_JFORL) {
5043 | beqz CRET1, =>BC_JLOOP
5044 }
5045 | ins_next2
5046 |
5047 |5: // FP loop.
5048 |.if FPU
5049 if (!vk) {
5050 | ldc1 f0, FORL_IDX*8(RA)
5051 | ldc1 f2, FORL_STOP*8(RA)
5052 | sltiu TMP0, CARG3, LJ_TISNUM
5053 | sltiu TMP1, CARG4, LJ_TISNUM
5054 | sltiu AT, CRET2, LJ_TISNUM
5055 | ld TMP3, FORL_STEP*8(RA)
5056 | and TMP0, TMP0, TMP1
5057 | and AT, AT, TMP0
5058 | beqz AT, ->vmeta_for
5059 |. slt TMP3, TMP3, r0
5060 |.if MIPSR6
5061 | dmtc1 TMP3, FTMP2
5062 | cmp.lt.d FTMP0, f0, f2
5063 | cmp.lt.d FTMP1, f2, f0
5064 | sel.d FTMP2, FTMP1, FTMP0
5065 | b <1
5066 |. dmfc1 CRET1, FTMP2
5067 |.else
5068 | c.ole.d 0, f0, f2
5069 | c.ole.d 1, f2, f0
5070 | li CRET1, 1
5071 | movt CRET1, r0, 0
5072 | movt AT, r0, 1
5073 | b <1
5074 |. movn CRET1, AT, TMP3
5075 |.endif
5076 } else {
5077 | ldc1 f0, FORL_IDX*8(RA)
5078 | ldc1 f4, FORL_STEP*8(RA)
5079 | ldc1 f2, FORL_STOP*8(RA)
5080 | ld TMP3, FORL_STEP*8(RA)
5081 | add.d f0, f0, f4
5082 |.if MIPSR6
5083 | slt TMP3, TMP3, r0
5084 | dmtc1 TMP3, FTMP2
5085 | cmp.lt.d FTMP0, f0, f2
5086 | cmp.lt.d FTMP1, f2, f0
5087 | sel.d FTMP2, FTMP1, FTMP0
5088 | dmfc1 CRET1, FTMP2
5089 if (op == BC_IFORL) {
5090 | seleqz TMP2, TMP2, CRET1
5091 | daddu PC, PC, TMP2
5092 }
5093 |.else
5094 | c.ole.d 0, f0, f2
5095 | c.ole.d 1, f2, f0
5096 | slt TMP3, TMP3, r0
5097 | li CRET1, 1
5098 | li AT, 1
5099 | movt CRET1, r0, 0
5100 | movt AT, r0, 1
5101 | movn CRET1, AT, TMP3
5102 if (op == BC_IFORL) {
5103 | movn TMP2, r0, CRET1
5104 | daddu PC, PC, TMP2
5105 }
5106 |.endif
5107 | sdc1 f0, FORL_IDX*8(RA)
5108 | ins_next1
5109 | b <2
5110 |. sdc1 f0, FORL_EXT*8(RA)
5111 }
5112 |.else
5113 if (!vk) {
5114 | sltiu TMP0, CARG3, LJ_TISNUM
5115 | sltiu TMP1, CARG4, LJ_TISNUM
5116 | sltiu AT, CRET2, LJ_TISNUM
5117 | and TMP0, TMP0, TMP1
5118 | and AT, AT, TMP0
5119 | beqz AT, ->vmeta_for
5120 |. nop
5121 | bal ->vm_sfcmpolex
5122 |. lw TMP3, FORL_STEP*8+HI(RA)
5123 | b <1
5124 |. nop
5125 } else {
5126 | load_got __adddf3
5127 | call_extern
5128 |. sw TMP2, TMPD
5129 | ld CARG2, FORL_STOP*8(RA)
5130 | move CARG1, CRET1
5131 if ( op == BC_JFORL ) {
5132 | lhu RD, -4+OFS_RD(PC)
5133 | decode_RD8b RD
5134 }
5135 | bal ->vm_sfcmpolex
5136 |. lw TMP3, FORL_STEP*8+HI(RA)
5137 | b <1
5138 |. lw TMP2, TMPD
5139 }
5140 |.endif
5141 break;
5142
5143 case BC_ITERL:
5144 |.if JIT
5145 | hotloop
5146 |.endif
5147 | // Fall through. Assumes BC_IITERL follows.
5148 break;
5149
5150 case BC_JITERL:
5151#if !LJ_HASJIT
5152 break;
5153#endif
5154 case BC_IITERL:
5155 | // RA = base*8, RD = target
5156 | daddu RA, BASE, RA
5157 | ld TMP1, 0(RA)
5158 | beq TMP1, TISNIL, >1 // Stop if iterator returned nil.
5159 |. nop
5160 if (op == BC_JITERL) {
5161 | b =>BC_JLOOP
5162 |. sd TMP1, -8(RA)
5163 } else {
5164 | branch_RD // Otherwise save control var + branch.
5165 | sd TMP1, -8(RA)
5166 }
5167 |1:
5168 | ins_next
5169 break;
5170
5171 case BC_LOOP:
5172 | // RA = base*8, RD = target (loop extent)
5173 | // Note: RA/RD is only used by trace recorder to determine scope/extent
5174 | // This opcode does NOT jump, it's only purpose is to detect a hot loop.
5175 |.if JIT
5176 | hotloop
5177 |.endif
5178 | // Fall through. Assumes BC_ILOOP follows.
5179 break;
5180
5181 case BC_ILOOP:
5182 | // RA = base*8, RD = target (loop extent)
5183 | ins_next
5184 break;
5185
5186 case BC_JLOOP:
5187 |.if JIT
5188 | // RA = base*8 (ignored), RD = traceno*8
5189 | ld TMP1, DISPATCH_J(trace)(DISPATCH)
5190 | li AT, 0
5191 | daddu TMP1, TMP1, RD
5192 | // Traces on MIPS don't store the trace number, so use 0.
5193 | sd AT, DISPATCH_GL(vmstate)(DISPATCH)
5194 | ld TRACE:TMP2, 0(TMP1)
5195 | sd BASE, DISPATCH_GL(jit_base)(DISPATCH)
5196 | ld TMP2, TRACE:TMP2->mcode
5197 | sd L, DISPATCH_GL(tmpbuf.L)(DISPATCH)
5198 | jr TMP2
5199 |. daddiu JGL, DISPATCH, GG_DISP2G+32768
5200 |.endif
5201 break;
5202
5203 case BC_JMP:
5204 | // RA = base*8 (only used by trace recorder), RD = target
5205 | branch_RD
5206 | ins_next
5207 break;
5208
5209 /* -- Function headers -------------------------------------------------- */
5210
5211 case BC_FUNCF:
5212 |.if JIT
5213 | hotcall
5214 |.endif
5215 case BC_FUNCV: /* NYI: compiled vararg functions. */
5216 | // Fall through. Assumes BC_IFUNCF/BC_IFUNCV follow.
5217 break;
5218
5219 case BC_JFUNCF:
5220#if !LJ_HASJIT
5221 break;
5222#endif
5223 case BC_IFUNCF:
5224 | // BASE = new base, RA = BASE+framesize*8, RB = LFUNC, RC = nargs*8
5225 | ld TMP2, L->maxstack
5226 | lbu TMP1, -4+PC2PROTO(numparams)(PC)
5227 | ld KBASE, -4+PC2PROTO(k)(PC)
5228 | sltu AT, TMP2, RA
5229 | bnez AT, ->vm_growstack_l
5230 |. sll TMP1, TMP1, 3
5231 if (op != BC_JFUNCF) {
5232 | ins_next1
5233 }
5234 |2:
5235 | sltu AT, NARGS8:RC, TMP1 // Check for missing parameters.
5236 | bnez AT, >3
5237 |. daddu AT, BASE, NARGS8:RC
5238 if (op == BC_JFUNCF) {
5239 | decode_RD8a RD, INS
5240 | b =>BC_JLOOP
5241 |. decode_RD8b RD
5242 } else {
5243 | ins_next2
5244 }
5245 |
5246 |3: // Clear missing parameters.
5247 | sd TISNIL, 0(AT)
5248 | b <2
5249 |. addiu NARGS8:RC, NARGS8:RC, 8
5250 break;
5251
5252 case BC_JFUNCV:
5253#if !LJ_HASJIT
5254 break;
5255#endif
5256 | NYI // NYI: compiled vararg functions
5257 break; /* NYI: compiled vararg functions. */
5258
5259 case BC_IFUNCV:
5260 | // BASE = new base, RA = BASE+framesize*8, RB = LFUNC, RC = nargs*8
5261 | li TMP0, LJ_TFUNC
5262 | daddu TMP1, BASE, RC
5263 | ld TMP2, L->maxstack
5264 | settp LFUNC:RB, TMP0
5265 | daddu TMP0, RA, RC
5266 | sd LFUNC:RB, 0(TMP1) // Store (tagged) copy of LFUNC.
5267 | daddiu TMP3, RC, 16+FRAME_VARG
5268 | sltu AT, TMP0, TMP2
5269 | ld KBASE, -4+PC2PROTO(k)(PC)
5270 | beqz AT, ->vm_growstack_l
5271 |. sd TMP3, 8(TMP1) // Store delta + FRAME_VARG.
5272 | lbu TMP2, -4+PC2PROTO(numparams)(PC)
5273 | move RA, BASE
5274 | move RC, TMP1
5275 | ins_next1
5276 | beqz TMP2, >3
5277 |. daddiu BASE, TMP1, 16
5278 |1:
5279 | ld TMP0, 0(RA)
5280 | sltu AT, RA, RC // Less args than parameters?
5281 | move CARG1, TMP0
5282 |.if MIPSR6
5283 | selnez TMP0, TMP0, AT
5284 | seleqz TMP3, TISNIL, AT
5285 | or TMP0, TMP0, TMP3
5286 | seleqz TMP3, CARG1, AT
5287 | selnez CARG1, TISNIL, AT
5288 | or CARG1, CARG1, TMP3
5289 |.else
5290 | movz TMP0, TISNIL, AT // Clear missing parameters.
5291 | movn CARG1, TISNIL, AT // Clear old fixarg slot (help the GC).
5292 |.endif
5293 | addiu TMP2, TMP2, -1
5294 | sd TMP0, 16(TMP1)
5295 | daddiu TMP1, TMP1, 8
5296 | sd CARG1, 0(RA)
5297 | bnez TMP2, <1
5298 |. daddiu RA, RA, 8
5299 |3:
5300 | ins_next2
5301 break;
5302
5303 case BC_FUNCC:
5304 case BC_FUNCCW:
5305 | // BASE = new base, RA = BASE+framesize*8, RB = CFUNC, RC = nargs*8
5306 if (op == BC_FUNCC) {
5307 | ld CFUNCADDR, CFUNC:RB->f
5308 } else {
5309 | ld CFUNCADDR, DISPATCH_GL(wrapf)(DISPATCH)
5310 }
5311 | daddu TMP1, RA, NARGS8:RC
5312 | ld TMP2, L->maxstack
5313 | daddu RC, BASE, NARGS8:RC
5314 | sd BASE, L->base
5315 | sltu AT, TMP2, TMP1
5316 | sd RC, L->top
5317 | li_vmstate C
5318 if (op == BC_FUNCCW) {
5319 | ld CARG2, CFUNC:RB->f
5320 }
5321 | bnez AT, ->vm_growstack_c // Need to grow stack.
5322 |. move CARG1, L
5323 | jalr CFUNCADDR // (lua_State *L [, lua_CFunction f])
5324 |. st_vmstate
5325 | // Returns nresults.
5326 | ld BASE, L->base
5327 | sll RD, CRET1, 3
5328 | ld TMP1, L->top
5329 | li_vmstate INTERP
5330 | ld PC, FRAME_PC(BASE) // Fetch PC of caller.
5331 | dsubu RA, TMP1, RD // RA = L->top - nresults*8
5332 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
5333 | b ->vm_returnc
5334 |. st_vmstate
5335 break;
5336
5337 /* ---------------------------------------------------------------------- */
5338
5339 default:
5340 fprintf(stderr, "Error: undefined opcode BC_%s\n", bc_names[op]);
5341 exit(2);
5342 break;
5343 }
5344}
5345
5346static int build_backend(BuildCtx *ctx)
5347{
5348 int op;
5349
5350 dasm_growpc(Dst, BC__MAX);
5351
5352 build_subroutines(ctx);
5353
5354 |.code_op
5355 for (op = 0; op < BC__MAX; op++)
5356 build_ins(ctx, (BCOp)op, op);
5357
5358 return BC__MAX;
5359}
5360
5361/* Emit pseudo frame-info for all assembler functions. */
5362static void emit_asm_debug(BuildCtx *ctx)
5363{
5364 int fcofs = (int)((uint8_t *)ctx->glob[GLOB_vm_ffi_call] - ctx->code);
5365 int i;
5366 switch (ctx->mode) {
5367 case BUILD_elfasm:
5368 fprintf(ctx->fp, "\t.section .debug_frame,\"\",@progbits\n");
5369 fprintf(ctx->fp,
5370 ".Lframe0:\n"
5371 "\t.4byte .LECIE0-.LSCIE0\n"
5372 ".LSCIE0:\n"
5373 "\t.4byte 0xffffffff\n"
5374 "\t.byte 0x1\n"
5375 "\t.string \"\"\n"
5376 "\t.uleb128 0x1\n"
5377 "\t.sleb128 -4\n"
5378 "\t.byte 31\n"
5379 "\t.byte 0xc\n\t.uleb128 29\n\t.uleb128 0\n"
5380 "\t.align 2\n"
5381 ".LECIE0:\n\n");
5382 fprintf(ctx->fp,
5383 ".LSFDE0:\n"
5384 "\t.4byte .LEFDE0-.LASFDE0\n"
5385 ".LASFDE0:\n"
5386 "\t.4byte .Lframe0\n"
5387 "\t.8byte .Lbegin\n"
5388 "\t.8byte %d\n"
5389 "\t.byte 0xe\n\t.uleb128 %d\n"
5390 "\t.byte 0x9f\n\t.sleb128 2*5\n"
5391 "\t.byte 0x9e\n\t.sleb128 2*6\n",
5392 fcofs, CFRAME_SIZE);
5393 for (i = 23; i >= 16; i--)
5394 fprintf(ctx->fp, "\t.byte %d\n\t.uleb128 %d\n", 0x80+i, 2*(30-i));
5395#if !LJ_SOFTFP
5396 for (i = 31; i >= 24; i--)
5397 fprintf(ctx->fp, "\t.byte %d\n\t.uleb128 %d\n", 0x80+32+i, 2*(46-i));
5398#endif
5399 fprintf(ctx->fp,
5400 "\t.align 2\n"
5401 ".LEFDE0:\n\n");
5402#if LJ_HASFFI
5403 fprintf(ctx->fp,
5404 ".LSFDE1:\n"
5405 "\t.4byte .LEFDE1-.LASFDE1\n"
5406 ".LASFDE1:\n"
5407 "\t.4byte .Lframe0\n"
5408 "\t.4byte lj_vm_ffi_call\n"
5409 "\t.4byte %d\n"
5410 "\t.byte 0x9f\n\t.uleb128 2*1\n"
5411 "\t.byte 0x90\n\t.uleb128 2*2\n"
5412 "\t.byte 0xd\n\t.uleb128 0x10\n"
5413 "\t.align 2\n"
5414 ".LEFDE1:\n\n", (int)ctx->codesz - fcofs);
5415#endif
5416#if !LJ_NO_UNWIND
5417 /* NYI */
5418#endif
5419 break;
5420 default:
5421 break;
5422 }
5423}
5424
generated by cgit v1.2.3-55-g6feb (git 2.39.1) at 2025-04-25 16:44:45 +0000