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* Bump copyright date.Mike Pall2025-01-131-1/+1
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* Fix detection of inconsistent renames due to sunk values.Mike Pall2024-11-281-2/+2
| | | | Thanks to Sergey Kaplun. #1295 #584
* Bump copyright date.Mike Pall2023-08-201-1/+1
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* Fix base register coalescing in side trace.Mike Pall2023-07-121-1/+6
| | | | Thanks to Sergey Kaplun, NiLuJe and Peter Cawley. #1031 #1016
* Fix register mask for stack check in head of side trace.Mike Pall2023-07-081-1/+3
| | | | Analyzed by Sergey Kaplun. #1016
* Bump copyright date.Mike Pall2022-01-151-1/+1
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* Detect inconsistent renames even in the presence of sunk values.Mike Pall2021-03-231-13/+12
| | | | Reported by Igor Munkin.
* Bump copyright date.Mike Pall2021-01-021-1/+1
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* Ensure full init of IR_NOP instructions.Mike Pall2020-10-121-1/+1
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* Bump copyright date.Mike Pall2020-01-201-1/+1
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* Typo.Mike Pall2019-12-081-1/+0
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* ARM: Fix GCC 7 -Wimplicit-fallthrough warnings.Mike Pall2019-04-291-1/+1
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* Fix GCC 7 -Wimplicit-fallthrough warnings.Mike Pall2018-01-291-1/+2
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* Bump copyright date to 2017.Mike Pall2017-01-171-1/+1
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* Bump copyright date to 2016.Mike Pall2016-03-031-1/+1
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* Bump copyright date to 2015.Mike Pall2015-01-051-1/+1
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* Fix snapshot #0 handling for traces with a stack check on entry.Mike Pall2014-11-281-0/+5
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* Fix fused constant loads under high register pressure.Mike Pall2014-10-081-0/+1
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* Don't access dangling reference to reallocated IR.Mike Pall2014-03-061-9/+11
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* Bump copyright date to 2014.Mike Pall2014-01-161-1/+1
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* Handle calls with max. args in backends even after SPLIT.Mike Pall2013-05-161-1/+1
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* Fix spurious red zone overflows in machine code generation.Mike Pall2013-04-041-2/+28
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* Bump copyright date to 2013.Mike Pall2013-02-111-1/+1
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* Fix CONV.num.int sinking.Mike Pall2012-11-061-3/+12
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* FFI: Fix code generation for replay of sunk float fields.Mike Pall2012-10-291-1/+1
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* x86: Fix register allocation for calls returning register pair.Mike Pall2012-09-271-1/+5
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* ARM, PPC, MIPS: Improve XLOAD operand fusion and register hinting.Mike Pall2012-08-271-1/+5
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* Fix compilation with FFI disabled.Mike Pall2012-08-261-2/+2
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* ARM: Fix base register coalescing.Mike Pall2012-08-251-0/+1
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* ARM, MIPS, PPC: Rematerialize FPR invariants first.Mike Pall2012-08-191-2/+11
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* ARM: Add VFP and hard-float ABI variants to JIT compiler.Mike Pall2012-08-091-1/+2
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* Limit number of parent links handled by backend.Mike Pall2012-07-111-0/+2
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* Use an explicit flag to signal SINK tags for a trace.Mike Pall2012-07-111-4/+3
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* Don't allocate constants for sunk stores.Mike Pall2012-07-091-1/+1
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* Drop range limit for sunk stores relative to sunk allocation.Mike Pall2012-07-041-2/+19
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* Fix compiler warnings.Mike Pall2012-07-031-1/+1
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* Add allocation sinking and store sinking optimization.Mike Pall2012-07-021-15/+52
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* Add IR_PVAL instruction for non-slot parent links.Mike Pall2012-07-021-1/+1
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* Add explicit IR_GCSTEP instruction.Mike Pall2012-07-021-3/+18
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* Clean up RegSP handling for parent link instructions.Mike Pall2012-07-011-71/+41
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* Fix PHI stack slot syncing.Mike Pall2012-05-071-1/+64
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* MIPS: Integrate and enable JIT compiler.Mike Pall2012-03-301-6/+18
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* Add missing mcode limit check in assembler backend.Mike Pall2012-03-121-1/+3
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* Bump copyright date to 2012.Mike Pall2012-01-231-1/+1
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* Move helper for syncing data/instruction cache to lj_mcode.c.Mike Pall2011-12-121-44/+1
| | | | Sync caches after dynamic code generation for FFI callbacks.
* Keep maximum frame extent in snap->topslot.Mike Pall2011-11-201-27/+20
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* Fix hint-based register allocation in ra_dest().Mike Pall2011-11-141-1/+1
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* ARM: Fix IR splitting for softfp XLOAD.Mike Pall2011-11-111-1/+3
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* FFI: Compile calls to stdcall, fastcall and vararg functions.Mike Pall2011-10-271-1/+10
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* PPC: Integrate and enable JIT compiler.Mike Pall2011-10-241-1/+5
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