From 71db0cf04357391beb01732af691a4df25298911 Mon Sep 17 00:00:00 2001
From: Mike Pall <mike>
Date: Mon, 19 Jul 2021 16:11:39 +0200
Subject: Add IRCONV_NONE for pass-through INT to I64/U64 type change.

---
 src/jit/dump.lua   | 4 +++-
 src/lj_asm_arm64.h | 2 +-
 src/lj_asm_mips.h  | 2 +-
 src/lj_asm_x86.h   | 2 +-
 src/lj_ir.h        | 1 +
 5 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/jit/dump.lua b/src/jit/dump.lua
index abd72287..34ced76d 100644
--- a/src/jit/dump.lua
+++ b/src/jit/dump.lua
@@ -278,7 +278,9 @@ local litname = {
     s = irtype[band(shr(mode, 5), 31)].."."..s
     if band(mode, 0x800) ~= 0 then s = s.." sext" end
     local c = shr(mode, 12)
-    if c == 2 then s = s.." index" elseif c == 3 then s = s.." check" end
+    if c == 1 then s = s.." none"
+    elseif c == 2 then s = s.." index"
+    elseif c == 3 then s = s.." check" end
     t[mode] = s
     return s
   end}),
diff --git a/src/lj_asm_arm64.h b/src/lj_asm_arm64.h
index f6e99d9c..c9ba7b7b 100644
--- a/src/lj_asm_arm64.h
+++ b/src/lj_asm_arm64.h
@@ -602,7 +602,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
 	emit_dn(as, A64I_SXTW, dest, left);
       }
     } else {
-      if (st64) {
+      if (st64 && !(ir->op2 & IRCONV_NONE)) {
 	/* This is either a 32 bit reg/reg mov which zeroes the hiword
 	** or a load of the loword from a 64 bit address.
 	*/
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h
index a3ab2f8e..f775d08b 100644
--- a/src/lj_asm_mips.h
+++ b/src/lj_asm_mips.h
@@ -751,7 +751,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
 	  }
 	}
       } else {
-	if (st64) {
+	if (st64 && !(ir->op2 & IRCONV_NONE)) {
 	  /* This is either a 32 bit reg/reg mov which zeroes the hiword
 	  ** or a load of the loword from a 64 bit address.
 	  */
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h
index 060ed974..715e1535 100644
--- a/src/lj_asm_x86.h
+++ b/src/lj_asm_x86.h
@@ -924,7 +924,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
       }
     } else {
       Reg dest = ra_dest(as, ir, RSET_GPR);
-      if (st64) {
+      if (st64 && !(ir->op2 & IRCONV_NONE)) {
 	Reg left = asm_fuseload(as, lref, RSET_GPR);
 	/* This is either a 32 bit reg/reg mov which zeroes the hiword
 	** or a load of the loword from a 64 bit address.
diff --git a/src/lj_ir.h b/src/lj_ir.h
index f953ff0e..ea8616ec 100644
--- a/src/lj_ir.h
+++ b/src/lj_ir.h
@@ -250,6 +250,7 @@ IRFLDEF(FLENUM)
 #define IRCONV_ANY    (1<<IRCONV_CSH)	/* Any FP number is ok. */
 #define IRCONV_INDEX  (2<<IRCONV_CSH)	/* Check + special backprop rules. */
 #define IRCONV_CHECK  (3<<IRCONV_CSH)	/* Number checked for integerness. */
+#define IRCONV_NONE   IRCONV_ANY	/* INT|*64 no conv, but change type. */
 
 /* TOSTR mode, stored in op2. */
 #define IRTOSTR_INT		0	/* Convert integer to string. */
-- 
cgit v1.2.3-55-g6feb