From e577db52c543303543c9e30e8ebe0c244e1b85c8 Mon Sep 17 00:00:00 2001
From: Mike Pall <mike>
Date: Sat, 19 Nov 2016 19:53:46 +0100
Subject: Increase range of GG_State loads via IR_FLOAD with REF_NIL.

Require 32 bit alignment and store offset/4 instead.
Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
---
 src/lj_asm_mips.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/lj_asm_mips.h')

diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h
index cf446346..0ae5e287 100644
--- a/src/lj_asm_mips.h
+++ b/src/lj_asm_mips.h
@@ -901,7 +901,7 @@ static void asm_fload(ASMState *as, IRIns *ir)
   int32_t ofs;
   if (ir->op1 == REF_NIL) {
     idx = RID_JGL;
-    ofs = ir->op2 - 32768;
+    ofs = (ir->op2 << 2) - 32768;
   } else {
     idx = ra_alloc1(as, ir->op1, RSET_GPR);
     if (ir->op2 == IRFL_TAB_ARRAY) {
-- 
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