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-rw-r--r--src/lib/libcrypto/armv4cpuid.S154
1 files changed, 154 insertions, 0 deletions
diff --git a/src/lib/libcrypto/armv4cpuid.S b/src/lib/libcrypto/armv4cpuid.S
new file mode 100644
index 0000000000..2d618deaa4
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+++ b/src/lib/libcrypto/armv4cpuid.S
@@ -0,0 +1,154 @@
1#include "arm_arch.h"
2
3.text
4.code 32
5
6.align 5
7.global _armv7_neon_probe
8.type _armv7_neon_probe,%function
9_armv7_neon_probe:
10 .word 0xf26ee1fe @ vorr q15,q15,q15
11 .word 0xe12fff1e @ bx lr
12.size _armv7_neon_probe,.-_armv7_neon_probe
13
14.global _armv7_tick
15.type _armv7_tick,%function
16_armv7_tick:
17 mrc p15,0,r0,c9,c13,0
18 .word 0xe12fff1e @ bx lr
19.size _armv7_tick,.-_armv7_tick
20
21.global OPENSSL_atomic_add
22.type OPENSSL_atomic_add,%function
23OPENSSL_atomic_add:
24#if __ARM_ARCH__>=6
25.Ladd: ldrex r2,[r0]
26 add r3,r2,r1
27 strex r2,r3,[r0]
28 cmp r2,#0
29 bne .Ladd
30 mov r0,r3
31 .word 0xe12fff1e @ bx lr
32#else
33 stmdb sp!,{r4-r6,lr}
34 ldr r2,.Lspinlock
35 adr r3,.Lspinlock
36 mov r4,r0
37 mov r5,r1
38 add r6,r3,r2 @ &spinlock
39 b .+8
40.Lspin: bl sched_yield
41 mov r0,#-1
42 swp r0,r0,[r6]
43 cmp r0,#0
44 bne .Lspin
45
46 ldr r2,[r4]
47 add r2,r2,r5
48 str r2,[r4]
49 str r0,[r6] @ release spinlock
50 ldmia sp!,{r4-r6,lr}
51 tst lr,#1
52 moveq pc,lr
53 .word 0xe12fff1e @ bx lr
54#endif
55.size OPENSSL_atomic_add,.-OPENSSL_atomic_add
56
57.global OPENSSL_cleanse
58.type OPENSSL_cleanse,%function
59OPENSSL_cleanse:
60 eor ip,ip,ip
61 cmp r1,#7
62 subhs r1,r1,#4
63 bhs .Lot
64 cmp r1,#0
65 beq .Lcleanse_done
66.Little:
67 strb ip,[r0],#1
68 subs r1,r1,#1
69 bhi .Little
70 b .Lcleanse_done
71
72.Lot: tst r0,#3
73 beq .Laligned
74 strb ip,[r0],#1
75 sub r1,r1,#1
76 b .Lot
77.Laligned:
78 str ip,[r0],#4
79 subs r1,r1,#4
80 bhs .Laligned
81 adds r1,r1,#4
82 bne .Little
83.Lcleanse_done:
84 tst lr,#1
85 moveq pc,lr
86 .word 0xe12fff1e @ bx lr
87.size OPENSSL_cleanse,.-OPENSSL_cleanse
88
89.global OPENSSL_wipe_cpu
90.type OPENSSL_wipe_cpu,%function
91OPENSSL_wipe_cpu:
92 ldr r0,.LOPENSSL_armcap
93 adr r1,.LOPENSSL_armcap
94 ldr r0,[r1,r0]
95 eor r2,r2,r2
96 eor r3,r3,r3
97 eor ip,ip,ip
98 tst r0,#1
99 beq .Lwipe_done
100 .word 0xf3000150 @ veor q0, q0, q0
101 .word 0xf3022152 @ veor q1, q1, q1
102 .word 0xf3044154 @ veor q2, q2, q2
103 .word 0xf3066156 @ veor q3, q3, q3
104 .word 0xf34001f0 @ veor q8, q8, q8
105 .word 0xf34221f2 @ veor q9, q9, q9
106 .word 0xf34441f4 @ veor q10, q10, q10
107 .word 0xf34661f6 @ veor q11, q11, q11
108 .word 0xf34881f8 @ veor q12, q12, q12
109 .word 0xf34aa1fa @ veor q13, q13, q13
110 .word 0xf34cc1fc @ veor q14, q14, q14
111 .word 0xf34ee1fe @ veor q15, q15, q15
112.Lwipe_done:
113 mov r0,sp
114 tst lr,#1
115 moveq pc,lr
116 .word 0xe12fff1e @ bx lr
117.size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
118
119.global OPENSSL_instrument_bus
120.type OPENSSL_instrument_bus,%function
121OPENSSL_instrument_bus:
122 eor r0,r0,r0
123 tst lr,#1
124 moveq pc,lr
125 .word 0xe12fff1e @ bx lr
126.size OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
127
128.global OPENSSL_instrument_bus2
129.type OPENSSL_instrument_bus2,%function
130OPENSSL_instrument_bus2:
131 eor r0,r0,r0
132 tst lr,#1
133 moveq pc,lr
134 .word 0xe12fff1e @ bx lr
135.size OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
136
137.align 5
138.LOPENSSL_armcap:
139.word OPENSSL_armcap_P-.LOPENSSL_armcap
140#if __ARM_ARCH__>=6
141.align 5
142#else
143.Lspinlock:
144.word atomic_add_spinlock-.Lspinlock
145.align 5
146
147.data
148.align 2
149atomic_add_spinlock:
150.word 0
151#endif
152
153.comm OPENSSL_armcap_P,4,4
154.hidden OPENSSL_armcap_P