From 9c47d05a116608c4e65633f11a9f886f0ffdc900 Mon Sep 17 00:00:00 2001
From: kettenis <>
Date: Thu, 17 Jun 2021 12:55:38 +0000
Subject: Like ARM, RISC-V does not implement floating point exceptions.

---
 src/regress/lib/libc/ieeefp/except/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/regress/lib/libc/ieeefp/except')

diff --git a/src/regress/lib/libc/ieeefp/except/Makefile b/src/regress/lib/libc/ieeefp/except/Makefile
index cf73841c4e..0a16eb762e 100644
--- a/src/regress/lib/libc/ieeefp/except/Makefile
+++ b/src/regress/lib/libc/ieeefp/except/Makefile
@@ -1,10 +1,10 @@
-#	$OpenBSD: Makefile,v 1.6 2020/10/18 17:40:06 kettenis Exp $
+#	$OpenBSD: Makefile,v 1.7 2021/06/17 12:55:38 kettenis Exp $
 
 PROG=except
 
 REGRESS_TARGETS+= fltdiv fltinv fltovf fltund
 
-.if ${MACHINE} == arm64 || ${MACHINE} == armv7
+.if ${MACHINE} == arm64 || ${MACHINE} == armv7 || ${MACHINE} == riscv64
 # Floating-point exceptions are optional and absent on most hardware
 REGRESS_EXPECTED_FAILURES+= fltdiv fltinv fltovf fltund
 .endif
-- 
cgit v1.2.3-55-g6feb