diff options
Diffstat (limited to 'C/CpuArch.h')
| -rw-r--r-- | C/CpuArch.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/C/CpuArch.h b/C/CpuArch.h index a6297ea..1690a5b 100644 --- a/C/CpuArch.h +++ b/C/CpuArch.h | |||
| @@ -47,6 +47,12 @@ MY_CPU_64BIT means that processor can work with 64-bit registers. | |||
| 47 | #define MY_CPU_SIZEOF_POINTER 4 | 47 | #define MY_CPU_SIZEOF_POINTER 4 |
| 48 | #endif | 48 | #endif |
| 49 | 49 | ||
| 50 | #if defined(__SSE2__) \ | ||
| 51 | || defined(MY_CPU_AMD64) \ | ||
| 52 | || defined(_M_IX86_FP) && (_M_IX86_FP >= 2) | ||
| 53 | #define MY_CPU_SSE2 | ||
| 54 | #endif | ||
| 55 | |||
| 50 | 56 | ||
| 51 | #if defined(_M_ARM64) \ | 57 | #if defined(_M_ARM64) \ |
| 52 | || defined(_M_ARM64EC) \ | 58 | || defined(_M_ARM64EC) \ |
| @@ -571,10 +577,12 @@ problem-4 : performace: | |||
| 571 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) (v) | 577 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) (v) |
| 572 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) | 578 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) |
| 573 | #define Z7_CONV_NATIVE_TO_BE_32(v) (v) | 579 | #define Z7_CONV_NATIVE_TO_BE_32(v) (v) |
| 580 | // #define Z7_GET_NATIVE16_FROM_2_BYTES(b0, b1) ((b1) | ((b0) << 8)) | ||
| 574 | #elif defined(MY_CPU_LE) | 581 | #elif defined(MY_CPU_LE) |
| 575 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) | 582 | #define Z7_CONV_BE_TO_NATIVE_CONST32(v) Z7_BSWAP32_CONST(v) |
| 576 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) (v) | 583 | #define Z7_CONV_LE_TO_NATIVE_CONST32(v) (v) |
| 577 | #define Z7_CONV_NATIVE_TO_BE_32(v) Z7_BSWAP32(v) | 584 | #define Z7_CONV_NATIVE_TO_BE_32(v) Z7_BSWAP32(v) |
| 585 | // #define Z7_GET_NATIVE16_FROM_2_BYTES(b0, b1) ((b0) | ((b1) << 8)) | ||
| 578 | #else | 586 | #else |
| 579 | #error Stop_Compiling_Unknown_Endian_CONV | 587 | #error Stop_Compiling_Unknown_Endian_CONV |
| 580 | #endif | 588 | #endif |
