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author | Roberto Ierusalimschy <roberto@inf.puc-rio.br> | 2017-10-02 19:51:32 -0300 |
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committer | Roberto Ierusalimschy <roberto@inf.puc-rio.br> | 2017-10-02 19:51:32 -0300 |
commit | 940472c75cf8f1a31a267748e3164f539e289b54 (patch) | |
tree | 7310d15b9c44c98846fb41caaf708332f22a85f0 /lopcodes.h | |
parent | f3b3d9b5c2e014148fad830b6762efb57fdcb24b (diff) | |
download | lua-940472c75cf8f1a31a267748e3164f539e289b54.tar.gz lua-940472c75cf8f1a31a267748e3164f539e289b54.tar.bz2 lua-940472c75cf8f1a31a267748e3164f539e289b54.zip |
opcode size increased to 7 bits
Diffstat (limited to 'lopcodes.h')
-rw-r--r-- | lopcodes.h | 16 |
1 files changed, 8 insertions, 8 deletions
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | ** $Id: lopcodes.h,v 1.162 2017/09/28 16:53:29 roberto Exp roberto $ | 2 | ** $Id: lopcodes.h,v 1.163 2017/10/01 19:13:43 roberto Exp roberto $ |
3 | ** Opcodes for Lua virtual machine | 3 | ** Opcodes for Lua virtual machine |
4 | ** See Copyright Notice in lua.h | 4 | ** See Copyright Notice in lua.h |
5 | */ | 5 | */ |
@@ -12,15 +12,15 @@ | |||
12 | 12 | ||
13 | /*=========================================================================== | 13 | /*=========================================================================== |
14 | We assume that instructions are unsigned 32-bit integers. | 14 | We assume that instructions are unsigned 32-bit integers. |
15 | All instructions have an opcode in the first 6 bits. | 15 | All instructions have an opcode in the first 7 bits. |
16 | Instructions can have the following formats: | 16 | Instructions can have the following formats: |
17 | 17 | ||
18 | 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 | 18 | 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 |
19 | 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | 19 | 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
20 | iABC | C(9) | | B(9) | | A(8) | | Op(6) | | 20 | iABC | C(9) | | B(8) | | A(8) | | Op(7) | |
21 | iABx | Bx(18) | | A(8) | | Op(6) | | 21 | iABx | Bx(17) | | A(8) | | Op(7) | |
22 | iAsBx | sBx (signed)(18) | | A(8) | | Op(6) | | 22 | iAsBx | sBx (signed)(17) | | A(8) | | Op(7) | |
23 | iAx | Ax(26) | | Op(6) | | 23 | iAx | Ax(25) | | Op(7) | |
24 | 24 | ||
25 | A signed argument is represented in excess K: the represented value is | 25 | A signed argument is represented in excess K: the represented value is |
26 | the written unsigned value minus K, where K is half the maximum for the | 26 | the written unsigned value minus K, where K is half the maximum for the |
@@ -35,12 +35,12 @@ enum OpMode {iABC, iABx, iAsBx, iAx}; /* basic instruction format */ | |||
35 | ** size and position of opcode arguments. | 35 | ** size and position of opcode arguments. |
36 | */ | 36 | */ |
37 | #define SIZE_C 9 | 37 | #define SIZE_C 9 |
38 | #define SIZE_B 9 | 38 | #define SIZE_B 8 |
39 | #define SIZE_Bx (SIZE_C + SIZE_B) | 39 | #define SIZE_Bx (SIZE_C + SIZE_B) |
40 | #define SIZE_A 8 | 40 | #define SIZE_A 8 |
41 | #define SIZE_Ax (SIZE_C + SIZE_B + SIZE_A) | 41 | #define SIZE_Ax (SIZE_C + SIZE_B + SIZE_A) |
42 | 42 | ||
43 | #define SIZE_OP 6 | 43 | #define SIZE_OP 7 |
44 | 44 | ||
45 | #define POS_OP 0 | 45 | #define POS_OP 0 |
46 | #define POS_A (POS_OP + SIZE_OP) | 46 | #define POS_A (POS_OP + SIZE_OP) |