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author | Mike Pall <mike> | 2017-02-20 02:41:35 +0100 |
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committer | Mike Pall <mike> | 2017-02-20 02:41:35 +0100 |
commit | 0a46ef1ac6792b27659eafceceaf998a568ee6dd (patch) | |
tree | 673dc9e6cef7e5ac4c906315ad9ceadfa6ffbbde | |
parent | d0759e41a1a84ad2df716debb0a4ed96f78927e2 (diff) | |
download | luajit-0a46ef1ac6792b27659eafceceaf998a568ee6dd.tar.gz luajit-0a46ef1ac6792b27659eafceceaf998a568ee6dd.tar.bz2 luajit-0a46ef1ac6792b27659eafceceaf998a568ee6dd.zip |
ARM64: Cleanup and de-cargo-cult TValue store generation.
-rw-r--r-- | src/lj_asm_arm64.h | 76 |
1 files changed, 27 insertions, 49 deletions
diff --git a/src/lj_asm_arm64.h b/src/lj_asm_arm64.h index 0e2228bb..328e4d77 100644 --- a/src/lj_asm_arm64.h +++ b/src/lj_asm_arm64.h | |||
@@ -643,6 +643,31 @@ static void asm_strto(ASMState *as, IRIns *ir) | |||
643 | 643 | ||
644 | /* -- Memory references --------------------------------------------------- */ | 644 | /* -- Memory references --------------------------------------------------- */ |
645 | 645 | ||
646 | /* Store tagged value for ref at base+ofs. */ | ||
647 | static void asm_tvstore64(ASMState *as, Reg base, int32_t ofs, IRRef ref) | ||
648 | { | ||
649 | RegSet allow = rset_exclude(RSET_GPR, base); | ||
650 | IRIns *ir = IR(ref); | ||
651 | lua_assert(irt_ispri(ir->t) || irt_isaddr(ir->t) || irt_isinteger(ir->t)); | ||
652 | if (irref_isk(ref)) { | ||
653 | TValue k; | ||
654 | lj_ir_kvalue(as->J->L, &k, ir); | ||
655 | emit_lso(as, A64I_STRx, ra_allock(as, k.u64, allow), base, ofs); | ||
656 | } else { | ||
657 | Reg src = ra_alloc1(as, ref, allow); | ||
658 | rset_clear(allow, src); | ||
659 | if (irt_isinteger(ir->t)) { | ||
660 | Reg type = ra_allock(as, (int64_t)irt_toitype(ir->t) << 47, allow); | ||
661 | emit_lso(as, A64I_STRx, RID_TMP, base, ofs); | ||
662 | emit_dnm(as, A64I_ADDx | A64F_EX(A64EX_UXTW), RID_TMP, type, src); | ||
663 | } else { | ||
664 | Reg type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow); | ||
665 | emit_lso(as, A64I_STRx, RID_TMP, base, ofs); | ||
666 | emit_dnm(as, A64I_ADDx | A64F_SH(A64SH_LSL, 47), RID_TMP, src, type); | ||
667 | } | ||
668 | } | ||
669 | } | ||
670 | |||
646 | /* Get pointer to TValue. */ | 671 | /* Get pointer to TValue. */ |
647 | static void asm_tvptr(ASMState *as, Reg dest, IRRef ref) | 672 | static void asm_tvptr(ASMState *as, Reg dest, IRRef ref) |
648 | { | 673 | { |
@@ -657,30 +682,7 @@ static void asm_tvptr(ASMState *as, Reg dest, IRRef ref) | |||
657 | } | 682 | } |
658 | } else { | 683 | } else { |
659 | /* Otherwise use g->tmptv to hold the TValue. */ | 684 | /* Otherwise use g->tmptv to hold the TValue. */ |
660 | RegSet allow = rset_exclude(RSET_GPR, dest); | 685 | asm_tvstore64(as, dest, 0, ref); |
661 | Reg src; | ||
662 | if (irref_isk(ref)) { | ||
663 | TValue k; | ||
664 | lj_ir_kvalue(as->J->L, &k, ir); | ||
665 | src = ra_allock(as, k.u64, allow); | ||
666 | emit_lso(as, A64I_STRx, src, dest, 0); | ||
667 | } else { | ||
668 | Reg type; | ||
669 | if (irt_ispri(ir->t)) { | ||
670 | src = ra_allock(as, ~((int64_t)~irt_toitype(ir->t) << 47), allow); | ||
671 | emit_lso(as, A64I_STRx, src, dest, 0); | ||
672 | } else if (irt_isint(ir->t)) { | ||
673 | src = ra_alloc1(as, ref, allow); | ||
674 | type = ra_allock(as, (int64_t)irt_toitype(ir->t) << 47, allow); | ||
675 | emit_lso(as, A64I_STRx, RID_TMP, dest, 0); | ||
676 | emit_dnm(as, A64I_ADDx | A64F_EX(A64EX_UXTW), RID_TMP, type, src); | ||
677 | } else { | ||
678 | src = ra_alloc1(as, ref, allow); | ||
679 | type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow); | ||
680 | emit_lso(as, A64I_STRx, RID_TMP, dest, 0); | ||
681 | emit_dnm(as, A64I_ADDx | A64F_SH(A64SH_LSL, 47), RID_TMP, src, type); | ||
682 | } | ||
683 | } | ||
684 | ra_allockreg(as, i64ptr(&J2G(as->J)->tmptv), dest); | 686 | ra_allockreg(as, i64ptr(&J2G(as->J)->tmptv), dest); |
685 | } | 687 | } |
686 | } | 688 | } |
@@ -1796,31 +1798,7 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap) | |||
1796 | Reg src = ra_alloc1(as, ref, RSET_FPR); | 1798 | Reg src = ra_alloc1(as, ref, RSET_FPR); |
1797 | emit_lso(as, A64I_STRd, (src & 31), RID_BASE, ofs); | 1799 | emit_lso(as, A64I_STRd, (src & 31), RID_BASE, ofs); |
1798 | } else { | 1800 | } else { |
1799 | RegSet allow = rset_exclude(RSET_GPR, RID_BASE); | 1801 | asm_tvstore64(as, RID_BASE, ofs, ref); |
1800 | lua_assert(irt_ispri(ir->t) || irt_isaddr(ir->t) || irt_isinteger(ir->t)); | ||
1801 | if (!irref_isk(ref)) { | ||
1802 | Reg type, src; | ||
1803 | if (irt_is64(ir->t)) { | ||
1804 | type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow); | ||
1805 | src = ra_alloc1(as, ref, rset_exclude(allow, type)); | ||
1806 | emit_lso(as, A64I_STRx, RID_TMP, RID_BASE, ofs); | ||
1807 | emit_dnm(as, A64I_ADDx | A64F_SH(A64SH_LSL, 47), RID_TMP, src, type); | ||
1808 | } else if (irt_isinteger(ir->t)) { | ||
1809 | type = ra_allock(as, (int64_t)LJ_TISNUM << 47, allow); | ||
1810 | src = ra_alloc1(as, ref, rset_exclude(allow, type)); | ||
1811 | emit_lso(as, A64I_STRx, RID_TMP, RID_BASE, ofs); | ||
1812 | emit_dnm(as, A64I_ADDx | A64F_EX(A64EX_UXTW), RID_TMP, type, src); | ||
1813 | } else { | ||
1814 | type = ra_allock(as, ~((int64_t)~irt_toitype(ir->t) << 47), allow); | ||
1815 | emit_lso(as, A64I_STRx, type, RID_BASE, ofs); | ||
1816 | } | ||
1817 | } else { | ||
1818 | TValue k; | ||
1819 | lj_ir_kvalue(as->J->L, &k, ir); | ||
1820 | emit_lso(as, A64I_STRx, | ||
1821 | ra_allock(as, tvisnil(&k) ? -1 : (int64_t)k.u64, allow), | ||
1822 | RID_BASE, ofs); | ||
1823 | } | ||
1824 | } | 1802 | } |
1825 | checkmclim(as); | 1803 | checkmclim(as); |
1826 | } | 1804 | } |