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| author | Mike Pall <mike> | 2017-04-17 12:00:04 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2017-04-17 12:00:04 +0200 |
| commit | 18efb331a4703f1df18b5448dabd5e1d9be54825 (patch) | |
| tree | 6c631895331b15a434c5629ade92f9d9c30c601f | |
| parent | cced1786b979e4f4a3f672d455f9011c10865af9 (diff) | |
| download | luajit-18efb331a4703f1df18b5448dabd5e1d9be54825.tar.gz luajit-18efb331a4703f1df18b5448dabd5e1d9be54825.tar.bz2 luajit-18efb331a4703f1df18b5448dabd5e1d9be54825.zip | |
ARM64: Fix stores to vmstate.
Contributed by Stefan Pejic.
| -rw-r--r-- | src/vm_arm64.dasc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/vm_arm64.dasc b/src/vm_arm64.dasc index cfbc61a1..3eaf3763 100644 --- a/src/vm_arm64.dasc +++ b/src/vm_arm64.dasc | |||
| @@ -1947,7 +1947,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
| 1947 | | stp d30, d31, [sp, #30*8] | 1947 | | stp d30, d31, [sp, #30*8] |
| 1948 | | ldr CARG1, [sp, #64*8] // Load original value of lr. | 1948 | | ldr CARG1, [sp, #64*8] // Load original value of lr. |
| 1949 | | add CARG3, sp, #64*8 // Recompute original value of sp. | 1949 | | add CARG3, sp, #64*8 // Recompute original value of sp. |
| 1950 | | mv_vmstate CARG4, EXIT | 1950 | | mv_vmstate CARG4w, EXIT |
| 1951 | | stp xzr, CARG3, [sp, #62*8] // Store 0/sp in RID_LR/RID_SP. | 1951 | | stp xzr, CARG3, [sp, #62*8] // Store 0/sp in RID_LR/RID_SP. |
| 1952 | | sub CARG1, CARG1, lr | 1952 | | sub CARG1, CARG1, lr |
| 1953 | | ldr L, GL->cur_L | 1953 | | ldr L, GL->cur_L |
| @@ -1955,7 +1955,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
| 1955 | | ldr BASE, GL->jit_base | 1955 | | ldr BASE, GL->jit_base |
| 1956 | | sub CARG1, CARG1, #2 | 1956 | | sub CARG1, CARG1, #2 |
| 1957 | | ldr CARG2w, [lr] // Load trace number. | 1957 | | ldr CARG2w, [lr] // Load trace number. |
| 1958 | | st_vmstate CARG4 | 1958 | | st_vmstate CARG4w |
| 1959 | |.if ENDIAN_BE | 1959 | |.if ENDIAN_BE |
| 1960 | | rev32 CARG2, CARG2 | 1960 | | rev32 CARG2, CARG2 |
| 1961 | |.endif | 1961 | |.endif |
| @@ -1994,12 +1994,12 @@ static void build_subroutines(BuildCtx *ctx) | |||
| 1994 | | str BASE, L->base | 1994 | | str BASE, L->base |
| 1995 | | ldr CARG2, LFUNC:CARG2->pc | 1995 | | ldr CARG2, LFUNC:CARG2->pc |
| 1996 | | str xzr, GL->jit_base | 1996 | | str xzr, GL->jit_base |
| 1997 | | mv_vmstate CARG4, INTERP | 1997 | | mv_vmstate CARG4w, INTERP |
| 1998 | | ldr KBASE, [CARG2, #PC2PROTO(k)] | 1998 | | ldr KBASE, [CARG2, #PC2PROTO(k)] |
| 1999 | | // Modified copy of ins_next which handles function header dispatch, too. | 1999 | | // Modified copy of ins_next which handles function header dispatch, too. |
| 2000 | | ldrb RBw, [PC, # OFS_OP] | 2000 | | ldrb RBw, [PC, # OFS_OP] |
| 2001 | | ldr INSw, [PC], #4 | 2001 | | ldr INSw, [PC], #4 |
| 2002 | | st_vmstate CARG4 | 2002 | | st_vmstate CARG4w |
| 2003 | | cmp RBw, #BC_FUNCC+2 // Fast function? | 2003 | | cmp RBw, #BC_FUNCC+2 // Fast function? |
| 2004 | | add TMP1, GL, INS, uxtb #3 | 2004 | | add TMP1, GL, INS, uxtb #3 |
| 2005 | | bhs >4 | 2005 | | bhs >4 |
| @@ -3702,9 +3702,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3702 | |.if JIT | 3702 | |.if JIT |
| 3703 | | // RA = base (ignored), RC = traceno | 3703 | | // RA = base (ignored), RC = traceno |
| 3704 | | ldr CARG1, [GL, #GL_J(trace)] | 3704 | | ldr CARG1, [GL, #GL_J(trace)] |
| 3705 | | mov CARG2, #0 // Traces on ARM64 don't store the trace #, so use 0. | 3705 | | mov CARG2w, #0 // Traces on ARM64 don't store the trace #, so use 0. |
| 3706 | | ldr TRACE:RC, [CARG1, RC, lsl #3] | 3706 | | ldr TRACE:RC, [CARG1, RC, lsl #3] |
| 3707 | | st_vmstate CARG2 | 3707 | | st_vmstate CARG2w |
| 3708 | | ldr RA, TRACE:RC->mcode | 3708 | | ldr RA, TRACE:RC->mcode |
| 3709 | | str BASE, GL->jit_base | 3709 | | str BASE, GL->jit_base |
| 3710 | | str L, GL->tmpbuf.L | 3710 | | str L, GL->tmpbuf.L |