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| author | Mike Pall <mike> | 2016-05-21 01:45:18 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2016-05-21 01:45:18 +0200 |
| commit | 513587656a36362e08fb99a28a280a9d412ef1bc (patch) | |
| tree | 7553a204667e7a6eb0968001d5e38a7559e423ed | |
| parent | ccae333844c7aad0934f13f7698894c883a6b561 (diff) | |
| download | luajit-513587656a36362e08fb99a28a280a9d412ef1bc.tar.gz luajit-513587656a36362e08fb99a28a280a9d412ef1bc.tar.bz2 luajit-513587656a36362e08fb99a28a280a9d412ef1bc.zip | |
Add ra_addrename().
Contributed by Peter Cawley.
| -rw-r--r-- | src/lj_asm.c | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c index 9cddd0c9..5e38d254 100644 --- a/src/lj_asm.c +++ b/src/lj_asm.c | |||
| @@ -619,10 +619,21 @@ static Reg ra_alloc1(ASMState *as, IRRef ref, RegSet allow) | |||
| 619 | return r; | 619 | return r; |
| 620 | } | 620 | } |
| 621 | 621 | ||
| 622 | /* Add a register rename to the IR. */ | ||
| 623 | static void ra_addrename(ASMState *as, Reg down, IRRef ref, SnapNo snapno) | ||
| 624 | { | ||
| 625 | IRRef ren; | ||
| 626 | lj_ir_set(as->J, IRT(IR_RENAME, IRT_NIL), ref, snapno); | ||
| 627 | ren = tref_ref(lj_ir_emit(as->J)); | ||
| 628 | as->ir = as->T->ir; /* The IR may have been reallocated. */ | ||
| 629 | IR(ren)->r = (uint8_t)down; | ||
| 630 | IR(ren)->s = SPS_NONE; | ||
| 631 | } | ||
| 632 | |||
| 622 | /* Rename register allocation and emit move. */ | 633 | /* Rename register allocation and emit move. */ |
| 623 | static void ra_rename(ASMState *as, Reg down, Reg up) | 634 | static void ra_rename(ASMState *as, Reg down, Reg up) |
| 624 | { | 635 | { |
| 625 | IRRef ren, ref = regcost_ref(as->cost[up] = as->cost[down]); | 636 | IRRef ref = regcost_ref(as->cost[up] = as->cost[down]); |
| 626 | IRIns *ir = IR(ref); | 637 | IRIns *ir = IR(ref); |
| 627 | ir->r = (uint8_t)up; | 638 | ir->r = (uint8_t)up; |
| 628 | as->cost[down] = 0; | 639 | as->cost[down] = 0; |
| @@ -635,11 +646,7 @@ static void ra_rename(ASMState *as, Reg down, Reg up) | |||
| 635 | RA_DBGX((as, "rename $f $r $r", regcost_ref(as->cost[up]), down, up)); | 646 | RA_DBGX((as, "rename $f $r $r", regcost_ref(as->cost[up]), down, up)); |
| 636 | emit_movrr(as, ir, down, up); /* Backwards codegen needs inverse move. */ | 647 | emit_movrr(as, ir, down, up); /* Backwards codegen needs inverse move. */ |
| 637 | if (!ra_hasspill(IR(ref)->s)) { /* Add the rename to the IR. */ | 648 | if (!ra_hasspill(IR(ref)->s)) { /* Add the rename to the IR. */ |
| 638 | lj_ir_set(as->J, IRT(IR_RENAME, IRT_NIL), ref, as->snapno); | 649 | ra_addrename(as, down, ref, as->snapno); |
| 639 | ren = tref_ref(lj_ir_emit(as->J)); | ||
| 640 | as->ir = as->T->ir; /* The IR may have been reallocated. */ | ||
| 641 | IR(ren)->r = (uint8_t)down; | ||
| 642 | IR(ren)->s = SPS_NONE; | ||
| 643 | } | 650 | } |
| 644 | } | 651 | } |
| 645 | 652 | ||
| @@ -1472,12 +1479,7 @@ static void asm_phi_fixup(ASMState *as) | |||
| 1472 | irt_clearmark(ir->t); | 1479 | irt_clearmark(ir->t); |
| 1473 | /* Left PHI gained a spill slot before the loop? */ | 1480 | /* Left PHI gained a spill slot before the loop? */ |
| 1474 | if (ra_hasspill(ir->s)) { | 1481 | if (ra_hasspill(ir->s)) { |
| 1475 | IRRef ren; | 1482 | ra_addrename(as, r, lref, as->loopsnapno); |
| 1476 | lj_ir_set(as->J, IRT(IR_RENAME, IRT_NIL), lref, as->loopsnapno); | ||
| 1477 | ren = tref_ref(lj_ir_emit(as->J)); | ||
| 1478 | as->ir = as->T->ir; /* The IR may have been reallocated. */ | ||
| 1479 | IR(ren)->r = (uint8_t)r; | ||
| 1480 | IR(ren)->s = SPS_NONE; | ||
| 1481 | } | 1483 | } |
| 1482 | } | 1484 | } |
| 1483 | rset_clear(work, r); | 1485 | rset_clear(work, r); |
