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authorMike Pall <mike>2011-12-10 00:18:19 +0100
committerMike Pall <mike>2011-12-10 00:18:19 +0100
commit60b8e9e2fbc2df3281bc9fac714aad3fd7578717 (patch)
tree1fd2566fd1dbda9bfed317ffa5396855d2dbdc78
parent2591b4524ab2e27702bfc1f41b87348aab66e802 (diff)
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ARM: Fix stack check for spilled BASE in parent.
-rw-r--r--src/lj_asm_arm.h12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h
index 0ab4917e..24b49e69 100644
--- a/src/lj_asm_arm.h
+++ b/src/lj_asm_arm.h
@@ -1422,8 +1422,9 @@ static void asm_stack_check(ASMState *as, BCReg topslot,
1422 Reg pbase; 1422 Reg pbase;
1423 uint32_t k; 1423 uint32_t k;
1424 if (irp) { 1424 if (irp) {
1425 if (ra_hasreg(irp->r)) { 1425 if (!ra_hasspill(irp->s)) {
1426 pbase = irp->r; 1426 pbase = irp->r;
1427 lua_assert(ra_hasreg(pbase));
1427 } else if (allow) { 1428 } else if (allow) {
1428 pbase = rset_pickbot(allow); 1429 pbase = rset_pickbot(allow);
1429 } else { 1430 } else {
@@ -1442,14 +1443,11 @@ static void asm_stack_check(ASMState *as, BCReg topslot,
1442 (int32_t)offsetof(lua_State, maxstack)); 1443 (int32_t)offsetof(lua_State, maxstack));
1443 if (irp) { /* Must not spill arbitrary registers in head of side trace. */ 1444 if (irp) { /* Must not spill arbitrary registers in head of side trace. */
1444 int32_t i = i32ptr(&J2G(as->J)->jit_L); 1445 int32_t i = i32ptr(&J2G(as->J)->jit_L);
1445 if (ra_noreg(irp->r)) { 1446 if (ra_hasspill(irp->s))
1446 lua_assert(ra_hasspill(irp->s)); 1447 emit_lso(as, ARMI_LDR, pbase, RID_SP, sps_scale(irp->s));
1447 emit_lso(as, ARMI_LDR, RID_RET, RID_SP, sps_scale(irp->s));
1448 }
1449 emit_lso(as, ARMI_LDR, RID_TMP, RID_TMP, (i & 4095)); 1448 emit_lso(as, ARMI_LDR, RID_TMP, RID_TMP, (i & 4095));
1450 if (ra_noreg(irp->r)) { 1449 if (ra_hasspill(irp->s) && !allow)
1451 emit_lso(as, ARMI_STR, RID_RET, RID_SP, 0); /* Save temp. register. */ 1450 emit_lso(as, ARMI_STR, RID_RET, RID_SP, 0); /* Save temp. register. */
1452 }
1453 emit_loadi(as, RID_TMP, (i & ~4095)); 1451 emit_loadi(as, RID_TMP, (i & ~4095));
1454 } else { 1452 } else {
1455 emit_getgl(as, RID_TMP, jit_L); 1453 emit_getgl(as, RID_TMP, jit_L);