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| author | Mike Pall <mike> | 2014-10-08 22:04:51 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2014-10-08 22:04:51 +0200 |
| commit | 6d0654d3eca7654c9c4f8a9923907d06b177a8a1 (patch) | |
| tree | 163bfa76899ddf2e49382c9861b895c72220a684 | |
| parent | 4846a714a9b8e01bac8f9fc1de0eb2a5f00ea79b (diff) | |
| download | luajit-6d0654d3eca7654c9c4f8a9923907d06b177a8a1.tar.gz luajit-6d0654d3eca7654c9c4f8a9923907d06b177a8a1.tar.bz2 luajit-6d0654d3eca7654c9c4f8a9923907d06b177a8a1.zip | |
Fix fused constant loads under high register pressure.
| -rw-r--r-- | src/lj_asm.c | 1 | ||||
| -rw-r--r-- | src/lj_asm_x86.h | 10 |
2 files changed, 10 insertions, 1 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c index 264649ae..2afa92d0 100644 --- a/src/lj_asm.c +++ b/src/lj_asm.c | |||
| @@ -353,6 +353,7 @@ static Reg ra_rematk(ASMState *as, IRRef ref) | |||
| 353 | static int32_t ra_spill(ASMState *as, IRIns *ir) | 353 | static int32_t ra_spill(ASMState *as, IRIns *ir) |
| 354 | { | 354 | { |
| 355 | int32_t slot = ir->s; | 355 | int32_t slot = ir->s; |
| 356 | lua_assert(ir >= as->ir + REF_TRUE); | ||
| 356 | if (!ra_hasspill(slot)) { | 357 | if (!ra_hasspill(slot)) { |
| 357 | if (irt_is64(ir->t)) { | 358 | if (irt_is64(ir->t)) { |
| 358 | slot = as->evenspill; | 359 | slot = as->evenspill; |
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index 40f95636..04b79649 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h | |||
| @@ -325,6 +325,14 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow) | |||
| 325 | as->mrm.base = as->mrm.idx = RID_NONE; | 325 | as->mrm.base = as->mrm.idx = RID_NONE; |
| 326 | return RID_MRM; | 326 | return RID_MRM; |
| 327 | } | 327 | } |
| 328 | } else if (ir->o == IR_KINT64) { | ||
| 329 | RegSet avail = as->freeset & ~as->modset & RSET_GPR; | ||
| 330 | lua_assert(allow != RSET_EMPTY); | ||
| 331 | if (!(avail & (avail-1))) { /* Fuse if less than two regs available. */ | ||
| 332 | as->mrm.ofs = ptr2addr(ir_kint64(ir)); | ||
| 333 | as->mrm.base = as->mrm.idx = RID_NONE; | ||
| 334 | return RID_MRM; | ||
| 335 | } | ||
| 328 | } else if (mayfuse(as, ref)) { | 336 | } else if (mayfuse(as, ref)) { |
| 329 | RegSet xallow = (allow & RSET_GPR) ? allow : RSET_GPR; | 337 | RegSet xallow = (allow & RSET_GPR) ? allow : RSET_GPR; |
| 330 | if (ir->o == IR_SLOAD) { | 338 | if (ir->o == IR_SLOAD) { |
| @@ -361,7 +369,7 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow) | |||
| 361 | return RID_MRM; | 369 | return RID_MRM; |
| 362 | } | 370 | } |
| 363 | } | 371 | } |
| 364 | if (!(as->freeset & allow) && | 372 | if (!(as->freeset & allow) && !irref_isk(ref) && |
| 365 | (allow == RSET_EMPTY || ra_hasspill(ir->s) || iscrossref(as, ref))) | 373 | (allow == RSET_EMPTY || ra_hasspill(ir->s) || iscrossref(as, ref))) |
| 366 | goto fusespill; | 374 | goto fusespill; |
| 367 | return ra_allocref(as, ref, allow); | 375 | return ra_allocref(as, ref, allow); |
