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| author | Mike Pall <mike> | 2023-07-12 22:34:46 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2023-07-12 22:34:46 +0200 |
| commit | 8635cbabf3094c4d8bd00578c7d812bea87bb2d3 (patch) | |
| tree | 79b0a06dba15ef8871baec091d0e51b162bc3f94 | |
| parent | 8fbd576fb9414a5fa70dfa6069733d3416a78269 (diff) | |
| parent | aa2db7ebd1267836af5221336ccb4e9b4aa8372d (diff) | |
| download | luajit-8635cbabf3094c4d8bd00578c7d812bea87bb2d3.tar.gz luajit-8635cbabf3094c4d8bd00578c7d812bea87bb2d3.tar.bz2 luajit-8635cbabf3094c4d8bd00578c7d812bea87bb2d3.zip | |
Merge branch 'master' into v2.1
| -rw-r--r-- | src/lj_asm.c | 7 | ||||
| -rw-r--r-- | src/lj_asm_arm.h | 7 | ||||
| -rw-r--r-- | src/lj_asm_arm64.h | 7 | ||||
| -rw-r--r-- | src/lj_asm_mips.h | 8 | ||||
| -rw-r--r-- | src/lj_asm_ppc.h | 8 | ||||
| -rw-r--r-- | src/lj_asm_x86.h | 8 |
6 files changed, 24 insertions, 21 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c index 0fcd8485..7ce2e5d2 100644 --- a/src/lj_asm.c +++ b/src/lj_asm.c | |||
| @@ -1889,6 +1889,7 @@ static void asm_head_side(ASMState *as) | |||
| 1889 | RegSet allow = RSET_ALL; /* Inverse of all coalesced registers. */ | 1889 | RegSet allow = RSET_ALL; /* Inverse of all coalesced registers. */ |
| 1890 | RegSet live = RSET_EMPTY; /* Live parent registers. */ | 1890 | RegSet live = RSET_EMPTY; /* Live parent registers. */ |
| 1891 | RegSet pallow = RSET_GPR; /* Registers needed by the parent stack check. */ | 1891 | RegSet pallow = RSET_GPR; /* Registers needed by the parent stack check. */ |
| 1892 | Reg pbase; | ||
| 1892 | IRIns *irp = &as->parent->ir[REF_BASE]; /* Parent base. */ | 1893 | IRIns *irp = &as->parent->ir[REF_BASE]; /* Parent base. */ |
| 1893 | int32_t spadj, spdelta; | 1894 | int32_t spadj, spdelta; |
| 1894 | int pass2 = 0; | 1895 | int pass2 = 0; |
| @@ -1899,7 +1900,11 @@ static void asm_head_side(ASMState *as) | |||
| 1899 | /* Force snap #0 alloc to prevent register overwrite in stack check. */ | 1900 | /* Force snap #0 alloc to prevent register overwrite in stack check. */ |
| 1900 | asm_snap_alloc(as, 0); | 1901 | asm_snap_alloc(as, 0); |
| 1901 | } | 1902 | } |
| 1902 | allow = asm_head_side_base(as, irp, allow); | 1903 | pbase = asm_head_side_base(as, irp); |
| 1904 | if (pbase != RID_NONE) { | ||
| 1905 | rset_clear(allow, pbase); | ||
| 1906 | rset_clear(pallow, pbase); | ||
| 1907 | } | ||
| 1903 | 1908 | ||
| 1904 | /* Scan all parent SLOADs and collect register dependencies. */ | 1909 | /* Scan all parent SLOADs and collect register dependencies. */ |
| 1905 | for (i = as->stopins; i > REF_BASE; i--) { | 1910 | for (i = as->stopins; i > REF_BASE; i--) { |
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h index ba6267ec..a5ec9971 100644 --- a/src/lj_asm_arm.h +++ b/src/lj_asm_arm.h | |||
| @@ -2167,7 +2167,7 @@ static void asm_head_root_base(ASMState *as) | |||
| 2167 | } | 2167 | } |
| 2168 | 2168 | ||
| 2169 | /* Coalesce BASE register for a side trace. */ | 2169 | /* Coalesce BASE register for a side trace. */ |
| 2170 | static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | 2170 | static Reg asm_head_side_base(ASMState *as, IRIns *irp) |
| 2171 | { | 2171 | { |
| 2172 | IRIns *ir; | 2172 | IRIns *ir; |
| 2173 | asm_head_lreg(as); | 2173 | asm_head_lreg(as); |
| @@ -2175,16 +2175,15 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | |||
| 2175 | if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t))) | 2175 | if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t))) |
| 2176 | ra_spill(as, ir); | 2176 | ra_spill(as, ir); |
| 2177 | if (ra_hasspill(irp->s)) { | 2177 | if (ra_hasspill(irp->s)) { |
| 2178 | rset_clear(allow, ra_dest(as, ir, allow)); | 2178 | return ra_dest(as, ir, RSET_GPR); |
| 2179 | } else { | 2179 | } else { |
| 2180 | Reg r = irp->r; | 2180 | Reg r = irp->r; |
| 2181 | lj_assertA(ra_hasreg(r), "base reg lost"); | 2181 | lj_assertA(ra_hasreg(r), "base reg lost"); |
| 2182 | rset_clear(allow, r); | ||
| 2183 | if (r != ir->r && !rset_test(as->freeset, r)) | 2182 | if (r != ir->r && !rset_test(as->freeset, r)) |
| 2184 | ra_restore(as, regcost_ref(as->cost[r])); | 2183 | ra_restore(as, regcost_ref(as->cost[r])); |
| 2185 | ra_destreg(as, ir, r); | 2184 | ra_destreg(as, ir, r); |
| 2185 | return r; | ||
| 2186 | } | 2186 | } |
| 2187 | return allow; | ||
| 2188 | } | 2187 | } |
| 2189 | 2188 | ||
| 2190 | /* -- Tail of trace ------------------------------------------------------- */ | 2189 | /* -- Tail of trace ------------------------------------------------------- */ |
diff --git a/src/lj_asm_arm64.h b/src/lj_asm_arm64.h index 95138fe9..d3e4bb63 100644 --- a/src/lj_asm_arm64.h +++ b/src/lj_asm_arm64.h | |||
| @@ -1915,7 +1915,7 @@ static void asm_head_root_base(ASMState *as) | |||
| 1915 | } | 1915 | } |
| 1916 | 1916 | ||
| 1917 | /* Coalesce BASE register for a side trace. */ | 1917 | /* Coalesce BASE register for a side trace. */ |
| 1918 | static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | 1918 | static Reg asm_head_side_base(ASMState *as, IRIns *irp) |
| 1919 | { | 1919 | { |
| 1920 | IRIns *ir; | 1920 | IRIns *ir; |
| 1921 | asm_head_lreg(as); | 1921 | asm_head_lreg(as); |
| @@ -1923,16 +1923,15 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | |||
| 1923 | if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t))) | 1923 | if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t))) |
| 1924 | ra_spill(as, ir); | 1924 | ra_spill(as, ir); |
| 1925 | if (ra_hasspill(irp->s)) { | 1925 | if (ra_hasspill(irp->s)) { |
| 1926 | rset_clear(allow, ra_dest(as, ir, allow)); | 1926 | return ra_dest(as, ir, RSET_GPR); |
| 1927 | } else { | 1927 | } else { |
| 1928 | Reg r = irp->r; | 1928 | Reg r = irp->r; |
| 1929 | lj_assertA(ra_hasreg(r), "base reg lost"); | 1929 | lj_assertA(ra_hasreg(r), "base reg lost"); |
| 1930 | rset_clear(allow, r); | ||
| 1931 | if (r != ir->r && !rset_test(as->freeset, r)) | 1930 | if (r != ir->r && !rset_test(as->freeset, r)) |
| 1932 | ra_restore(as, regcost_ref(as->cost[r])); | 1931 | ra_restore(as, regcost_ref(as->cost[r])); |
| 1933 | ra_destreg(as, ir, r); | 1932 | ra_destreg(as, ir, r); |
| 1933 | return r; | ||
| 1934 | } | 1934 | } |
| 1935 | return allow; | ||
| 1936 | } | 1935 | } |
| 1937 | 1936 | ||
| 1938 | /* -- Tail of trace ------------------------------------------------------- */ | 1937 | /* -- Tail of trace ------------------------------------------------------- */ |
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index ac2d2662..e9cce916 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h | |||
| @@ -2667,7 +2667,7 @@ static void asm_head_root_base(ASMState *as) | |||
| 2667 | } | 2667 | } |
| 2668 | 2668 | ||
| 2669 | /* Coalesce BASE register for a side trace. */ | 2669 | /* Coalesce BASE register for a side trace. */ |
| 2670 | static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | 2670 | static Reg asm_head_side_base(ASMState *as, IRIns *irp) |
| 2671 | { | 2671 | { |
| 2672 | IRIns *ir = IR(REF_BASE); | 2672 | IRIns *ir = IR(REF_BASE); |
| 2673 | Reg r = ir->r; | 2673 | Reg r = ir->r; |
| @@ -2676,15 +2676,15 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | |||
| 2676 | if (rset_test(as->modset, r) || irt_ismarked(ir->t)) | 2676 | if (rset_test(as->modset, r) || irt_ismarked(ir->t)) |
| 2677 | ir->r = RID_INIT; /* No inheritance for modified BASE register. */ | 2677 | ir->r = RID_INIT; /* No inheritance for modified BASE register. */ |
| 2678 | if (irp->r == r) { | 2678 | if (irp->r == r) { |
| 2679 | rset_clear(allow, r); /* Mark same BASE register as coalesced. */ | 2679 | return r; /* Same BASE register already coalesced. */ |
| 2680 | } else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) { | 2680 | } else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) { |
| 2681 | rset_clear(allow, irp->r); | ||
| 2682 | emit_move(as, r, irp->r); /* Move from coalesced parent reg. */ | 2681 | emit_move(as, r, irp->r); /* Move from coalesced parent reg. */ |
| 2682 | return irp->r; | ||
| 2683 | } else { | 2683 | } else { |
| 2684 | emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */ | 2684 | emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */ |
| 2685 | } | 2685 | } |
| 2686 | } | 2686 | } |
| 2687 | return allow; | 2687 | return RID_NONE; |
| 2688 | } | 2688 | } |
| 2689 | 2689 | ||
| 2690 | /* -- Tail of trace ------------------------------------------------------- */ | 2690 | /* -- Tail of trace ------------------------------------------------------- */ |
diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h index aa818745..ccc3979c 100644 --- a/src/lj_asm_ppc.h +++ b/src/lj_asm_ppc.h | |||
| @@ -2186,7 +2186,7 @@ static void asm_head_root_base(ASMState *as) | |||
| 2186 | } | 2186 | } |
| 2187 | 2187 | ||
| 2188 | /* Coalesce BASE register for a side trace. */ | 2188 | /* Coalesce BASE register for a side trace. */ |
| 2189 | static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | 2189 | static Reg asm_head_side_base(ASMState *as, IRIns *irp) |
| 2190 | { | 2190 | { |
| 2191 | IRIns *ir = IR(REF_BASE); | 2191 | IRIns *ir = IR(REF_BASE); |
| 2192 | Reg r = ir->r; | 2192 | Reg r = ir->r; |
| @@ -2195,15 +2195,15 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | |||
| 2195 | if (rset_test(as->modset, r) || irt_ismarked(ir->t)) | 2195 | if (rset_test(as->modset, r) || irt_ismarked(ir->t)) |
| 2196 | ir->r = RID_INIT; /* No inheritance for modified BASE register. */ | 2196 | ir->r = RID_INIT; /* No inheritance for modified BASE register. */ |
| 2197 | if (irp->r == r) { | 2197 | if (irp->r == r) { |
| 2198 | rset_clear(allow, r); /* Mark same BASE register as coalesced. */ | 2198 | return r; /* Same BASE register already coalesced. */ |
| 2199 | } else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) { | 2199 | } else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) { |
| 2200 | rset_clear(allow, irp->r); | ||
| 2201 | emit_mr(as, r, irp->r); /* Move from coalesced parent reg. */ | 2200 | emit_mr(as, r, irp->r); /* Move from coalesced parent reg. */ |
| 2201 | return irp->r; | ||
| 2202 | } else { | 2202 | } else { |
| 2203 | emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */ | 2203 | emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */ |
| 2204 | } | 2204 | } |
| 2205 | } | 2205 | } |
| 2206 | return allow; | 2206 | return RID_NONE; |
| 2207 | } | 2207 | } |
| 2208 | 2208 | ||
| 2209 | /* -- Tail of trace ------------------------------------------------------- */ | 2209 | /* -- Tail of trace ------------------------------------------------------- */ |
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index 2bf9d939..368811fd 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h | |||
| @@ -2877,7 +2877,7 @@ static void asm_head_root_base(ASMState *as) | |||
| 2877 | } | 2877 | } |
| 2878 | 2878 | ||
| 2879 | /* Coalesce or reload BASE register for a side trace. */ | 2879 | /* Coalesce or reload BASE register for a side trace. */ |
| 2880 | static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | 2880 | static Reg asm_head_side_base(ASMState *as, IRIns *irp) |
| 2881 | { | 2881 | { |
| 2882 | IRIns *ir = IR(REF_BASE); | 2882 | IRIns *ir = IR(REF_BASE); |
| 2883 | Reg r = ir->r; | 2883 | Reg r = ir->r; |
| @@ -2886,16 +2886,16 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) | |||
| 2886 | if (rset_test(as->modset, r) || irt_ismarked(ir->t)) | 2886 | if (rset_test(as->modset, r) || irt_ismarked(ir->t)) |
| 2887 | ir->r = RID_INIT; /* No inheritance for modified BASE register. */ | 2887 | ir->r = RID_INIT; /* No inheritance for modified BASE register. */ |
| 2888 | if (irp->r == r) { | 2888 | if (irp->r == r) { |
| 2889 | rset_clear(allow, r); /* Mark same BASE register as coalesced. */ | 2889 | return r; /* Same BASE register already coalesced. */ |
| 2890 | } else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) { | 2890 | } else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) { |
| 2891 | /* Move from coalesced parent reg. */ | 2891 | /* Move from coalesced parent reg. */ |
| 2892 | rset_clear(allow, irp->r); | ||
| 2893 | emit_rr(as, XO_MOV, r|REX_GC64, irp->r); | 2892 | emit_rr(as, XO_MOV, r|REX_GC64, irp->r); |
| 2893 | return irp->r; | ||
| 2894 | } else { | 2894 | } else { |
| 2895 | emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */ | 2895 | emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */ |
| 2896 | } | 2896 | } |
| 2897 | } | 2897 | } |
| 2898 | return allow; | 2898 | return RID_NONE; |
| 2899 | } | 2899 | } |
| 2900 | 2900 | ||
| 2901 | /* -- Tail of trace ------------------------------------------------------- */ | 2901 | /* -- Tail of trace ------------------------------------------------------- */ |
