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author | Mike Pall <mike> | 2013-07-31 01:49:58 +0200 |
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committer | Mike Pall <mike> | 2013-07-31 01:49:58 +0200 |
commit | 92a3cf469c560bb82ac38fe7a18eb747fae197c9 (patch) | |
tree | a39aa5aa14f0e2974bd42e89aae8a94d55bb23d1 | |
parent | 96d54789ee149b7376e737d4803416f9746f903b (diff) | |
parent | 6a878b04413b0b02412399aaa9dd8f3767a193f7 (diff) | |
download | luajit-92a3cf469c560bb82ac38fe7a18eb747fae197c9.tar.gz luajit-92a3cf469c560bb82ac38fe7a18eb747fae197c9.tar.bz2 luajit-92a3cf469c560bb82ac38fe7a18eb747fae197c9.zip |
Merge branch 'master' into v2.1
-rw-r--r-- | src/lj_asm_arm.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h index 9b661eb7..00d87aeb 100644 --- a/src/lj_asm_arm.h +++ b/src/lj_asm_arm.h | |||
@@ -512,10 +512,10 @@ static void asm_tointg(ASMState *as, IRIns *ir, Reg left) | |||
512 | static void asm_tobit(ASMState *as, IRIns *ir) | 512 | static void asm_tobit(ASMState *as, IRIns *ir) |
513 | { | 513 | { |
514 | RegSet allow = RSET_FPR; | 514 | RegSet allow = RSET_FPR; |
515 | Reg dest = ra_dest(as, ir, RSET_GPR); | ||
516 | Reg left = ra_alloc1(as, ir->op1, allow); | 515 | Reg left = ra_alloc1(as, ir->op1, allow); |
517 | Reg right = ra_alloc1(as, ir->op2, rset_clear(allow, left)); | 516 | Reg right = ra_alloc1(as, ir->op2, rset_clear(allow, left)); |
518 | Reg tmp = ra_scratch(as, rset_clear(allow, right)); | 517 | Reg tmp = ra_scratch(as, rset_clear(allow, right)); |
518 | Reg dest = ra_dest(as, ir, RSET_GPR); | ||
519 | emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15)); | 519 | emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15)); |
520 | emit_dnm(as, ARMI_VADD_D, (tmp & 15), (left & 15), (right & 15)); | 520 | emit_dnm(as, ARMI_VADD_D, (tmp & 15), (left & 15), (right & 15)); |
521 | } | 521 | } |
@@ -557,9 +557,9 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
557 | lua_assert(irt_isint(ir->t) && st == IRT_NUM); | 557 | lua_assert(irt_isint(ir->t) && st == IRT_NUM); |
558 | asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR)); | 558 | asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR)); |
559 | } else { | 559 | } else { |
560 | Reg dest = ra_dest(as, ir, RSET_GPR); | ||
561 | Reg left = ra_alloc1(as, lref, RSET_FPR); | 560 | Reg left = ra_alloc1(as, lref, RSET_FPR); |
562 | Reg tmp = ra_scratch(as, rset_exclude(RSET_FPR, left)); | 561 | Reg tmp = ra_scratch(as, rset_exclude(RSET_FPR, left)); |
562 | Reg dest = ra_dest(as, ir, RSET_GPR); | ||
563 | ARMIns ai; | 563 | ARMIns ai; |
564 | emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15)); | 564 | emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15)); |
565 | ai = irt_isint(ir->t) ? | 565 | ai = irt_isint(ir->t) ? |
@@ -1147,6 +1147,9 @@ static void asm_sload(ASMState *as, IRIns *ir) | |||
1147 | } else | 1147 | } else |
1148 | #endif | 1148 | #endif |
1149 | if (ra_used(ir)) { | 1149 | if (ra_used(ir)) { |
1150 | Reg tmp = RID_NONE; | ||
1151 | if ((ir->op2 & IRSLOAD_CONVERT)) | ||
1152 | tmp = ra_scratch(as, t == IRT_INT ? RSET_FPR : RSET_GPR); | ||
1150 | lua_assert((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) || | 1153 | lua_assert((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) || |
1151 | irt_isint(ir->t) || irt_isaddr(ir->t)); | 1154 | irt_isint(ir->t) || irt_isaddr(ir->t)); |
1152 | dest = ra_dest(as, ir, (!LJ_SOFTFP && t == IRT_NUM) ? RSET_FPR : allow); | 1155 | dest = ra_dest(as, ir, (!LJ_SOFTFP && t == IRT_NUM) ? RSET_FPR : allow); |
@@ -1154,18 +1157,15 @@ static void asm_sload(ASMState *as, IRIns *ir) | |||
1154 | base = ra_alloc1(as, REF_BASE, allow); | 1157 | base = ra_alloc1(as, REF_BASE, allow); |
1155 | if ((ir->op2 & IRSLOAD_CONVERT)) { | 1158 | if ((ir->op2 & IRSLOAD_CONVERT)) { |
1156 | if (t == IRT_INT) { | 1159 | if (t == IRT_INT) { |
1157 | Reg tmp = ra_scratch(as, RSET_FPR); | ||
1158 | emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15)); | 1160 | emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15)); |
1159 | emit_dm(as, ARMI_VCVT_S32_F64, (tmp & 15), (tmp & 15)); | 1161 | emit_dm(as, ARMI_VCVT_S32_F64, (tmp & 15), (tmp & 15)); |
1160 | dest = tmp; | ||
1161 | t = IRT_NUM; /* Check for original type. */ | 1162 | t = IRT_NUM; /* Check for original type. */ |
1162 | } else { | 1163 | } else { |
1163 | Reg tmp = ra_scratch(as, RSET_GPR); | ||
1164 | emit_dm(as, ARMI_VCVT_F64_S32, (dest & 15), (dest & 15)); | 1164 | emit_dm(as, ARMI_VCVT_F64_S32, (dest & 15), (dest & 15)); |
1165 | emit_dn(as, ARMI_VMOV_S_R, tmp, (dest & 15)); | 1165 | emit_dn(as, ARMI_VMOV_S_R, tmp, (dest & 15)); |
1166 | dest = tmp; | ||
1167 | t = IRT_INT; /* Check for original type. */ | 1166 | t = IRT_INT; /* Check for original type. */ |
1168 | } | 1167 | } |
1168 | dest = tmp; | ||
1169 | } | 1169 | } |
1170 | goto dotypecheck; | 1170 | goto dotypecheck; |
1171 | } | 1171 | } |
@@ -1440,7 +1440,7 @@ static void asm_intmul(ASMState *as, IRIns *ir) | |||
1440 | if (dest == left && left != right) { left = right; right = dest; } | 1440 | if (dest == left && left != right) { left = right; right = dest; } |
1441 | if (irt_isguard(ir->t)) { /* IR_MULOV */ | 1441 | if (irt_isguard(ir->t)) { /* IR_MULOV */ |
1442 | if (!(as->flags & JIT_F_ARMV6) && dest == left) | 1442 | if (!(as->flags & JIT_F_ARMV6) && dest == left) |
1443 | tmp = left = ra_scratch(as, rset_exclude(RSET_FPR, left)); | 1443 | tmp = left = ra_scratch(as, rset_exclude(RSET_GPR, left)); |
1444 | asm_guardcc(as, CC_NE); | 1444 | asm_guardcc(as, CC_NE); |
1445 | emit_nm(as, ARMI_TEQ|ARMF_SH(ARMSH_ASR, 31), RID_TMP, dest); | 1445 | emit_nm(as, ARMI_TEQ|ARMF_SH(ARMSH_ASR, 31), RID_TMP, dest); |
1446 | emit_dnm(as, ARMI_SMULL|ARMF_S(right), dest, RID_TMP, left); | 1446 | emit_dnm(as, ARMI_SMULL|ARMF_S(right), dest, RID_TMP, left); |