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| author | Mike Pall <mike> | 2023-09-09 20:52:02 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2023-09-09 20:52:02 +0200 |
| commit | ba2b34f5e82baec5f925fa89b7bf4f88ae376da9 (patch) | |
| tree | a4898e3e1b8f83505f381b53b096fc0f82594595 | |
| parent | f442432ecb09d9326b769f1f1d4a43689f27a9e1 (diff) | |
| download | luajit-ba2b34f5e82baec5f925fa89b7bf4f88ae376da9.tar.gz luajit-ba2b34f5e82baec5f925fa89b7bf4f88ae376da9.tar.bz2 luajit-ba2b34f5e82baec5f925fa89b7bf4f88ae376da9.zip | |
ARM64: Disassemble rotates on logical operands.
Thanks to Peter Cawley. #1076
| -rw-r--r-- | src/jit/dis_arm64.lua | 42 |
1 files changed, 17 insertions, 25 deletions
diff --git a/src/jit/dis_arm64.lua b/src/jit/dis_arm64.lua index b10e2fb1..3d199bf2 100644 --- a/src/jit/dis_arm64.lua +++ b/src/jit/dis_arm64.lua | |||
| @@ -107,24 +107,20 @@ local map_logsr = { -- Logical, shifted register. | |||
| 107 | [0] = { | 107 | [0] = { |
| 108 | shift = 29, mask = 3, | 108 | shift = 29, mask = 3, |
| 109 | [0] = { | 109 | [0] = { |
| 110 | shift = 21, mask = 7, | 110 | shift = 21, mask = 1, |
| 111 | [0] = "andDNMSg", "bicDNMSg", "andDNMSg", "bicDNMSg", | 111 | [0] = "andDNMSg", "bicDNMSg" |
| 112 | "andDNMSg", "bicDNMSg", "andDNMg", "bicDNMg" | ||
| 113 | }, | 112 | }, |
| 114 | { | 113 | { |
| 115 | shift = 21, mask = 7, | 114 | shift = 21, mask = 1, |
| 116 | [0] ="orr|movDN0MSg", "orn|mvnDN0MSg", "orr|movDN0MSg", "orn|mvnDN0MSg", | 115 | [0] = "orr|movDN0MSg", "orn|mvnDN0MSg" |
| 117 | "orr|movDN0MSg", "orn|mvnDN0MSg", "orr|movDN0Mg", "orn|mvnDN0Mg" | ||
| 118 | }, | 116 | }, |
| 119 | { | 117 | { |
| 120 | shift = 21, mask = 7, | 118 | shift = 21, mask = 1, |
| 121 | [0] = "eorDNMSg", "eonDNMSg", "eorDNMSg", "eonDNMSg", | 119 | [0] = "eorDNMSg", "eonDNMSg" |
| 122 | "eorDNMSg", "eonDNMSg", "eorDNMg", "eonDNMg" | ||
| 123 | }, | 120 | }, |
| 124 | { | 121 | { |
| 125 | shift = 21, mask = 7, | 122 | shift = 21, mask = 1, |
| 126 | [0] = "ands|tstD0NMSg", "bicsDNMSg", "ands|tstD0NMSg", "bicsDNMSg", | 123 | [0] = "ands|tstD0NMSg", "bicsDNMSg" |
| 127 | "ands|tstD0NMSg", "bicsDNMSg", "ands|tstD0NMg", "bicsDNMg" | ||
| 128 | } | 124 | } |
| 129 | }, | 125 | }, |
| 130 | false -- unallocated | 126 | false -- unallocated |
| @@ -132,24 +128,20 @@ local map_logsr = { -- Logical, shifted register. | |||
| 132 | { | 128 | { |
| 133 | shift = 29, mask = 3, | 129 | shift = 29, mask = 3, |
| 134 | [0] = { | 130 | [0] = { |
| 135 | shift = 21, mask = 7, | 131 | shift = 21, mask = 1, |
| 136 | [0] = "andDNMSg", "bicDNMSg", "andDNMSg", "bicDNMSg", | 132 | [0] = "andDNMSg", "bicDNMSg" |
| 137 | "andDNMSg", "bicDNMSg", "andDNMg", "bicDNMg" | ||
| 138 | }, | 133 | }, |
| 139 | { | 134 | { |
| 140 | shift = 21, mask = 7, | 135 | shift = 21, mask = 1, |
| 141 | [0] = "orr|movDN0MSg", "orn|mvnDN0MSg", "orr|movDN0MSg", "orn|mvnDN0MSg", | 136 | [0] = "orr|movDN0MSg", "orn|mvnDN0MSg" |
| 142 | "orr|movDN0MSg", "orn|mvnDN0MSg", "orr|movDN0Mg", "orn|mvnDN0Mg" | ||
| 143 | }, | 137 | }, |
| 144 | { | 138 | { |
| 145 | shift = 21, mask = 7, | 139 | shift = 21, mask = 1, |
| 146 | [0] = "eorDNMSg", "eonDNMSg", "eorDNMSg", "eonDNMSg", | 140 | [0] = "eorDNMSg", "eonDNMSg" |
| 147 | "eorDNMSg", "eonDNMSg", "eorDNMg", "eonDNMg" | ||
| 148 | }, | 141 | }, |
| 149 | { | 142 | { |
| 150 | shift = 21, mask = 7, | 143 | shift = 21, mask = 1, |
| 151 | [0] = "ands|tstD0NMSg", "bicsDNMSg", "ands|tstD0NMSg", "bicsDNMSg", | 144 | [0] = "ands|tstD0NMSg", "bicsDNMSg" |
| 152 | "ands|tstD0NMSg", "bicsDNMSg", "ands|tstD0NMg", "bicsDNMg" | ||
| 153 | } | 145 | } |
| 154 | } | 146 | } |
| 155 | } | 147 | } |
| @@ -735,7 +727,7 @@ local map_cond = { | |||
| 735 | "hi", "ls", "ge", "lt", "gt", "le", "al", | 727 | "hi", "ls", "ge", "lt", "gt", "le", "al", |
| 736 | } | 728 | } |
| 737 | 729 | ||
| 738 | local map_shift = { [0] = "lsl", "lsr", "asr", } | 730 | local map_shift = { [0] = "lsl", "lsr", "asr", "ror"} |
| 739 | 731 | ||
| 740 | local map_extend = { | 732 | local map_extend = { |
| 741 | [0] = "uxtb", "uxth", "uxtw", "uxtx", "sxtb", "sxth", "sxtw", "sxtx", | 733 | [0] = "uxtb", "uxth", "uxtw", "uxtx", "sxtb", "sxth", "sxtw", "sxtx", |