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| author | Mike Pall <mike> | 2016-06-03 06:53:37 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2016-06-03 06:53:37 +0200 |
| commit | cc05e79181992d0d595b44f13538486315667491 (patch) | |
| tree | e074d412de194c2f389308b6d55dd08eebcaeb92 | |
| parent | 58ca165737363af4800683577f2a6cc92e640dcc (diff) | |
| download | luajit-cc05e79181992d0d595b44f13538486315667491.tar.gz luajit-cc05e79181992d0d595b44f13538486315667491.tar.bz2 luajit-cc05e79181992d0d595b44f13538486315667491.zip | |
LJ_GC64: Ensure all IR slot fields are initialized.
| -rw-r--r-- | src/lj_asm_x86.h | 1 | ||||
| -rw-r--r-- | src/lj_ir.c | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index dcdc727a..35f48727 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h | |||
| @@ -2970,6 +2970,7 @@ static Reg asm_setup_call_slots(ASMState *as, IRIns *ir, const CCallInfo *ci) | |||
| 2970 | static void asm_setup_target(ASMState *as) | 2970 | static void asm_setup_target(ASMState *as) |
| 2971 | { | 2971 | { |
| 2972 | asm_exitstub_setup(as, as->T->nsnap); | 2972 | asm_exitstub_setup(as, as->T->nsnap); |
| 2973 | as->mrm.base = 0; | ||
| 2973 | } | 2974 | } |
| 2974 | 2975 | ||
| 2975 | /* -- Trace patching ------------------------------------------------------ */ | 2976 | /* -- Trace patching ------------------------------------------------------ */ |
diff --git a/src/lj_ir.c b/src/lj_ir.c index 0a206ebb..87fd0f4d 100644 --- a/src/lj_ir.c +++ b/src/lj_ir.c | |||
| @@ -224,6 +224,7 @@ TRef lj_ir_k64(jit_State *J, IROp op, uint64_t u64) | |||
| 224 | ir[1].tv.u64 = u64; | 224 | ir[1].tv.u64 = u64; |
| 225 | ir->t.irt = t; | 225 | ir->t.irt = t; |
| 226 | ir->o = op; | 226 | ir->o = op; |
| 227 | ir->op12 = 0; | ||
| 227 | ir->prev = J->chain[op]; | 228 | ir->prev = J->chain[op]; |
| 228 | J->chain[op] = (IRRef1)ref; | 229 | J->chain[op] = (IRRef1)ref; |
| 229 | found: | 230 | found: |
| @@ -281,6 +282,7 @@ TRef lj_ir_kgc(jit_State *J, GCobj *o, IRType t) | |||
| 281 | ref = ir_nextkgc(J); | 282 | ref = ir_nextkgc(J); |
| 282 | ir = IR(ref); | 283 | ir = IR(ref); |
| 283 | /* NOBARRIER: Current trace is a GC root. */ | 284 | /* NOBARRIER: Current trace is a GC root. */ |
| 285 | ir->op12 = 0; | ||
| 284 | setgcref(ir[LJ_GC64].gcr, o); | 286 | setgcref(ir[LJ_GC64].gcr, o); |
| 285 | ir->t.irt = (uint8_t)t; | 287 | ir->t.irt = (uint8_t)t; |
| 286 | ir->o = IR_KGC; | 288 | ir->o = IR_KGC; |
| @@ -298,6 +300,7 @@ TRef lj_ir_ktrace(jit_State *J) | |||
| 298 | lua_assert(irt_toitype_(IRT_P64) == LJ_TTRACE); | 300 | lua_assert(irt_toitype_(IRT_P64) == LJ_TTRACE); |
| 299 | ir->t.irt = IRT_P64; | 301 | ir->t.irt = IRT_P64; |
| 300 | ir->o = LJ_GC64 ? IR_KNUM : IR_KNULL; /* Not IR_KGC yet, but same size. */ | 302 | ir->o = LJ_GC64 ? IR_KNUM : IR_KNULL; /* Not IR_KGC yet, but same size. */ |
| 303 | ir->op12 = 0; | ||
| 301 | ir->prev = 0; | 304 | ir->prev = 0; |
| 302 | return TREF(ref, IRT_P64); | 305 | return TREF(ref, IRT_P64); |
| 303 | } | 306 | } |
| @@ -319,6 +322,7 @@ TRef lj_ir_kptr_(jit_State *J, IROp op, void *ptr) | |||
| 319 | ref = ir_nextk(J); | 322 | ref = ir_nextk(J); |
| 320 | #endif | 323 | #endif |
| 321 | ir = IR(ref); | 324 | ir = IR(ref); |
| 325 | ir->op12 = 0; | ||
| 322 | setmref(ir[LJ_GC64].ptr, ptr); | 326 | setmref(ir[LJ_GC64].ptr, ptr); |
| 323 | ir->t.irt = IRT_PGC; | 327 | ir->t.irt = IRT_PGC; |
| 324 | ir->o = op; | 328 | ir->o = op; |
