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author | Mike Pall <mike> | 2018-01-29 13:19:30 +0100 |
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committer | Mike Pall <mike> | 2018-01-29 13:19:30 +0100 |
commit | 0bf46e1edf94c43795b5e491efe682ab70974ce7 (patch) | |
tree | 5e96ce2da5161ebd49fb564fe5aa73805b3391b7 /src/lj_asm.c | |
parent | 74c544d68c07bcd416225598cdf15f88e62fd457 (diff) | |
parent | d4ee80342770d1281e2ce877f8ae8ab1d99e6528 (diff) | |
download | luajit-0bf46e1edf94c43795b5e491efe682ab70974ce7.tar.gz luajit-0bf46e1edf94c43795b5e491efe682ab70974ce7.tar.bz2 luajit-0bf46e1edf94c43795b5e491efe682ab70974ce7.zip |
Merge branch 'master' into v2.1
Diffstat (limited to 'src/lj_asm.c')
-rw-r--r-- | src/lj_asm.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c index 5f83779e..992dcf59 100644 --- a/src/lj_asm.c +++ b/src/lj_asm.c | |||
@@ -2142,9 +2142,12 @@ static void asm_setup_regsp(ASMState *as) | |||
2142 | if (ir->op2 != REF_NIL && as->evenspill < 4) | 2142 | if (ir->op2 != REF_NIL && as->evenspill < 4) |
2143 | as->evenspill = 4; /* lj_cdata_newv needs 4 args. */ | 2143 | as->evenspill = 4; /* lj_cdata_newv needs 4 args. */ |
2144 | } | 2144 | } |
2145 | /* fallthrough */ | ||
2145 | #else | 2146 | #else |
2147 | /* fallthrough */ | ||
2146 | case IR_CNEW: | 2148 | case IR_CNEW: |
2147 | #endif | 2149 | #endif |
2150 | /* fallthrough */ | ||
2148 | case IR_TNEW: case IR_TDUP: case IR_CNEWI: case IR_TOSTR: | 2151 | case IR_TNEW: case IR_TDUP: case IR_CNEWI: case IR_TOSTR: |
2149 | case IR_BUFSTR: | 2152 | case IR_BUFSTR: |
2150 | ir->prev = REGSP_HINT(RID_RET); | 2153 | ir->prev = REGSP_HINT(RID_RET); |
@@ -2165,6 +2168,7 @@ static void asm_setup_regsp(ASMState *as) | |||
2165 | case IR_LDEXP: | 2168 | case IR_LDEXP: |
2166 | #endif | 2169 | #endif |
2167 | #endif | 2170 | #endif |
2171 | /* fallthrough */ | ||
2168 | case IR_POW: | 2172 | case IR_POW: |
2169 | if (!LJ_SOFTFP && irt_isnum(ir->t)) { | 2173 | if (!LJ_SOFTFP && irt_isnum(ir->t)) { |
2170 | if (inloop) | 2174 | if (inloop) |
@@ -2176,7 +2180,7 @@ static void asm_setup_regsp(ASMState *as) | |||
2176 | continue; | 2180 | continue; |
2177 | #endif | 2181 | #endif |
2178 | } | 2182 | } |
2179 | /* fallthrough for integer POW */ | 2183 | /* fallthrough */ /* for integer POW */ |
2180 | case IR_DIV: case IR_MOD: | 2184 | case IR_DIV: case IR_MOD: |
2181 | if (!irt_isnum(ir->t)) { | 2185 | if (!irt_isnum(ir->t)) { |
2182 | ir->prev = REGSP_HINT(RID_RET); | 2186 | ir->prev = REGSP_HINT(RID_RET); |
@@ -2213,6 +2217,7 @@ static void asm_setup_regsp(ASMState *as) | |||
2213 | case IR_BSHL: case IR_BSHR: case IR_BSAR: | 2217 | case IR_BSHL: case IR_BSHR: case IR_BSAR: |
2214 | if ((as->flags & JIT_F_BMI2)) /* Except if BMI2 is available. */ | 2218 | if ((as->flags & JIT_F_BMI2)) /* Except if BMI2 is available. */ |
2215 | break; | 2219 | break; |
2220 | /* fallthrough */ | ||
2216 | case IR_BROL: case IR_BROR: | 2221 | case IR_BROL: case IR_BROR: |
2217 | if (!irref_isk(ir->op2) && !ra_hashint(IR(ir->op2)->r)) { | 2222 | if (!irref_isk(ir->op2) && !ra_hashint(IR(ir->op2)->r)) { |
2218 | IR(ir->op2)->r = REGSP_HINT(RID_ECX); | 2223 | IR(ir->op2)->r = REGSP_HINT(RID_ECX); |