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authorMike Pall <mike>2023-07-12 21:56:17 +0200
committerMike Pall <mike>2023-07-12 21:56:17 +0200
commitaa2db7ebd1267836af5221336ccb4e9b4aa8372d (patch)
tree587a2545c5f9cfd46f13140de729e971e845d925 /src/lj_asm.c
parenta01cba9d2d74efc57376822aa43db2d5043af5a4 (diff)
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Fix base register coalescing in side trace.
Thanks to Sergey Kaplun, NiLuJe and Peter Cawley. #1031 #1016
Diffstat (limited to 'src/lj_asm.c')
-rw-r--r--src/lj_asm.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c
index cfdfa99f..1708c360 100644
--- a/src/lj_asm.c
+++ b/src/lj_asm.c
@@ -1366,6 +1366,7 @@ static void asm_head_side(ASMState *as)
1366 RegSet allow = RSET_ALL; /* Inverse of all coalesced registers. */ 1366 RegSet allow = RSET_ALL; /* Inverse of all coalesced registers. */
1367 RegSet live = RSET_EMPTY; /* Live parent registers. */ 1367 RegSet live = RSET_EMPTY; /* Live parent registers. */
1368 RegSet pallow = RSET_GPR; /* Registers needed by the parent stack check. */ 1368 RegSet pallow = RSET_GPR; /* Registers needed by the parent stack check. */
1369 Reg pbase;
1369 IRIns *irp = &as->parent->ir[REF_BASE]; /* Parent base. */ 1370 IRIns *irp = &as->parent->ir[REF_BASE]; /* Parent base. */
1370 int32_t spadj, spdelta; 1371 int32_t spadj, spdelta;
1371 int pass2 = 0; 1372 int pass2 = 0;
@@ -1377,7 +1378,11 @@ static void asm_head_side(ASMState *as)
1377 as->snapno = 0; 1378 as->snapno = 0;
1378 asm_snap_alloc(as); 1379 asm_snap_alloc(as);
1379 } 1380 }
1380 allow = asm_head_side_base(as, irp, allow); 1381 pbase = asm_head_side_base(as, irp);
1382 if (pbase != RID_NONE) {
1383 rset_clear(allow, pbase);
1384 rset_clear(pallow, pbase);
1385 }
1381 1386
1382 /* Scan all parent SLOADs and collect register dependencies. */ 1387 /* Scan all parent SLOADs and collect register dependencies. */
1383 for (i = as->stopins; i > REF_BASE; i--) { 1388 for (i = as->stopins; i > REF_BASE; i--) {