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author | Mike Pall <mike> | 2020-05-23 21:33:01 +0200 |
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committer | Mike Pall <mike> | 2020-05-23 21:33:01 +0200 |
commit | b2307c8ad817e350d65cc909a579ca2f77439682 (patch) | |
tree | 4984f3c3972d768220b7263eb5eb139d6049cfcb /src/lj_asm.c | |
parent | 5655be4546d9177890c69f0d0accac4773ff0887 (diff) | |
download | luajit-b2307c8ad817e350d65cc909a579ca2f77439682.tar.gz luajit-b2307c8ad817e350d65cc909a579ca2f77439682.tar.bz2 luajit-b2307c8ad817e350d65cc909a579ca2f77439682.zip |
Remove pow() splitting and cleanup backends.
Diffstat (limited to 'src/lj_asm.c')
-rw-r--r-- | src/lj_asm.c | 106 |
1 files changed, 68 insertions, 38 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c index 20d63731..dd84a4f2 100644 --- a/src/lj_asm.c +++ b/src/lj_asm.c | |||
@@ -1308,32 +1308,6 @@ static void asm_call(ASMState *as, IRIns *ir) | |||
1308 | asm_gencall(as, ci, args); | 1308 | asm_gencall(as, ci, args); |
1309 | } | 1309 | } |
1310 | 1310 | ||
1311 | #if !LJ_SOFTFP32 | ||
1312 | static void asm_fppow(ASMState *as, IRIns *ir, IRRef lref, IRRef rref) | ||
1313 | { | ||
1314 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_pow]; | ||
1315 | IRRef args[2]; | ||
1316 | args[0] = lref; | ||
1317 | args[1] = rref; | ||
1318 | asm_setupresult(as, ir, ci); | ||
1319 | asm_gencall(as, ci, args); | ||
1320 | } | ||
1321 | |||
1322 | static int asm_fpjoin_pow(ASMState *as, IRIns *ir) | ||
1323 | { | ||
1324 | IRIns *irp = IR(ir->op1); | ||
1325 | if (irp == ir-1 && irp->o == IR_MUL && !ra_used(irp)) { | ||
1326 | IRIns *irpp = IR(irp->op1); | ||
1327 | if (irpp == ir-2 && irpp->o == IR_FPMATH && | ||
1328 | irpp->op2 == IRFPM_LOG2 && !ra_used(irpp)) { | ||
1329 | asm_fppow(as, ir, irpp->op1, irp->op2); | ||
1330 | return 1; | ||
1331 | } | ||
1332 | } | ||
1333 | return 0; | ||
1334 | } | ||
1335 | #endif | ||
1336 | |||
1337 | /* -- PHI and loop handling ----------------------------------------------- */ | 1311 | /* -- PHI and loop handling ----------------------------------------------- */ |
1338 | 1312 | ||
1339 | /* Break a PHI cycle by renaming to a free register (evict if needed). */ | 1313 | /* Break a PHI cycle by renaming to a free register (evict if needed). */ |
@@ -1604,6 +1578,62 @@ static void asm_loop(ASMState *as) | |||
1604 | #error "Missing assembler for target CPU" | 1578 | #error "Missing assembler for target CPU" |
1605 | #endif | 1579 | #endif |
1606 | 1580 | ||
1581 | /* -- Common instruction helpers ------------------------------------------ */ | ||
1582 | |||
1583 | #if !LJ_SOFTFP32 | ||
1584 | #if !LJ_TARGET_X86ORX64 | ||
1585 | #define asm_ldexp(as, ir) asm_callid(as, ir, IRCALL_ldexp) | ||
1586 | #define asm_fppowi(as, ir) asm_callid(as, ir, IRCALL_lj_vm_powi) | ||
1587 | #endif | ||
1588 | |||
1589 | static void asm_pow(ASMState *as, IRIns *ir) | ||
1590 | { | ||
1591 | #if LJ_64 && LJ_HASFFI | ||
1592 | if (!irt_isnum(ir->t)) | ||
1593 | asm_callid(as, ir, irt_isi64(ir->t) ? IRCALL_lj_carith_powi64 : | ||
1594 | IRCALL_lj_carith_powu64); | ||
1595 | else | ||
1596 | #endif | ||
1597 | if (irt_isnum(IR(ir->op2)->t)) | ||
1598 | asm_callid(as, ir, IRCALL_pow); | ||
1599 | else | ||
1600 | asm_fppowi(as, ir); | ||
1601 | } | ||
1602 | |||
1603 | static void asm_div(ASMState *as, IRIns *ir) | ||
1604 | { | ||
1605 | #if LJ_64 && LJ_HASFFI | ||
1606 | if (!irt_isnum(ir->t)) | ||
1607 | asm_callid(as, ir, irt_isi64(ir->t) ? IRCALL_lj_carith_divi64 : | ||
1608 | IRCALL_lj_carith_divu64); | ||
1609 | else | ||
1610 | #endif | ||
1611 | asm_fpdiv(as, ir); | ||
1612 | } | ||
1613 | #endif | ||
1614 | |||
1615 | static void asm_mod(ASMState *as, IRIns *ir) | ||
1616 | { | ||
1617 | #if LJ_64 && LJ_HASFFI | ||
1618 | if (!irt_isint(ir->t)) | ||
1619 | asm_callid(as, ir, irt_isi64(ir->t) ? IRCALL_lj_carith_modi64 : | ||
1620 | IRCALL_lj_carith_modu64); | ||
1621 | else | ||
1622 | #endif | ||
1623 | asm_callid(as, ir, IRCALL_lj_vm_modi); | ||
1624 | } | ||
1625 | |||
1626 | static void asm_fuseequal(ASMState *as, IRIns *ir) | ||
1627 | { | ||
1628 | /* Fuse HREF + EQ/NE. */ | ||
1629 | if ((ir-1)->o == IR_HREF && ir->op1 == as->curins-1) { | ||
1630 | as->curins--; | ||
1631 | asm_href(as, ir-1, (IROp)ir->o); | ||
1632 | } else { | ||
1633 | asm_equal(as, ir); | ||
1634 | } | ||
1635 | } | ||
1636 | |||
1607 | /* -- Instruction dispatch ------------------------------------------------ */ | 1637 | /* -- Instruction dispatch ------------------------------------------------ */ |
1608 | 1638 | ||
1609 | /* Assemble a single instruction. */ | 1639 | /* Assemble a single instruction. */ |
@@ -1626,14 +1656,7 @@ static void asm_ir(ASMState *as, IRIns *ir) | |||
1626 | case IR_ABC: | 1656 | case IR_ABC: |
1627 | asm_comp(as, ir); | 1657 | asm_comp(as, ir); |
1628 | break; | 1658 | break; |
1629 | case IR_EQ: case IR_NE: | 1659 | case IR_EQ: case IR_NE: asm_fuseequal(as, ir); break; |
1630 | if ((ir-1)->o == IR_HREF && ir->op1 == as->curins-1) { | ||
1631 | as->curins--; | ||
1632 | asm_href(as, ir-1, (IROp)ir->o); | ||
1633 | } else { | ||
1634 | asm_equal(as, ir); | ||
1635 | } | ||
1636 | break; | ||
1637 | 1660 | ||
1638 | case IR_RETF: asm_retf(as, ir); break; | 1661 | case IR_RETF: asm_retf(as, ir); break; |
1639 | 1662 | ||
@@ -1702,7 +1725,13 @@ static void asm_ir(ASMState *as, IRIns *ir) | |||
1702 | case IR_SNEW: case IR_XSNEW: asm_snew(as, ir); break; | 1725 | case IR_SNEW: case IR_XSNEW: asm_snew(as, ir); break; |
1703 | case IR_TNEW: asm_tnew(as, ir); break; | 1726 | case IR_TNEW: asm_tnew(as, ir); break; |
1704 | case IR_TDUP: asm_tdup(as, ir); break; | 1727 | case IR_TDUP: asm_tdup(as, ir); break; |
1705 | case IR_CNEW: case IR_CNEWI: asm_cnew(as, ir); break; | 1728 | case IR_CNEW: case IR_CNEWI: |
1729 | #if LJ_HASFFI | ||
1730 | asm_cnew(as, ir); | ||
1731 | #else | ||
1732 | lua_assert(0); | ||
1733 | #endif | ||
1734 | break; | ||
1706 | 1735 | ||
1707 | /* Buffer operations. */ | 1736 | /* Buffer operations. */ |
1708 | case IR_BUFHDR: asm_bufhdr(as, ir); break; | 1737 | case IR_BUFHDR: asm_bufhdr(as, ir); break; |
@@ -2167,6 +2196,10 @@ static void asm_setup_regsp(ASMState *as) | |||
2167 | if (inloop) | 2196 | if (inloop) |
2168 | as->modset |= RSET_SCRATCH; | 2197 | as->modset |= RSET_SCRATCH; |
2169 | #if LJ_TARGET_X86 | 2198 | #if LJ_TARGET_X86 |
2199 | if (irt_isnum(IR(ir->op2)->t)) { | ||
2200 | if (as->evenspill < 4) /* Leave room to call pow(). */ | ||
2201 | as->evenspill = 4; | ||
2202 | } | ||
2170 | break; | 2203 | break; |
2171 | #else | 2204 | #else |
2172 | ir->prev = REGSP_HINT(RID_FPRET); | 2205 | ir->prev = REGSP_HINT(RID_FPRET); |
@@ -2192,9 +2225,6 @@ static void asm_setup_regsp(ASMState *as) | |||
2192 | continue; | 2225 | continue; |
2193 | } | 2226 | } |
2194 | break; | 2227 | break; |
2195 | } else if (ir->op2 == IRFPM_EXP2 && !LJ_64) { | ||
2196 | if (as->evenspill < 4) /* Leave room to call pow(). */ | ||
2197 | as->evenspill = 4; | ||
2198 | } | 2228 | } |
2199 | #endif | 2229 | #endif |
2200 | if (inloop) | 2230 | if (inloop) |