diff options
| author | Mike Pall <mike> | 2015-01-03 15:04:38 +0100 |
|---|---|---|
| committer | Mike Pall <mike> | 2015-01-03 15:04:38 +0100 |
| commit | 054e6abe37450344e20b373ec326055071029e9b (patch) | |
| tree | d3abbe61e643f4f59797d2aea24cc3a0643df53b /src/lj_asm_mips.h | |
| parent | a13dfd66c3427f9cc94044f261a526042b0d02f5 (diff) | |
| download | luajit-054e6abe37450344e20b373ec326055071029e9b.tar.gz luajit-054e6abe37450344e20b373ec326055071029e9b.tar.bz2 luajit-054e6abe37450344e20b373ec326055071029e9b.zip | |
Add LJ_FR2 mode: Two-slot frame info.
Diffstat (limited to 'src/lj_asm_mips.h')
| -rw-r--r-- | src/lj_asm_mips.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index bc521596..346e0254 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h | |||
| @@ -372,7 +372,7 @@ static void asm_retf(ASMState *as, IRIns *ir) | |||
| 372 | { | 372 | { |
| 373 | Reg base = ra_alloc1(as, REF_BASE, RSET_GPR); | 373 | Reg base = ra_alloc1(as, REF_BASE, RSET_GPR); |
| 374 | void *pc = ir_kptr(IR(ir->op2)); | 374 | void *pc = ir_kptr(IR(ir->op2)); |
| 375 | int32_t delta = 1+bc_a(*((const BCIns *)pc - 1)); | 375 | int32_t delta = 1+LJ_FR2+bc_a(*((const BCIns *)pc - 1)); |
| 376 | as->topslot -= (BCReg)delta; | 376 | as->topslot -= (BCReg)delta; |
| 377 | if ((int32_t)as->topslot < 0) as->topslot = 0; | 377 | if ((int32_t)as->topslot < 0) as->topslot = 0; |
| 378 | irt_setmark(IR(REF_BASE)->t); /* Children must not coalesce with BASE reg. */ | 378 | irt_setmark(IR(REF_BASE)->t); /* Children must not coalesce with BASE reg. */ |