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author | Mike Pall <mike> | 2023-08-13 02:25:12 +0200 |
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committer | Mike Pall <mike> | 2023-08-13 02:25:12 +0200 |
commit | 119fd1fab0ebf235669456fbb57ee872fb05fc73 (patch) | |
tree | 2445387dda68d8559bf3fc584e4889bc48230116 /src/vm_mips64.dasc | |
parent | 27af72e66f6a285298d1a9be370779aae945eb14 (diff) | |
download | luajit-119fd1fab0ebf235669456fbb57ee872fb05fc73.tar.gz luajit-119fd1fab0ebf235669456fbb57ee872fb05fc73.tar.bz2 luajit-119fd1fab0ebf235669456fbb57ee872fb05fc73.zip |
Ensure forward progress on trace exit to BC_ITERN.
Also use a safer way to force a static dispatch for BC_RET*.
Reported by Bartel Eerdekens. Analyzed by Peter Cawley. #1000 #1045
Diffstat (limited to 'src/vm_mips64.dasc')
-rw-r--r-- | src/vm_mips64.dasc | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/src/vm_mips64.dasc b/src/vm_mips64.dasc index 651bc42e..801087b3 100644 --- a/src/vm_mips64.dasc +++ b/src/vm_mips64.dasc | |||
@@ -2571,7 +2571,8 @@ static void build_subroutines(BuildCtx *ctx) | |||
2571 | | daddiu DISPATCH, JGL, -GG_DISP2G-32768 | 2571 | | daddiu DISPATCH, JGL, -GG_DISP2G-32768 |
2572 | | sd BASE, L->base | 2572 | | sd BASE, L->base |
2573 | |1: | 2573 | |1: |
2574 | | bltz CRET1, >9 // Check for error from exit. | 2574 | | sltiu TMP0, CRET1, -LUA_ERRERR // Check for error from exit. |
2575 | | beqz TMP0, >9 | ||
2575 | |. ld LFUNC:RB, FRAME_FUNC(BASE) | 2576 | |. ld LFUNC:RB, FRAME_FUNC(BASE) |
2576 | | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float). | 2577 | | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float). |
2577 | | dsll MULTRES, CRET1, 3 | 2578 | | dsll MULTRES, CRET1, 3 |
@@ -2586,14 +2587,16 @@ static void build_subroutines(BuildCtx *ctx) | |||
2586 | | .FPU cvt.d.s TOBIT, TOBIT | 2587 | | .FPU cvt.d.s TOBIT, TOBIT |
2587 | | // Modified copy of ins_next which handles function header dispatch, too. | 2588 | | // Modified copy of ins_next which handles function header dispatch, too. |
2588 | | lw INS, 0(PC) | 2589 | | lw INS, 0(PC) |
2589 | | daddiu PC, PC, 4 | 2590 | | addiu CRET1, CRET1, 17 // Static dispatch? |
2590 | | // Assumes TISNIL == ~LJ_VMST_INTERP == -1 | 2591 | | // Assumes TISNIL == ~LJ_VMST_INTERP == -1 |
2591 | | sw TISNIL, DISPATCH_GL(vmstate)(DISPATCH) | 2592 | | sw TISNIL, DISPATCH_GL(vmstate)(DISPATCH) |
2593 | | decode_RD8a RD, INS | ||
2594 | | beqz CRET1, >5 | ||
2595 | |. daddiu PC, PC, 4 | ||
2592 | | decode_OP8a TMP1, INS | 2596 | | decode_OP8a TMP1, INS |
2593 | | decode_OP8b TMP1 | 2597 | | decode_OP8b TMP1 |
2594 | | sltiu TMP2, TMP1, BC_FUNCF*8 | ||
2595 | | daddu TMP0, DISPATCH, TMP1 | 2598 | | daddu TMP0, DISPATCH, TMP1 |
2596 | | decode_RD8a RD, INS | 2599 | | sltiu TMP2, TMP1, BC_FUNCF*8 |
2597 | | ld AT, 0(TMP0) | 2600 | | ld AT, 0(TMP0) |
2598 | | decode_RA8a RA, INS | 2601 | | decode_RA8a RA, INS |
2599 | | beqz TMP2, >2 | 2602 | | beqz TMP2, >2 |
@@ -2622,6 +2625,22 @@ static void build_subroutines(BuildCtx *ctx) | |||
2622 | | jr AT | 2625 | | jr AT |
2623 | |. daddu RA, RA, BASE | 2626 | |. daddu RA, RA, BASE |
2624 | | | 2627 | | |
2628 | |5: // Dispatch to static entry of original ins replaced by BC_JLOOP. | ||
2629 | | ld TMP0, DISPATCH_J(trace)(DISPATCH) | ||
2630 | | decode_RD8b RD | ||
2631 | | daddu TMP0, TMP0, RD | ||
2632 | | ld TRACE:TMP2, 0(TMP0) | ||
2633 | | lw INS, TRACE:TMP2->startins | ||
2634 | | decode_OP8a TMP1, INS | ||
2635 | | decode_OP8b TMP1 | ||
2636 | | daddu TMP0, DISPATCH, TMP1 | ||
2637 | | decode_RD8a RD, INS | ||
2638 | | ld AT, GG_DISP2STATIC(TMP0) | ||
2639 | | decode_RA8a RA, INS | ||
2640 | | decode_RD8b RD | ||
2641 | | jr AT | ||
2642 | |. decode_RA8b RA | ||
2643 | | | ||
2625 | |9: // Rethrow error from the right C frame. | 2644 | |9: // Rethrow error from the right C frame. |
2626 | | load_got lj_err_trace | 2645 | | load_got lj_err_trace |
2627 | | sub CARG2, r0, CRET1 | 2646 | | sub CARG2, r0, CRET1 |