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authorMike Pall <mike>2023-11-12 16:11:11 +0100
committerMike Pall <mike>2023-11-12 16:11:11 +0100
commit113a168b792cd367822ec04cdc2ef32facd28efa (patch)
tree5f18ff505a244df0be32774e95d9db3f13c4cb7c /src
parent45c88b7963de2969a9a656c03ba06ad995d7fd5f (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/lj_asm_x86.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h
index a105b439..955a54a4 100644
--- a/src/lj_asm_x86.h
+++ b/src/lj_asm_x86.h
@@ -473,7 +473,7 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
473 } 473 }
474 } else if (ir->o == IR_ALOAD || ir->o == IR_HLOAD || ir->o == IR_ULOAD) { 474 } else if (ir->o == IR_ALOAD || ir->o == IR_HLOAD || ir->o == IR_ULOAD) {
475 if (noconflict(as, ref, ir->o + IRDELTA_L2S, 0) && 475 if (noconflict(as, ref, ir->o + IRDELTA_L2S, 0) &&
476 noconflict(as, ref, IR_CALLS, 0) && /* Don't cross table.clear. */ 476 noconflict(as, ref, IR_CALLS, 1) && /* Don't cross table.clear. */
477 !(LJ_GC64 && irt_isaddr(ir->t))) { 477 !(LJ_GC64 && irt_isaddr(ir->t))) {
478 asm_fuseahuref(as, ir->op1, xallow); 478 asm_fuseahuref(as, ir->op1, xallow);
479 return RID_MRM; 479 return RID_MRM;