diff options
author | Mike Pall <mike> | 2019-04-29 18:04:47 +0200 |
---|---|---|
committer | Mike Pall <mike> | 2019-04-29 18:04:47 +0200 |
commit | 178512fab94990361c418c13b2ad5e004b44b924 (patch) | |
tree | d7e1480861a0278ec65a318e85737eb17424c249 /src | |
parent | b33e3f2d441590f4de0d189bd9a65661824a48f6 (diff) | |
parent | 9bd5a722bee2ee2c5b159a89937778b81be49915 (diff) | |
download | luajit-178512fab94990361c418c13b2ad5e004b44b924.tar.gz luajit-178512fab94990361c418c13b2ad5e004b44b924.tar.bz2 luajit-178512fab94990361c418c13b2ad5e004b44b924.zip |
Merge branch 'master' into v2.1
Diffstat (limited to 'src')
-rw-r--r-- | src/lj_asm.c | 2 | ||||
-rw-r--r-- | src/lj_asm_arm.h | 44 |
2 files changed, 24 insertions, 22 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c index 992dcf59..ff07b7ee 100644 --- a/src/lj_asm.c +++ b/src/lj_asm.c | |||
@@ -2130,8 +2130,8 @@ static void asm_setup_regsp(ASMState *as) | |||
2130 | #if LJ_SOFTFP | 2130 | #if LJ_SOFTFP |
2131 | case IR_MIN: case IR_MAX: | 2131 | case IR_MIN: case IR_MAX: |
2132 | if ((ir+1)->o != IR_HIOP) break; | 2132 | if ((ir+1)->o != IR_HIOP) break; |
2133 | /* fallthrough */ | ||
2134 | #endif | 2133 | #endif |
2134 | /* fallthrough */ | ||
2135 | /* C calls evict all scratch regs and return results in RID_RET. */ | 2135 | /* C calls evict all scratch regs and return results in RID_RET. */ |
2136 | case IR_SNEW: case IR_XSNEW: case IR_NEWREF: case IR_BUFPUT: | 2136 | case IR_SNEW: case IR_XSNEW: case IR_NEWREF: case IR_BUFPUT: |
2137 | if (REGARG_NUMGPR < 3 && as->evenspill < 3) | 2137 | if (REGARG_NUMGPR < 3 && as->evenspill < 3) |
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h index 37bfa40f..e222e541 100644 --- a/src/lj_asm_arm.h +++ b/src/lj_asm_arm.h | |||
@@ -979,7 +979,7 @@ static ARMIns asm_fxloadins(IRIns *ir) | |||
979 | case IRT_I16: return ARMI_LDRSH; | 979 | case IRT_I16: return ARMI_LDRSH; |
980 | case IRT_U16: return ARMI_LDRH; | 980 | case IRT_U16: return ARMI_LDRH; |
981 | case IRT_NUM: lua_assert(!LJ_SOFTFP); return ARMI_VLDR_D; | 981 | case IRT_NUM: lua_assert(!LJ_SOFTFP); return ARMI_VLDR_D; |
982 | case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VLDR_S; | 982 | case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VLDR_S; /* fallthrough */ |
983 | default: return ARMI_LDR; | 983 | default: return ARMI_LDR; |
984 | } | 984 | } |
985 | } | 985 | } |
@@ -990,7 +990,7 @@ static ARMIns asm_fxstoreins(IRIns *ir) | |||
990 | case IRT_I8: case IRT_U8: return ARMI_STRB; | 990 | case IRT_I8: case IRT_U8: return ARMI_STRB; |
991 | case IRT_I16: case IRT_U16: return ARMI_STRH; | 991 | case IRT_I16: case IRT_U16: return ARMI_STRH; |
992 | case IRT_NUM: lua_assert(!LJ_SOFTFP); return ARMI_VSTR_D; | 992 | case IRT_NUM: lua_assert(!LJ_SOFTFP); return ARMI_VSTR_D; |
993 | case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VSTR_S; | 993 | case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VSTR_S; /* fallthrough */ |
994 | default: return ARMI_STR; | 994 | default: return ARMI_STR; |
995 | } | 995 | } |
996 | } | 996 | } |
@@ -1412,14 +1412,29 @@ static void asm_intop(ASMState *as, IRIns *ir, ARMIns ai) | |||
1412 | emit_dn(as, ai^m, dest, left); | 1412 | emit_dn(as, ai^m, dest, left); |
1413 | } | 1413 | } |
1414 | 1414 | ||
1415 | static void asm_intop_s(ASMState *as, IRIns *ir, ARMIns ai) | 1415 | /* Try to drop cmp r, #0. */ |
1416 | static ARMIns asm_drop_cmp0(ASMState *as, ARMIns ai) | ||
1416 | { | 1417 | { |
1417 | if (as->flagmcp == as->mcp) { /* Drop cmp r, #0. */ | 1418 | if (as->flagmcp == as->mcp) { |
1419 | uint32_t cc = (as->mcp[1] >> 28); | ||
1418 | as->flagmcp = NULL; | 1420 | as->flagmcp = NULL; |
1419 | as->mcp++; | 1421 | if (cc <= CC_NE) { |
1420 | ai |= ARMI_S; | 1422 | as->mcp++; |
1423 | ai |= ARMI_S; | ||
1424 | } else if (cc == CC_GE) { | ||
1425 | *++as->mcp ^= ((CC_GE^CC_PL) << 28); | ||
1426 | ai |= ARMI_S; | ||
1427 | } else if (cc == CC_LT) { | ||
1428 | *++as->mcp ^= ((CC_LT^CC_MI) << 28); | ||
1429 | ai |= ARMI_S; | ||
1430 | } /* else: other conds don't work in general. */ | ||
1421 | } | 1431 | } |
1422 | asm_intop(as, ir, ai); | 1432 | return ai; |
1433 | } | ||
1434 | |||
1435 | static void asm_intop_s(ASMState *as, IRIns *ir, ARMIns ai) | ||
1436 | { | ||
1437 | asm_intop(as, ir, asm_drop_cmp0(as, ai)); | ||
1423 | } | 1438 | } |
1424 | 1439 | ||
1425 | static void asm_intneg(ASMState *as, IRIns *ir, ARMIns ai) | 1440 | static void asm_intneg(ASMState *as, IRIns *ir, ARMIns ai) |
@@ -1514,20 +1529,7 @@ static void asm_neg(ASMState *as, IRIns *ir) | |||
1514 | 1529 | ||
1515 | static void asm_bitop(ASMState *as, IRIns *ir, ARMIns ai) | 1530 | static void asm_bitop(ASMState *as, IRIns *ir, ARMIns ai) |
1516 | { | 1531 | { |
1517 | if (as->flagmcp == as->mcp) { /* Try to drop cmp r, #0. */ | 1532 | ai = asm_drop_cmp0(as, ai); |
1518 | uint32_t cc = (as->mcp[1] >> 28); | ||
1519 | as->flagmcp = NULL; | ||
1520 | if (cc <= CC_NE) { | ||
1521 | as->mcp++; | ||
1522 | ai |= ARMI_S; | ||
1523 | } else if (cc == CC_GE) { | ||
1524 | *++as->mcp ^= ((CC_GE^CC_PL) << 28); | ||
1525 | ai |= ARMI_S; | ||
1526 | } else if (cc == CC_LT) { | ||
1527 | *++as->mcp ^= ((CC_LT^CC_MI) << 28); | ||
1528 | ai |= ARMI_S; | ||
1529 | } /* else: other conds don't work with bit ops. */ | ||
1530 | } | ||
1531 | if (ir->op2 == 0) { | 1533 | if (ir->op2 == 0) { |
1532 | Reg dest = ra_dest(as, ir, RSET_GPR); | 1534 | Reg dest = ra_dest(as, ir, RSET_GPR); |
1533 | uint32_t m = asm_fuseopm(as, ai, ir->op1, RSET_GPR); | 1535 | uint32_t m = asm_fuseopm(as, ai, ir->op1, RSET_GPR); |