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| author | Mike Pall <mike> | 2016-12-07 18:38:32 +0100 |
|---|---|---|
| committer | Mike Pall <mike> | 2016-12-07 18:38:32 +0100 |
| commit | 2ac2cd4699d2e3a2eaa55417eae901216204fb37 (patch) | |
| tree | 0cc8f57bc388c45f155c6e71a14288c1daa595e8 /src | |
| parent | 48b00297b3b37fe77f59f2f4b6fa63358b442f15 (diff) | |
| download | luajit-2ac2cd4699d2e3a2eaa55417eae901216204fb37.tar.gz luajit-2ac2cd4699d2e3a2eaa55417eae901216204fb37.tar.bz2 luajit-2ac2cd4699d2e3a2eaa55417eae901216204fb37.zip | |
ARM64: Reorganize operand extension definitions.
Diffstat (limited to 'src')
| -rw-r--r-- | src/lj_asm_arm64.h | 8 | ||||
| -rw-r--r-- | src/lj_target_arm64.h | 7 |
2 files changed, 9 insertions, 6 deletions
diff --git a/src/lj_asm_arm64.h b/src/lj_asm_arm64.h index eea957b5..fff0b3fd 100644 --- a/src/lj_asm_arm64.h +++ b/src/lj_asm_arm64.h | |||
| @@ -277,7 +277,7 @@ static void asm_fusexref(ASMState *as, A64Ins ai, Reg rd, IRRef ref, | |||
| 277 | if (!emit_checkofs(ai, ofs)) { | 277 | if (!emit_checkofs(ai, ofs)) { |
| 278 | Reg rn = ra_alloc1(as, ref, allow); | 278 | Reg rn = ra_alloc1(as, ref, allow); |
| 279 | Reg rm = ra_allock(as, ofs, rset_exclude(allow, rn)); | 279 | Reg rm = ra_allock(as, ofs, rset_exclude(allow, rn)); |
| 280 | emit_dnm(as, (ai ^ 0x01204800), rd, rn, rm); | 280 | emit_dnm(as, (ai^A64I_LS_R)|A64I_LS_UXTWx, rd, rn, rm); |
| 281 | return; | 281 | return; |
| 282 | } | 282 | } |
| 283 | } | 283 | } |
| @@ -936,7 +936,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir) | |||
| 936 | ra_allock(as, (irt_toitype(ir->t) << 15) | 0x7fff, allow), tmp); | 936 | ra_allock(as, (irt_toitype(ir->t) << 15) | 0x7fff, allow), tmp); |
| 937 | } | 937 | } |
| 938 | if (ofs & FUSE_REG) | 938 | if (ofs & FUSE_REG) |
| 939 | emit_dnm(as, (A64I_LDRx^A64I_LS_R)|A64I_LS_UXTWx, tmp, idx, (ofs & 31)); | 939 | emit_dnm(as, (A64I_LDRx^A64I_LS_R)|A64I_LS_UXTWx|A64I_LS_SH, tmp, idx, (ofs & 31)); |
| 940 | else | 940 | else |
| 941 | emit_lso(as, A64I_LDRx, tmp, idx, ofs); | 941 | emit_lso(as, A64I_LDRx, tmp, idx, ofs); |
| 942 | } | 942 | } |
| @@ -951,7 +951,7 @@ static void asm_ahustore(ASMState *as, IRIns *ir) | |||
| 951 | src = ra_alloc1(as, ir->op2, RSET_FPR); | 951 | src = ra_alloc1(as, ir->op2, RSET_FPR); |
| 952 | idx = asm_fuseahuref(as, ir->op1, &ofs, allow, A64I_STRd); | 952 | idx = asm_fuseahuref(as, ir->op1, &ofs, allow, A64I_STRd); |
| 953 | if (ofs & FUSE_REG) | 953 | if (ofs & FUSE_REG) |
| 954 | emit_dnm(as, (A64I_STRd^A64I_LS_R)|A64I_LS_UXTWx, (src & 31), idx, (ofs &31)); | 954 | emit_dnm(as, (A64I_STRd^A64I_LS_R)|A64I_LS_UXTWx|A64I_LS_SH, (src & 31), idx, (ofs &31)); |
| 955 | else | 955 | else |
| 956 | emit_lso(as, A64I_STRd, (src & 31), idx, ofs); | 956 | emit_lso(as, A64I_STRd, (src & 31), idx, ofs); |
| 957 | } else { | 957 | } else { |
| @@ -968,7 +968,7 @@ static void asm_ahustore(ASMState *as, IRIns *ir) | |||
| 968 | idx = asm_fuseahuref(as, ir->op1, &ofs, rset_exclude(allow, type), | 968 | idx = asm_fuseahuref(as, ir->op1, &ofs, rset_exclude(allow, type), |
| 969 | A64I_STRx); | 969 | A64I_STRx); |
| 970 | if (ofs & FUSE_REG) | 970 | if (ofs & FUSE_REG) |
| 971 | emit_dnm(as, (A64I_STRx^A64I_LS_R)|A64I_LS_UXTWx, tmp, idx, (ofs & 31)); | 971 | emit_dnm(as, (A64I_STRx^A64I_LS_R)|A64I_LS_UXTWx|A64I_LS_SH, tmp, idx, (ofs & 31)); |
| 972 | else | 972 | else |
| 973 | emit_lso(as, A64I_STRx, tmp, idx, ofs); | 973 | emit_lso(as, A64I_STRx, tmp, idx, ofs); |
| 974 | if (ra_hasreg(src)) { | 974 | if (ra_hasreg(src)) { |
diff --git a/src/lj_target_arm64.h b/src/lj_target_arm64.h index 6c8771c6..e1210045 100644 --- a/src/lj_target_arm64.h +++ b/src/lj_target_arm64.h | |||
| @@ -147,8 +147,11 @@ typedef enum A64Ins { | |||
| 147 | A64I_LS_U = 0x01000000, | 147 | A64I_LS_U = 0x01000000, |
| 148 | A64I_LS_S = 0x00800000, | 148 | A64I_LS_S = 0x00800000, |
| 149 | A64I_LS_R = 0x01200800, | 149 | A64I_LS_R = 0x01200800, |
| 150 | A64I_LS_UXTWx = 0x00005000, | 150 | A64I_LS_SH = 0x00001000, |
| 151 | A64I_LS_LSLx = 0x00007000, | 151 | A64I_LS_UXTWx = 0x00004000, |
| 152 | A64I_LS_SXTWx = 0x0000c000, | ||
| 153 | A64I_LS_SXTXx = 0x0000e000, | ||
| 154 | A64I_LS_LSLx = 0x00006000, | ||
| 152 | 155 | ||
| 153 | A64I_ADDw = 0x0b000000, | 156 | A64I_ADDw = 0x0b000000, |
| 154 | A64I_ADDx = 0x8b000000, | 157 | A64I_ADDx = 0x8b000000, |
