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author | Mike Pall <mike> | 2024-01-22 19:12:13 +0100 |
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committer | Mike Pall <mike> | 2024-01-22 19:12:13 +0100 |
commit | 2f35cb45fdd557aacb3875ec6ffd5721f92c9a51 (patch) | |
tree | 3cd628a7514a02575b39c27cba72c1c9f960ce3a /src | |
parent | 4b90f6c4d7420139c135435e1580acb52ea18436 (diff) | |
download | luajit-2f35cb45fdd557aacb3875ec6ffd5721f92c9a51.tar.gz luajit-2f35cb45fdd557aacb3875ec6ffd5721f92c9a51.tar.bz2 luajit-2f35cb45fdd557aacb3875ec6ffd5721f92c9a51.zip |
MIPS64 R2/R6: Fix FP to integer conversions.
Thanks to Peter Cawley. #1146
Diffstat (limited to 'src')
-rw-r--r-- | src/lj_asm_mips.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index d4e40c91..5b83e34d 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h | |||
@@ -653,11 +653,11 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
653 | rset_exclude(RSET_GPR, dest)); | 653 | rset_exclude(RSET_GPR, dest)); |
654 | emit_fg(as, MIPSI_TRUNC_L_D, tmp, left); /* Delay slot. */ | 654 | emit_fg(as, MIPSI_TRUNC_L_D, tmp, left); /* Delay slot. */ |
655 | #if !LJ_TARGET_MIPSR6 | 655 | #if !LJ_TARGET_MIPSR6 |
656 | emit_branch(as, MIPSI_BC1T, 0, 0, l_end); | 656 | emit_branch(as, MIPSI_BC1T, 0, 0, l_end); |
657 | emit_fgh(as, MIPSI_C_OLT_D, 0, left, tmp); | 657 | emit_fgh(as, MIPSI_C_OLT_D, 0, left, tmp); |
658 | #else | 658 | #else |
659 | emit_branch(as, MIPSI_BC1NEZ, 0, (left&31), l_end); | 659 | emit_branch(as, MIPSI_BC1NEZ, 0, (tmp&31), l_end); |
660 | emit_fgh(as, MIPSI_CMP_LT_D, left, left, tmp); | 660 | emit_fgh(as, MIPSI_CMP_LT_D, tmp, left, tmp); |
661 | #endif | 661 | #endif |
662 | emit_lsptr(as, MIPSI_LDC1, (tmp & 31), | 662 | emit_lsptr(as, MIPSI_LDC1, (tmp & 31), |
663 | (void *)&as->J->k64[LJ_K64_2P63], | 663 | (void *)&as->J->k64[LJ_K64_2P63], |
@@ -670,11 +670,11 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
670 | rset_exclude(RSET_GPR, dest)); | 670 | rset_exclude(RSET_GPR, dest)); |
671 | emit_fg(as, MIPSI_TRUNC_L_S, tmp, left); /* Delay slot. */ | 671 | emit_fg(as, MIPSI_TRUNC_L_S, tmp, left); /* Delay slot. */ |
672 | #if !LJ_TARGET_MIPSR6 | 672 | #if !LJ_TARGET_MIPSR6 |
673 | emit_branch(as, MIPSI_BC1T, 0, 0, l_end); | 673 | emit_branch(as, MIPSI_BC1T, 0, 0, l_end); |
674 | emit_fgh(as, MIPSI_C_OLT_S, 0, left, tmp); | 674 | emit_fgh(as, MIPSI_C_OLT_S, 0, left, tmp); |
675 | #else | 675 | #else |
676 | emit_branch(as, MIPSI_BC1NEZ, 0, (left&31), l_end); | 676 | emit_branch(as, MIPSI_BC1NEZ, 0, (tmp&31), l_end); |
677 | emit_fgh(as, MIPSI_CMP_LT_S, left, left, tmp); | 677 | emit_fgh(as, MIPSI_CMP_LT_S, tmp, left, tmp); |
678 | #endif | 678 | #endif |
679 | emit_lsptr(as, MIPSI_LWC1, (tmp & 31), | 679 | emit_lsptr(as, MIPSI_LWC1, (tmp & 31), |
680 | (void *)&as->J->k32[LJ_K32_2P63], | 680 | (void *)&as->J->k32[LJ_K32_2P63], |
@@ -690,8 +690,8 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
690 | MIPSIns mi = irt_is64(ir->t) ? | 690 | MIPSIns mi = irt_is64(ir->t) ? |
691 | (st == IRT_NUM ? MIPSI_TRUNC_L_D : MIPSI_TRUNC_L_S) : | 691 | (st == IRT_NUM ? MIPSI_TRUNC_L_D : MIPSI_TRUNC_L_S) : |
692 | (st == IRT_NUM ? MIPSI_TRUNC_W_D : MIPSI_TRUNC_W_S); | 692 | (st == IRT_NUM ? MIPSI_TRUNC_W_D : MIPSI_TRUNC_W_S); |
693 | emit_tg(as, irt_is64(ir->t) ? MIPSI_DMFC1 : MIPSI_MFC1, dest, left); | 693 | emit_tg(as, irt_is64(ir->t) ? MIPSI_DMFC1 : MIPSI_MFC1, dest, tmp); |
694 | emit_fg(as, mi, left, left); | 694 | emit_fg(as, mi, tmp, left); |
695 | #endif | 695 | #endif |
696 | } | 696 | } |
697 | } | 697 | } |