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| author | Mike Pall <mike> | 2026-07-24 16:14:33 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2026-07-24 16:14:33 +0200 |
| commit | 346ab587cb235b4ef0b5777b4cd29009808d0cc0 (patch) | |
| tree | 7505c26d9eac1621ac381798fed2d284bdb03ec1 /src | |
| parent | 2460b3ff93a1c955de3d62cfc825de7d68dc272e (diff) | |
| download | luajit-346ab587cb235b4ef0b5777b4cd29009808d0cc0.tar.gz luajit-346ab587cb235b4ef0b5777b4cd29009808d0cc0.tar.bz2 luajit-346ab587cb235b4ef0b5777b4cd29009808d0cc0.zip | |
DynASM/x86: Fix movd/movq and vmovd/vmovq operand sizes.
Thanks to Dmitry Stogov. #1489
Diffstat (limited to 'src')
| -rw-r--r-- | src/vm_x64.dasc | 30 | ||||
| -rw-r--r-- | src/vm_x86.dasc | 6 |
2 files changed, 18 insertions, 18 deletions
diff --git a/src/vm_x64.dasc b/src/vm_x64.dasc index 5769d1cf5..2c18acd67 100644 --- a/src/vm_x64.dasc +++ b/src/vm_x64.dasc | |||
| @@ -354,11 +354,11 @@ | |||
| 354 | | | 354 | | |
| 355 | |// Synthesize SSE FP constants. | 355 | |// Synthesize SSE FP constants. |
| 356 | |.macro sseconst_abs, reg, tmp // Synthesize abs mask. | 356 | |.macro sseconst_abs, reg, tmp // Synthesize abs mask. |
| 357 | | mov64 tmp, U64x(7fffffff,ffffffff); movd reg, tmp | 357 | | mov64 tmp, U64x(7fffffff,ffffffff); movq reg, tmp |
| 358 | |.endmacro | 358 | |.endmacro |
| 359 | | | 359 | | |
| 360 | |.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const. | 360 | |.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const. |
| 361 | | mov64 tmp, U64x(val,00000000); movd reg, tmp | 361 | | mov64 tmp, U64x(val,00000000); movq reg, tmp |
| 362 | |.endmacro | 362 | |.endmacro |
| 363 | | | 363 | | |
| 364 | |.macro sseconst_sign, reg, tmp // Synthesize sign mask. | 364 | |.macro sseconst_sign, reg, tmp // Synthesize sign mask. |
| @@ -2087,7 +2087,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
| 2087 | |.endif | 2087 | |.endif |
| 2088 | |1: | 2088 | |1: |
| 2089 | | ja ->fff_fallback | 2089 | | ja ->fff_fallback |
| 2090 | | movd xmm0, RB | 2090 | | movq xmm0, RB |
| 2091 | |.else | 2091 | |.else |
| 2092 | | checknumtp [BASE], ->fff_fallback | 2092 | | checknumtp [BASE], ->fff_fallback |
| 2093 | | movsd xmm0, qword [BASE] | 2093 | | movsd xmm0, qword [BASE] |
| @@ -2122,7 +2122,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
| 2122 | | jmp <1 | 2122 | | jmp <1 |
| 2123 | |2: | 2123 | |2: |
| 2124 | | ja ->fff_fallback_bit_op | 2124 | | ja ->fff_fallback_bit_op |
| 2125 | | movd xmm0, RA | 2125 | | movq xmm0, RA |
| 2126 | |.else | 2126 | |.else |
| 2127 | | checknumtp [RD], ->fff_fallback_bit_op | 2127 | | checknumtp [RD], ->fff_fallback_bit_op |
| 2128 | | movsd xmm0, qword [RD] | 2128 | | movsd xmm0, qword [RD] |
| @@ -2693,7 +2693,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
| 2693 | | ret | 2693 | | ret |
| 2694 | |1: | 2694 | |1: |
| 2695 | | mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double). | 2695 | | mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double). |
| 2696 | | movd xmm1, rdx | 2696 | | movq xmm1, rdx |
| 2697 | | addsd xmm0, xmm1 | 2697 | | addsd xmm0, xmm1 |
| 2698 | | cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range. | 2698 | | cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range. |
| 2699 | | // Note that -0x1p63 converts to -0x8000000000000000LL either way. | 2699 | | // Note that -0x1p63 converts to -0x8000000000000000LL either way. |
| @@ -3005,16 +3005,16 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3005 | | ja ->vmeta_comp | 3005 | | ja ->vmeta_comp |
| 3006 | | // RA is an integer, RD is a number. | 3006 | | // RA is an integer, RD is a number. |
| 3007 | | cvtsi2sd xmm1, RAd | 3007 | | cvtsi2sd xmm1, RAd |
| 3008 | | movd xmm0, RD | 3008 | | movq xmm0, RD |
| 3009 | | jmp >3 | 3009 | | jmp >3 |
| 3010 | |.else | 3010 | |.else |
| 3011 | | cmp ITYPEd, LJ_TISNUM; jae ->vmeta_comp | 3011 | | cmp ITYPEd, LJ_TISNUM; jae ->vmeta_comp |
| 3012 | | cmp RBd, LJ_TISNUM; jae ->vmeta_comp | 3012 | | cmp RBd, LJ_TISNUM; jae ->vmeta_comp |
| 3013 | |.endif | 3013 | |.endif |
| 3014 | |1: | 3014 | |1: |
| 3015 | | movd xmm0, RD | 3015 | | movq xmm0, RD |
| 3016 | |2: | 3016 | |2: |
| 3017 | | movd xmm1, RA | 3017 | | movq xmm1, RA |
| 3018 | |3: | 3018 | |3: |
| 3019 | | add PC, 4 | 3019 | | add PC, 4 |
| 3020 | | ucomisd xmm0, xmm1 | 3020 | | ucomisd xmm0, xmm1 |
| @@ -3059,7 +3059,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3059 | |7: // RD is not an integer. | 3059 | |7: // RD is not an integer. |
| 3060 | | ja >5 | 3060 | | ja >5 |
| 3061 | | // RD is a number. | 3061 | | // RD is a number. |
| 3062 | | movd xmm1, RD | 3062 | | movq xmm1, RD |
| 3063 | | cmp ITYPEd, LJ_TISNUM; jb >1; jne >5 | 3063 | | cmp ITYPEd, LJ_TISNUM; jb >1; jne >5 |
| 3064 | | // RD is a number, RA is an integer. | 3064 | | // RD is a number, RA is an integer. |
| 3065 | | cvtsi2sd xmm0, RAd | 3065 | | cvtsi2sd xmm0, RAd |
| @@ -3074,10 +3074,10 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3074 | |.else | 3074 | |.else |
| 3075 | | cmp RBd, LJ_TISNUM; jae >5 | 3075 | | cmp RBd, LJ_TISNUM; jae >5 |
| 3076 | | cmp ITYPEd, LJ_TISNUM; jae >5 | 3076 | | cmp ITYPEd, LJ_TISNUM; jae >5 |
| 3077 | | movd xmm1, RD | 3077 | | movq xmm1, RD |
| 3078 | |.endif | 3078 | |.endif |
| 3079 | |1: | 3079 | |1: |
| 3080 | | movd xmm0, RA | 3080 | | movq xmm0, RA |
| 3081 | |2: | 3081 | |2: |
| 3082 | | ucomisd xmm0, xmm1 | 3082 | | ucomisd xmm0, xmm1 |
| 3083 | |4: | 3083 | |4: |
| @@ -3199,11 +3199,11 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3199 | | | 3199 | | |
| 3200 | |8: // RA is an integer, RD is a number. | 3200 | |8: // RA is an integer, RD is a number. |
| 3201 | | cvtsi2sd xmm0, RBd | 3201 | | cvtsi2sd xmm0, RBd |
| 3202 | | movd xmm1, RD | 3202 | | movq xmm1, RD |
| 3203 | | ucomisd xmm0, xmm1 | 3203 | | ucomisd xmm0, xmm1 |
| 3204 | | jmp >4 | 3204 | | jmp >4 |
| 3205 | |1: | 3205 | |1: |
| 3206 | | movd xmm0, RD | 3206 | | movq xmm0, RD |
| 3207 | |.else | 3207 | |.else |
| 3208 | | checknum RB, >3 | 3208 | | checknum RB, >3 |
| 3209 | |1: | 3209 | |1: |
| @@ -3881,7 +3881,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3881 | |.else | 3881 | |.else |
| 3882 | | // Convert number to int and back and compare. | 3882 | | // Convert number to int and back and compare. |
| 3883 | | checknum RC, >5 | 3883 | | checknum RC, >5 |
| 3884 | | movd xmm0, RC | 3884 | | movq xmm0, RC |
| 3885 | | cvttsd2si RCd, xmm0 | 3885 | | cvttsd2si RCd, xmm0 |
| 3886 | | cvtsi2sd xmm1, RCd | 3886 | | cvtsi2sd xmm1, RCd |
| 3887 | | ucomisd xmm0, xmm1 | 3887 | | ucomisd xmm0, xmm1 |
| @@ -4007,7 +4007,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 4007 | |.else | 4007 | |.else |
| 4008 | | // Convert number to int and back and compare. | 4008 | | // Convert number to int and back and compare. |
| 4009 | | checknum RC, >5 | 4009 | | checknum RC, >5 |
| 4010 | | movd xmm0, RC | 4010 | | movq xmm0, RC |
| 4011 | | cvttsd2si RCd, xmm0 | 4011 | | cvttsd2si RCd, xmm0 |
| 4012 | | cvtsi2sd xmm1, RCd | 4012 | | cvtsi2sd xmm1, RCd |
| 4013 | | ucomisd xmm0, xmm1 | 4013 | | ucomisd xmm0, xmm1 |
diff --git a/src/vm_x86.dasc b/src/vm_x86.dasc index c930168ae..c201c3343 100644 --- a/src/vm_x86.dasc +++ b/src/vm_x86.dasc | |||
| @@ -444,7 +444,7 @@ | |||
| 444 | |// Synthesize SSE FP constants. | 444 | |// Synthesize SSE FP constants. |
| 445 | |.macro sseconst_abs, reg, tmp // Synthesize abs mask. | 445 | |.macro sseconst_abs, reg, tmp // Synthesize abs mask. |
| 446 | |.if X64 | 446 | |.if X64 |
| 447 | | mov64 tmp, U64x(7fffffff,ffffffff); movd reg, tmp | 447 | | mov64 tmp, U64x(7fffffff,ffffffff); movq reg, tmp |
| 448 | |.else | 448 | |.else |
| 449 | | pxor reg, reg; pcmpeqd reg, reg; psrlq reg, 1 | 449 | | pxor reg, reg; pcmpeqd reg, reg; psrlq reg, 1 |
| 450 | |.endif | 450 | |.endif |
| @@ -452,7 +452,7 @@ | |||
| 452 | | | 452 | | |
| 453 | |.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const. | 453 | |.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const. |
| 454 | |.if X64 | 454 | |.if X64 |
| 455 | | mov64 tmp, U64x(val,00000000); movd reg, tmp | 455 | | mov64 tmp, U64x(val,00000000); movq reg, tmp |
| 456 | |.else | 456 | |.else |
| 457 | | mov tmp, 0x .. val; movd reg, tmp; pshufd reg, reg, 0x51 | 457 | | mov tmp, 0x .. val; movd reg, tmp; pshufd reg, reg, 0x51 |
| 458 | |.endif | 458 | |.endif |
| @@ -3156,7 +3156,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
| 3156 | | ret | 3156 | | ret |
| 3157 | |1: | 3157 | |1: |
| 3158 | | mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double). | 3158 | | mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double). |
| 3159 | | movd xmm1, rdx | 3159 | | movq xmm1, rdx |
| 3160 | | addsd xmm0, xmm1 | 3160 | | addsd xmm0, xmm1 |
| 3161 | | cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range. | 3161 | | cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range. |
| 3162 | | // Note that -0x1p63 converts to -0x8000000000000000LL either way. | 3162 | | // Note that -0x1p63 converts to -0x8000000000000000LL either way. |
