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authorMike Pall <mike>2014-04-17 10:30:35 +0200
committerMike Pall <mike>2014-04-17 10:30:35 +0200
commit65626eac23633bfb511513b55b2b4dec5d50e4d3 (patch)
tree3b1e343e5c5f4f428ad9cf88724cffdf5dc8deb4 /src
parentcc5075e845368538e239a64a34a68c702fbf529d (diff)
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PPC: Don't use mcrxr on PPE.
Diffstat (limited to 'src')
-rw-r--r--src/vm_ppc.dasc35
1 files changed, 29 insertions, 6 deletions
diff --git a/src/vm_ppc.dasc b/src/vm_ppc.dasc
index da75f556..7ae40ecd 100644
--- a/src/vm_ppc.dasc
+++ b/src/vm_ppc.dasc
@@ -75,6 +75,29 @@
75|.endif 75|.endif
76|.endmacro 76|.endmacro
77| 77|
78|.macro clrso, reg
79|.if PPE
80| li reg, 0
81| mtxer reg
82|.else
83| mcrxr cr0
84|.endif
85|.endmacro
86|
87|.macro checkov, reg, noov
88|.if PPE
89| mfxer reg
90| add reg, reg, reg
91| cmpwi reg, 0
92| li reg, 0
93| mtxer reg
94| bgey noov
95|.else
96| mcrxr cr0
97| bley noov
98|.endif
99|.endmacro
100|
78|//----------------------------------------------------------------------- 101|//-----------------------------------------------------------------------
79| 102|
80|// Fixed register assignments for the interpreter. 103|// Fixed register assignments for the interpreter.
@@ -2587,7 +2610,7 @@ static void build_subroutines(BuildCtx *ctx)
2587 | stw CARG2, DISPATCH_GL(vmstate)(DISPATCH) 2610 | stw CARG2, DISPATCH_GL(vmstate)(DISPATCH)
2588 | savex_ 0,1,2,3 2611 | savex_ 0,1,2,3
2589 | stw CARG1, 0(sp) // Store extended stack chain. 2612 | stw CARG1, 0(sp) // Store extended stack chain.
2590 | mcrxr cr0 // Clear SO flag. 2613 | clrso TMP1
2591 | savex_ 4,5,6,7 2614 | savex_ 4,5,6,7
2592 | addi CARG2, sp, 16+32*8+32*4 // Recompute original value of sp. 2615 | addi CARG2, sp, 16+32*8+32*4 // Recompute original value of sp.
2593 | savex_ 8,9,10,11 2616 | savex_ 8,9,10,11
@@ -2706,7 +2729,7 @@ static void build_subroutines(BuildCtx *ctx)
2706 | cmpwi CARG2, 0 2729 | cmpwi CARG2, 0
2707 | li CARG1, 0 2730 | li CARG1, 0
2708 | beqlr 2731 | beqlr
2709 | mcrxr cr0 // Clear SO for -2147483648 % -1 and return 0. 2732 | clrso TMP0 // Clear SO for -2147483648 % -1 and return 0.
2710 | blr 2733 | blr
2711 | 2734 |
2712 |//----------------------------------------------------------------------- 2735 |//-----------------------------------------------------------------------
@@ -3309,7 +3332,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
3309 |4: 3332 |4:
3310 |.if not GPR64 3333 |.if not GPR64
3311 | // Potential overflow. 3334 | // Potential overflow.
3312 | mcrxr cr0; bley <1 // Ignore unrelated overflow. 3335 | checkov TMP1, <1 // Ignore unrelated overflow.
3313 |.endif 3336 |.endif
3314 | lus TMP1, 0x41e0 // 2^31. 3337 | lus TMP1, 0x41e0 // 2^31.
3315 | li TMP0, 0 3338 | li TMP0, 0
@@ -3494,7 +3517,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
3494 |2: 3517 |2:
3495 | ins_next2 3518 | ins_next2
3496 |4: // Overflow. 3519 |4: // Overflow.
3497 | mcrxr cr0; bley <1 // Ignore unrelated overflow. 3520 | checkov TMP0, <1 // Ignore unrelated overflow.
3498 | ins_arithfallback b 3521 | ins_arithfallback b
3499 |5: // FP variant. 3522 |5: // FP variant.
3500 ||if (vk == 1) { 3523 ||if (vk == 1) {
@@ -4692,7 +4715,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
4692 | b <1 4715 | b <1
4693 if (vk) { 4716 if (vk) {
4694 |6: // Potential overflow. 4717 |6: // Potential overflow.
4695 | mcrxr cr0; bley <4 // Ignore unrelated overflow. 4718 | checkov TMP0, <4 // Ignore unrelated overflow.
4696 | b <2 4719 | b <2
4697 } 4720 }
4698 |.endif 4721 |.endif
@@ -4832,7 +4855,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
4832 | // Traces on PPC don't store the trace number, so use 0. 4855 | // Traces on PPC don't store the trace number, so use 0.
4833 | stw ZERO, DISPATCH_GL(vmstate)(DISPATCH) 4856 | stw ZERO, DISPATCH_GL(vmstate)(DISPATCH)
4834 | lwzx TRACE:TMP2, TMP1, RD 4857 | lwzx TRACE:TMP2, TMP1, RD
4835 | mcrxr cr0 // Clear SO flag. 4858 | clrso TMP1
4836 | lp TMP2, TRACE:TMP2->mcode 4859 | lp TMP2, TRACE:TMP2->mcode
4837 | stw BASE, DISPATCH_GL(jit_base)(DISPATCH) 4860 | stw BASE, DISPATCH_GL(jit_base)(DISPATCH)
4838 | mtctr TMP2 4861 | mtctr TMP2