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author | Mike Pall <mike> | 2012-06-11 00:50:22 +0200 |
---|---|---|
committer | Mike Pall <mike> | 2012-06-11 00:50:22 +0200 |
commit | 7da4d16faa5009f181b24c17d6fb73830f52fea7 (patch) | |
tree | 22696076477c9794759d35dc94c6668f805896da /src | |
parent | 02acb39b1009eaba1fe64d58c3e56cbc2a2c344e (diff) | |
download | luajit-7da4d16faa5009f181b24c17d6fb73830f52fea7.tar.gz luajit-7da4d16faa5009f181b24c17d6fb73830f52fea7.tar.bz2 luajit-7da4d16faa5009f181b24c17d6fb73830f52fea7.zip |
PPC: Cleanup interpreter.
Use DynASM defines instead of C defines.
Diffstat (limited to 'src')
-rw-r--r-- | src/vm_ppc.dasc | 1480 |
1 files changed, 740 insertions, 740 deletions
diff --git a/src/vm_ppc.dasc b/src/vm_ppc.dasc index 7dcdf987..d2d10b3e 100644 --- a/src/vm_ppc.dasc +++ b/src/vm_ppc.dasc | |||
@@ -613,29 +613,29 @@ static void build_subroutines(BuildCtx *ctx) | |||
613 | | mr RB, BASE | 613 | | mr RB, BASE |
614 | | mr BASE, TMP2 // Restore caller BASE. | 614 | | mr BASE, TMP2 // Restore caller BASE. |
615 | | lwz LFUNC:TMP1, FRAME_FUNC(TMP2) | 615 | | lwz LFUNC:TMP1, FRAME_FUNC(TMP2) |
616 | #if LJ_HASFFI | 616 | |.if FFI |
617 | | cmplwi TMP0, 1 | 617 | | cmplwi TMP0, 1 |
618 | #endif | 618 | |.endif |
619 | | lwz PC, -16(RB) // Restore PC from [cont|PC]. | 619 | | lwz PC, -16(RB) // Restore PC from [cont|PC]. |
620 | | subi TMP2, RD, 8 | 620 | | subi TMP2, RD, 8 |
621 | | lwz TMP1, LFUNC:TMP1->pc | 621 | | lwz TMP1, LFUNC:TMP1->pc |
622 | | stwx TISNIL, RA, TMP2 // Ensure one valid arg. | 622 | | stwx TISNIL, RA, TMP2 // Ensure one valid arg. |
623 | #if LJ_HASFFI | 623 | |.if FFI |
624 | | ble >1 | 624 | | ble >1 |
625 | #endif | 625 | |.endif |
626 | | lwz KBASE, PC2PROTO(k)(TMP1) | 626 | | lwz KBASE, PC2PROTO(k)(TMP1) |
627 | | // BASE = base, RA = resultptr, RB = meta base | 627 | | // BASE = base, RA = resultptr, RB = meta base |
628 | | mtctr TMP0 | 628 | | mtctr TMP0 |
629 | | bctr // Jump to continuation. | 629 | | bctr // Jump to continuation. |
630 | | | 630 | | |
631 | #if LJ_HASFFI | 631 | |.if FFI |
632 | |1: | 632 | |1: |
633 | | beq ->cont_ffi_callback // cont = 1: return from FFI callback. | 633 | | beq ->cont_ffi_callback // cont = 1: return from FFI callback. |
634 | | // cont = 0: tailcall from C function. | 634 | | // cont = 0: tailcall from C function. |
635 | | subi TMP1, RB, 16 | 635 | | subi TMP1, RB, 16 |
636 | | sub RC, TMP1, BASE | 636 | | sub RC, TMP1, BASE |
637 | | b ->vm_call_tail | 637 | | b ->vm_call_tail |
638 | #endif | 638 | |.endif |
639 | | | 639 | | |
640 | |->cont_cat: // RA = resultptr, RB = meta base | 640 | |->cont_cat: // RA = resultptr, RB = meta base |
641 | | lwz INS, -4(PC) | 641 | | lwz INS, -4(PC) |
@@ -675,18 +675,18 @@ static void build_subroutines(BuildCtx *ctx) | |||
675 | | b >1 | 675 | | b >1 |
676 | | | 676 | | |
677 | |->vmeta_tgetb: // TMP0 = index | 677 | |->vmeta_tgetb: // TMP0 = index |
678 | if (!LJ_DUALNUM) { | 678 | |.if not DUALNUM |
679 | | tonum_u f0, TMP0 | 679 | | tonum_u f0, TMP0 |
680 | } | 680 | |.endif |
681 | | decode_RB8 RB, INS | 681 | | decode_RB8 RB, INS |
682 | | la CARG3, DISPATCH_GL(tmptv)(DISPATCH) | 682 | | la CARG3, DISPATCH_GL(tmptv)(DISPATCH) |
683 | | add CARG2, BASE, RB | 683 | | add CARG2, BASE, RB |
684 | if (LJ_DUALNUM) { | 684 | |.if DUALNUM |
685 | | stw TISNUM, 0(CARG3) | 685 | | stw TISNUM, 0(CARG3) |
686 | | stw TMP0, 4(CARG3) | 686 | | stw TMP0, 4(CARG3) |
687 | } else { | 687 | |.else |
688 | | stfd f0, 0(CARG3) | 688 | | stfd f0, 0(CARG3) |
689 | } | 689 | |.endif |
690 | | b >1 | 690 | | b >1 |
691 | | | 691 | | |
692 | |->vmeta_tgetv: | 692 | |->vmeta_tgetv: |
@@ -740,18 +740,18 @@ static void build_subroutines(BuildCtx *ctx) | |||
740 | | b >1 | 740 | | b >1 |
741 | | | 741 | | |
742 | |->vmeta_tsetb: // TMP0 = index | 742 | |->vmeta_tsetb: // TMP0 = index |
743 | if (!LJ_DUALNUM) { | 743 | |.if not DUALNUM |
744 | | tonum_u f0, TMP0 | 744 | | tonum_u f0, TMP0 |
745 | } | 745 | |.endif |
746 | | decode_RB8 RB, INS | 746 | | decode_RB8 RB, INS |
747 | | la CARG3, DISPATCH_GL(tmptv)(DISPATCH) | 747 | | la CARG3, DISPATCH_GL(tmptv)(DISPATCH) |
748 | | add CARG2, BASE, RB | 748 | | add CARG2, BASE, RB |
749 | if (LJ_DUALNUM) { | 749 | |.if DUALNUM |
750 | | stw TISNUM, 0(CARG3) | 750 | | stw TISNUM, 0(CARG3) |
751 | | stw TMP0, 4(CARG3) | 751 | | stw TMP0, 4(CARG3) |
752 | } else { | 752 | |.else |
753 | | stfd f0, 0(CARG3) | 753 | | stfd f0, 0(CARG3) |
754 | } | 754 | |.endif |
755 | | b >1 | 755 | | b >1 |
756 | | | 756 | | |
757 | |->vmeta_tsetv: | 757 | |->vmeta_tsetv: |
@@ -789,17 +789,17 @@ static void build_subroutines(BuildCtx *ctx) | |||
789 | |->vmeta_comp: | 789 | |->vmeta_comp: |
790 | | mr CARG1, L | 790 | | mr CARG1, L |
791 | | subi PC, PC, 4 | 791 | | subi PC, PC, 4 |
792 | if (LJ_DUALNUM) { | 792 | |.if DUALNUM |
793 | | mr CARG2, RA | 793 | | mr CARG2, RA |
794 | } else { | 794 | |.else |
795 | | add CARG2, BASE, RA | 795 | | add CARG2, BASE, RA |
796 | } | 796 | |.endif |
797 | | stw PC, SAVE_PC | 797 | | stw PC, SAVE_PC |
798 | if (LJ_DUALNUM) { | 798 | |.if DUALNUM |
799 | | mr CARG3, RD | 799 | | mr CARG3, RD |
800 | } else { | 800 | |.else |
801 | | add CARG3, BASE, RD | 801 | | add CARG3, BASE, RD |
802 | } | 802 | |.endif |
803 | | stw BASE, L->base | 803 | | stw BASE, L->base |
804 | | decode_OP1 CARG4, INS | 804 | | decode_OP1 CARG4, INS |
805 | | bl extern lj_meta_comp // (lua_State *L, TValue *o1, *o2, int op) | 805 | | bl extern lj_meta_comp // (lua_State *L, TValue *o1, *o2, int op) |
@@ -849,7 +849,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
849 | | b <3 | 849 | | b <3 |
850 | | | 850 | | |
851 | |->vmeta_equal_cd: | 851 | |->vmeta_equal_cd: |
852 | #if LJ_HASFFI | 852 | |.if FFI |
853 | | mr CARG2, INS | 853 | | mr CARG2, INS |
854 | | subi PC, PC, 4 | 854 | | subi PC, PC, 4 |
855 | | stw BASE, L->base | 855 | | stw BASE, L->base |
@@ -858,7 +858,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
858 | | bl extern lj_meta_equal_cd // (lua_State *L, BCIns op) | 858 | | bl extern lj_meta_equal_cd // (lua_State *L, BCIns op) |
859 | | // Returns 0/1 or TValue * (metamethod). | 859 | | // Returns 0/1 or TValue * (metamethod). |
860 | | b <3 | 860 | | b <3 |
861 | #endif | 861 | |.endif |
862 | | | 862 | | |
863 | |//-- Arithmetic metamethods --------------------------------------------- | 863 | |//-- Arithmetic metamethods --------------------------------------------- |
864 | | | 864 | | |
@@ -867,11 +867,11 @@ static void build_subroutines(BuildCtx *ctx) | |||
867 | | add CARG4, BASE, RB | 867 | | add CARG4, BASE, RB |
868 | | b >1 | 868 | | b >1 |
869 | |->vmeta_arith_nv2: | 869 | |->vmeta_arith_nv2: |
870 | if (LJ_DUALNUM) { | 870 | |.if DUALNUM |
871 | | mr CARG3, RC | 871 | | mr CARG3, RC |
872 | | mr CARG4, RB | 872 | | mr CARG4, RB |
873 | | b >1 | 873 | | b >1 |
874 | } | 874 | |.endif |
875 | | | 875 | | |
876 | |->vmeta_unm: | 876 | |->vmeta_unm: |
877 | | mr CARG3, RD | 877 | | mr CARG3, RD |
@@ -886,15 +886,15 @@ static void build_subroutines(BuildCtx *ctx) | |||
886 | |->vmeta_arith_vv: | 886 | |->vmeta_arith_vv: |
887 | | add CARG3, BASE, RB | 887 | | add CARG3, BASE, RB |
888 | | add CARG4, BASE, RC | 888 | | add CARG4, BASE, RC |
889 | if (LJ_DUALNUM) { | 889 | |.if DUALNUM |
890 | | b >1 | 890 | | b >1 |
891 | } | 891 | |.endif |
892 | |->vmeta_arith_vn2: | 892 | |->vmeta_arith_vn2: |
893 | |->vmeta_arith_vv2: | 893 | |->vmeta_arith_vv2: |
894 | if (LJ_DUALNUM) { | 894 | |.if DUALNUM |
895 | | mr CARG3, RB | 895 | | mr CARG3, RB |
896 | | mr CARG4, RC | 896 | | mr CARG4, RC |
897 | } | 897 | |.endif |
898 | |1: | 898 | |1: |
899 | | add CARG2, BASE, RA | 899 | | add CARG2, BASE, RA |
900 | | stw BASE, L->base | 900 | | stw BASE, L->base |
@@ -974,17 +974,17 @@ static void build_subroutines(BuildCtx *ctx) | |||
974 | | stw PC, SAVE_PC | 974 | | stw PC, SAVE_PC |
975 | | mr SAVE0, INS | 975 | | mr SAVE0, INS |
976 | | bl extern lj_meta_for // (lua_State *L, TValue *base) | 976 | | bl extern lj_meta_for // (lua_State *L, TValue *base) |
977 | #if LJ_HASJIT | 977 | |.if JIT |
978 | | decode_OP1 TMP0, SAVE0 | 978 | | decode_OP1 TMP0, SAVE0 |
979 | #endif | 979 | |.endif |
980 | | decode_RA8 RA, SAVE0 | 980 | | decode_RA8 RA, SAVE0 |
981 | #if LJ_HASJIT | 981 | |.if JIT |
982 | | cmpwi TMP0, BC_JFORI | 982 | | cmpwi TMP0, BC_JFORI |
983 | #endif | 983 | |.endif |
984 | | decode_RD8 RD, SAVE0 | 984 | | decode_RD8 RD, SAVE0 |
985 | #if LJ_HASJIT | 985 | |.if JIT |
986 | | beqy =>BC_JFORI | 986 | | beqy =>BC_JFORI |
987 | #endif | 987 | |.endif |
988 | | b =>BC_FORI | 988 | | b =>BC_FORI |
989 | | | 989 | | |
990 | |//----------------------------------------------------------------------- | 990 | |//----------------------------------------------------------------------- |
@@ -1181,11 +1181,11 @@ static void build_subroutines(BuildCtx *ctx) | |||
1181 | | ffgccheck | 1181 | | ffgccheck |
1182 | | mr CARG1, L | 1182 | | mr CARG1, L |
1183 | | mr CARG2, BASE | 1183 | | mr CARG2, BASE |
1184 | if (LJ_DUALNUM) { | 1184 | |.if DUALNUM |
1185 | | bl extern lj_str_fromnumber // (lua_State *L, cTValue *o) | 1185 | | bl extern lj_str_fromnumber // (lua_State *L, cTValue *o) |
1186 | } else { | 1186 | |.else |
1187 | | bl extern lj_str_fromnum // (lua_State *L, lua_Number *np) | 1187 | | bl extern lj_str_fromnum // (lua_State *L, lua_Number *np) |
1188 | } | 1188 | |.endif |
1189 | | // Returns GCstr *. | 1189 | | // Returns GCstr *. |
1190 | | li CARG3, LJ_TSTR | 1190 | | li CARG3, LJ_TSTR |
1191 | | b ->fff_restv | 1191 | | b ->fff_restv |
@@ -1243,43 +1243,43 @@ static void build_subroutines(BuildCtx *ctx) | |||
1243 | | lwz CARG3, 0(BASE) | 1243 | | lwz CARG3, 0(BASE) |
1244 | | lwz TAB:CARG1, 4(BASE) | 1244 | | lwz TAB:CARG1, 4(BASE) |
1245 | | lwz CARG4, 8(BASE) | 1245 | | lwz CARG4, 8(BASE) |
1246 | if (LJ_DUALNUM) { | 1246 | |.if DUALNUM |
1247 | | lwz TMP2, 12(BASE) | 1247 | | lwz TMP2, 12(BASE) |
1248 | } else { | 1248 | |.else |
1249 | | lfd FARG2, 8(BASE) | 1249 | | lfd FARG2, 8(BASE) |
1250 | } | 1250 | |.endif |
1251 | | blt ->fff_fallback | 1251 | | blt ->fff_fallback |
1252 | | checktab CARG3 | 1252 | | checktab CARG3 |
1253 | | checknum cr1, CARG4 | 1253 | | checknum cr1, CARG4 |
1254 | | lwz PC, FRAME_PC(BASE) | 1254 | | lwz PC, FRAME_PC(BASE) |
1255 | if (LJ_DUALNUM) { | 1255 | |.if DUALNUM |
1256 | | bne ->fff_fallback | 1256 | | bne ->fff_fallback |
1257 | | bne cr1, ->fff_fallback | 1257 | | bne cr1, ->fff_fallback |
1258 | } else { | 1258 | |.else |
1259 | | lus TMP0, 0x3ff0 | 1259 | | lus TMP0, 0x3ff0 |
1260 | | stw ZERO, TMPD_LO | 1260 | | stw ZERO, TMPD_LO |
1261 | | bne ->fff_fallback | 1261 | | bne ->fff_fallback |
1262 | | stw TMP0, TMPD_HI | 1262 | | stw TMP0, TMPD_HI |
1263 | | bge cr1, ->fff_fallback | 1263 | | bge cr1, ->fff_fallback |
1264 | | lfd FARG1, TMPD | 1264 | | lfd FARG1, TMPD |
1265 | | toint TMP2, FARG2, f0 | 1265 | | toint TMP2, FARG2, f0 |
1266 | } | 1266 | |.endif |
1267 | | lwz TMP0, TAB:CARG1->asize | 1267 | | lwz TMP0, TAB:CARG1->asize |
1268 | | lwz TMP1, TAB:CARG1->array | 1268 | | lwz TMP1, TAB:CARG1->array |
1269 | if (!LJ_DUALNUM) { | 1269 | |.if not DUALNUM |
1270 | | fadd FARG2, FARG2, FARG1 | 1270 | | fadd FARG2, FARG2, FARG1 |
1271 | } | 1271 | |.endif |
1272 | | addi TMP2, TMP2, 1 | 1272 | | addi TMP2, TMP2, 1 |
1273 | | la RA, -8(BASE) | 1273 | | la RA, -8(BASE) |
1274 | | cmplw TMP0, TMP2 | 1274 | | cmplw TMP0, TMP2 |
1275 | if (LJ_DUALNUM) { | 1275 | |.if DUALNUM |
1276 | | stw TISNUM, 0(RA) | 1276 | | stw TISNUM, 0(RA) |
1277 | | slwi TMP3, TMP2, 3 | 1277 | | slwi TMP3, TMP2, 3 |
1278 | | stw TMP2, 4(RA) | 1278 | | stw TMP2, 4(RA) |
1279 | } else { | 1279 | |.else |
1280 | | slwi TMP3, TMP2, 3 | 1280 | | slwi TMP3, TMP2, 3 |
1281 | | stfd FARG2, 0(RA) | 1281 | | stfd FARG2, 0(RA) |
1282 | } | 1282 | |.endif |
1283 | | ble >2 // Not in array part? | 1283 | | ble >2 // Not in array part? |
1284 | | lwzx TMP2, TMP1, TMP3 | 1284 | | lwzx TMP2, TMP1, TMP3 |
1285 | | lfdx f0, TMP1, TMP3 | 1285 | | lfdx f0, TMP1, TMP3 |
@@ -1319,11 +1319,11 @@ static void build_subroutines(BuildCtx *ctx) | |||
1319 | | lfd f0, CFUNC:RB->upvalue[0] | 1319 | | lfd f0, CFUNC:RB->upvalue[0] |
1320 | | la RA, -8(BASE) | 1320 | | la RA, -8(BASE) |
1321 | #endif | 1321 | #endif |
1322 | if (LJ_DUALNUM) { | 1322 | |.if DUALNUM |
1323 | | stw TISNUM, 8(BASE) | 1323 | | stw TISNUM, 8(BASE) |
1324 | } else { | 1324 | |.else |
1325 | | stw ZERO, 8(BASE) | 1325 | | stw ZERO, 8(BASE) |
1326 | } | 1326 | |.endif |
1327 | | stw ZERO, 12(BASE) | 1327 | | stw ZERO, 12(BASE) |
1328 | | li RD, (3+1)*8 | 1328 | | li RD, (3+1)*8 |
1329 | | stfd f0, 0(RA) | 1329 | | stfd f0, 0(RA) |
@@ -1498,24 +1498,24 @@ static void build_subroutines(BuildCtx *ctx) | |||
1498 | | | 1498 | | |
1499 | |.ffunc_1 math_abs | 1499 | |.ffunc_1 math_abs |
1500 | | checknum CARG3 | 1500 | | checknum CARG3 |
1501 | if (LJ_DUALNUM) { | 1501 | |.if DUALNUM |
1502 | | bne >2 | 1502 | | bne >2 |
1503 | | srawi TMP1, CARG1, 31 | 1503 | | srawi TMP1, CARG1, 31 |
1504 | | xor TMP2, TMP1, CARG1 | 1504 | | xor TMP2, TMP1, CARG1 |
1505 | | sub. CARG1, TMP2, TMP1 | 1505 | | sub. CARG1, TMP2, TMP1 |
1506 | | blt >1 | 1506 | | blt >1 |
1507 | |->fff_resi: | 1507 | |->fff_resi: |
1508 | | lwz PC, FRAME_PC(BASE) | 1508 | | lwz PC, FRAME_PC(BASE) |
1509 | | la RA, -8(BASE) | 1509 | | la RA, -8(BASE) |
1510 | | stw TISNUM, -8(BASE) | 1510 | | stw TISNUM, -8(BASE) |
1511 | | stw CRET1, -4(BASE) | 1511 | | stw CRET1, -4(BASE) |
1512 | | b ->fff_res1 | 1512 | | b ->fff_res1 |
1513 | |1: | 1513 | |1: |
1514 | | lus CARG3, 0x41e0 // 2^31. | 1514 | | lus CARG3, 0x41e0 // 2^31. |
1515 | | li CARG1, 0 | 1515 | | li CARG1, 0 |
1516 | | b ->fff_restv | 1516 | | b ->fff_restv |
1517 | |2: | 1517 | |2: |
1518 | } | 1518 | |.endif |
1519 | | bge ->fff_fallback | 1519 | | bge ->fff_fallback |
1520 | | rlwinm CARG3, CARG3, 0, 1, 31 | 1520 | | rlwinm CARG3, CARG3, 0, 1, 31 |
1521 | | // Fallthrough. | 1521 | | // Fallthrough. |
@@ -1635,14 +1635,14 @@ static void build_subroutines(BuildCtx *ctx) | |||
1635 | | b ->fff_resn | 1635 | | b ->fff_resn |
1636 | |.endmacro | 1636 | |.endmacro |
1637 | | | 1637 | | |
1638 | if (LJ_DUALNUM) { | 1638 | |.if DUALNUM |
1639 | | math_round floor | 1639 | | math_round floor |
1640 | | math_round ceil | 1640 | | math_round ceil |
1641 | } else { | 1641 | |.else |
1642 | | // NYI: use internal implementation. | 1642 | | // NYI: use internal implementation. |
1643 | | math_extern floor | 1643 | | math_extern floor |
1644 | | math_extern ceil | 1644 | | math_extern ceil |
1645 | } | 1645 | |.endif |
1646 | | | 1646 | | |
1647 | | math_extern sqrt | 1647 | | math_extern sqrt |
1648 | | math_extern log | 1648 | | math_extern log |
@@ -1667,20 +1667,20 @@ static void build_subroutines(BuildCtx *ctx) | |||
1667 | | fmul FARG1, FARG1, FARG2 | 1667 | | fmul FARG1, FARG1, FARG2 |
1668 | | b ->fff_resn | 1668 | | b ->fff_resn |
1669 | | | 1669 | | |
1670 | if (LJ_DUALNUM) { | 1670 | |.if DUALNUM |
1671 | |.ffunc math_ldexp | 1671 | |.ffunc math_ldexp |
1672 | | cmplwi NARGS8:RC, 16 | 1672 | | cmplwi NARGS8:RC, 16 |
1673 | | lwz CARG3, 0(BASE) | 1673 | | lwz CARG3, 0(BASE) |
1674 | | lfd FARG1, 0(BASE) | 1674 | | lfd FARG1, 0(BASE) |
1675 | | lwz CARG4, 8(BASE) | 1675 | | lwz CARG4, 8(BASE) |
1676 | | lwz CARG1, 12(BASE) | 1676 | | lwz CARG1, 12(BASE) |
1677 | | blt ->fff_fallback | 1677 | | blt ->fff_fallback |
1678 | | checknum CARG3; bge ->fff_fallback | 1678 | | checknum CARG3; bge ->fff_fallback |
1679 | | checknum CARG4; bne ->fff_fallback | 1679 | | checknum CARG4; bne ->fff_fallback |
1680 | } else { | 1680 | |.else |
1681 | |.ffunc_nn math_ldexp | 1681 | |.ffunc_nn math_ldexp |
1682 | | toint CARG1, FARG2 | 1682 | | toint CARG1, FARG2 |
1683 | } | 1683 | |.endif |
1684 | | bl extern ldexp | 1684 | | bl extern ldexp |
1685 | | b ->fff_resn | 1685 | | b ->fff_resn |
1686 | | | 1686 | | |
@@ -1690,17 +1690,17 @@ static void build_subroutines(BuildCtx *ctx) | |||
1690 | | bl extern frexp | 1690 | | bl extern frexp |
1691 | | lwz TMP1, DISPATCH_GL(tmptv)(DISPATCH) | 1691 | | lwz TMP1, DISPATCH_GL(tmptv)(DISPATCH) |
1692 | | la RA, -8(BASE) | 1692 | | la RA, -8(BASE) |
1693 | if (!LJ_DUALNUM) { | 1693 | |.if not DUALNUM |
1694 | | tonum_i FARG2, TMP1 | 1694 | | tonum_i FARG2, TMP1 |
1695 | } | 1695 | |.endif |
1696 | | stfd FARG1, 0(RA) | 1696 | | stfd FARG1, 0(RA) |
1697 | | li RD, (2+1)*8 | 1697 | | li RD, (2+1)*8 |
1698 | if (LJ_DUALNUM) { | 1698 | |.if DUALNUM |
1699 | | stw TISNUM, 8(RA) | 1699 | | stw TISNUM, 8(RA) |
1700 | | stw TMP1, 12(RA) | 1700 | | stw TMP1, 12(RA) |
1701 | } else { | 1701 | |.else |
1702 | | stfd FARG2, 8(RA) | 1702 | | stfd FARG2, 8(RA) |
1703 | } | 1703 | |.endif |
1704 | | b ->fff_res | 1704 | | b ->fff_res |
1705 | | | 1705 | | |
1706 | |.ffunc_n math_modf | 1706 | |.ffunc_n math_modf |
@@ -1713,7 +1713,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1713 | | b ->fff_res | 1713 | | b ->fff_res |
1714 | | | 1714 | | |
1715 | |.macro math_minmax, name, ismax | 1715 | |.macro math_minmax, name, ismax |
1716 | ||if (LJ_DUALNUM) { | 1716 | |.if DUALNUM |
1717 | | .ffunc_1 name | 1717 | | .ffunc_1 name |
1718 | | checknum CARG3 | 1718 | | checknum CARG3 |
1719 | | addi TMP1, BASE, 8 | 1719 | | addi TMP1, BASE, 8 |
@@ -1767,7 +1767,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1767 | | bne ->fff_fallback | 1767 | | bne ->fff_fallback |
1768 | | tonum_i FARG2, CARG2 | 1768 | | tonum_i FARG2, CARG2 |
1769 | | b <6 | 1769 | | b <6 |
1770 | ||} else { | 1770 | |.else |
1771 | | .ffunc_n name | 1771 | | .ffunc_n name |
1772 | | li TMP1, 8 | 1772 | | li TMP1, 8 |
1773 | |1: | 1773 | |1: |
@@ -1785,7 +1785,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1785 | | fsel FARG1, f0, FARG2, FARG1 | 1785 | | fsel FARG1, f0, FARG2, FARG1 |
1786 | |.endif | 1786 | |.endif |
1787 | | b <1 | 1787 | | b <1 |
1788 | ||} | 1788 | |.endif |
1789 | |.endmacro | 1789 | |.endmacro |
1790 | | | 1790 | | |
1791 | | math_minmax math_min, 0 | 1791 | | math_minmax math_min, 0 |
@@ -1806,45 +1806,45 @@ static void build_subroutines(BuildCtx *ctx) | |||
1806 | | checkstr CARG3 | 1806 | | checkstr CARG3 |
1807 | | bne ->fff_fallback | 1807 | | bne ->fff_fallback |
1808 | | lwz TMP0, STR:CARG1->len | 1808 | | lwz TMP0, STR:CARG1->len |
1809 | if (LJ_DUALNUM) { | 1809 | |.if DUALNUM |
1810 | | lbz CARG1, STR:CARG1[1] // Access is always ok (NUL at end). | 1810 | | lbz CARG1, STR:CARG1[1] // Access is always ok (NUL at end). |
1811 | | li RD, (0+1)*8 | 1811 | | li RD, (0+1)*8 |
1812 | | lwz PC, FRAME_PC(BASE) | 1812 | | lwz PC, FRAME_PC(BASE) |
1813 | | cmplwi TMP0, 0 | 1813 | | cmplwi TMP0, 0 |
1814 | | la RA, -8(BASE) | 1814 | | la RA, -8(BASE) |
1815 | | beqy ->fff_res | 1815 | | beqy ->fff_res |
1816 | | b ->fff_resi | 1816 | | b ->fff_resi |
1817 | } else { | 1817 | |.else |
1818 | | lbz TMP1, STR:CARG1[1] // Access is always ok (NUL at end). | 1818 | | lbz TMP1, STR:CARG1[1] // Access is always ok (NUL at end). |
1819 | | addic TMP3, TMP0, -1 // RD = ((str->len != 0)+1)*8 | 1819 | | addic TMP3, TMP0, -1 // RD = ((str->len != 0)+1)*8 |
1820 | | subfe RD, TMP3, TMP0 | 1820 | | subfe RD, TMP3, TMP0 |
1821 | | stw TMP1, TONUM_LO // Inlined tonum_u f0, TMP1. | 1821 | | stw TMP1, TONUM_LO // Inlined tonum_u f0, TMP1. |
1822 | | addi RD, RD, 1 | 1822 | | addi RD, RD, 1 |
1823 | | lfd f0, TONUM_D | 1823 | | lfd f0, TONUM_D |
1824 | | la RA, -8(BASE) | 1824 | | la RA, -8(BASE) |
1825 | | lwz PC, FRAME_PC(BASE) | 1825 | | lwz PC, FRAME_PC(BASE) |
1826 | | fsub f0, f0, TOBIT | 1826 | | fsub f0, f0, TOBIT |
1827 | | slwi RD, RD, 3 | 1827 | | slwi RD, RD, 3 |
1828 | | stfd f0, 0(RA) | 1828 | | stfd f0, 0(RA) |
1829 | | b ->fff_res | 1829 | | b ->fff_res |
1830 | } | 1830 | |.endif |
1831 | | | 1831 | | |
1832 | |.ffunc string_char // Only handle the 1-arg case here. | 1832 | |.ffunc string_char // Only handle the 1-arg case here. |
1833 | | ffgccheck | 1833 | | ffgccheck |
1834 | | cmplwi NARGS8:RC, 8 | 1834 | | cmplwi NARGS8:RC, 8 |
1835 | | lwz CARG3, 0(BASE) | 1835 | | lwz CARG3, 0(BASE) |
1836 | if (LJ_DUALNUM) { | 1836 | |.if DUALNUM |
1837 | | lwz TMP0, 4(BASE) | 1837 | | lwz TMP0, 4(BASE) |
1838 | | bne ->fff_fallback // Exactly 1 argument. | 1838 | | bne ->fff_fallback // Exactly 1 argument. |
1839 | | checknum CARG3; bne ->fff_fallback | 1839 | | checknum CARG3; bne ->fff_fallback |
1840 | | la CARG2, 7(BASE) | 1840 | | la CARG2, 7(BASE) |
1841 | } else { | 1841 | |.else |
1842 | | lfd FARG1, 0(BASE) | 1842 | | lfd FARG1, 0(BASE) |
1843 | | bne ->fff_fallback // Exactly 1 argument. | 1843 | | bne ->fff_fallback // Exactly 1 argument. |
1844 | | checknum CARG3; bge ->fff_fallback | 1844 | | checknum CARG3; bge ->fff_fallback |
1845 | | toint TMP0, FARG1 | 1845 | | toint TMP0, FARG1 |
1846 | | la CARG2, TMPD_BLO | 1846 | | la CARG2, TMPD_BLO |
1847 | } | 1847 | |.endif |
1848 | | li CARG3, 1 | 1848 | | li CARG3, 1 |
1849 | | cmplwi TMP0, 255; bgt ->fff_fallback | 1849 | | cmplwi TMP0, 255; bgt ->fff_fallback |
1850 | |->fff_newstr: | 1850 | |->fff_newstr: |
@@ -1861,36 +1861,36 @@ static void build_subroutines(BuildCtx *ctx) | |||
1861 | | ffgccheck | 1861 | | ffgccheck |
1862 | | cmplwi NARGS8:RC, 16 | 1862 | | cmplwi NARGS8:RC, 16 |
1863 | | lwz CARG3, 16(BASE) | 1863 | | lwz CARG3, 16(BASE) |
1864 | if (!LJ_DUALNUM) { | 1864 | |.if not DUALNUM |
1865 | | lfd f0, 16(BASE) | 1865 | | lfd f0, 16(BASE) |
1866 | } | 1866 | |.endif |
1867 | | lwz TMP0, 0(BASE) | 1867 | | lwz TMP0, 0(BASE) |
1868 | | lwz STR:CARG1, 4(BASE) | 1868 | | lwz STR:CARG1, 4(BASE) |
1869 | | blt ->fff_fallback | 1869 | | blt ->fff_fallback |
1870 | | lwz CARG2, 8(BASE) | 1870 | | lwz CARG2, 8(BASE) |
1871 | if (LJ_DUALNUM) { | 1871 | |.if DUALNUM |
1872 | | lwz TMP1, 12(BASE) | 1872 | | lwz TMP1, 12(BASE) |
1873 | } else { | 1873 | |.else |
1874 | | lfd f1, 8(BASE) | 1874 | | lfd f1, 8(BASE) |
1875 | } | 1875 | |.endif |
1876 | | li TMP2, -1 | 1876 | | li TMP2, -1 |
1877 | | beq >1 | 1877 | | beq >1 |
1878 | if (LJ_DUALNUM) { | 1878 | |.if DUALNUM |
1879 | | checknum CARG3 | 1879 | | checknum CARG3 |
1880 | | lwz TMP2, 20(BASE) | 1880 | | lwz TMP2, 20(BASE) |
1881 | | bne ->fff_fallback | 1881 | | bne ->fff_fallback |
1882 | |1: | 1882 | |1: |
1883 | | checknum CARG2; bne ->fff_fallback | 1883 | | checknum CARG2; bne ->fff_fallback |
1884 | } else { | 1884 | |.else |
1885 | | checknum CARG3; bge ->fff_fallback | 1885 | | checknum CARG3; bge ->fff_fallback |
1886 | | toint TMP2, f0 | 1886 | | toint TMP2, f0 |
1887 | |1: | 1887 | |1: |
1888 | | checknum CARG2; bge ->fff_fallback | 1888 | | checknum CARG2; bge ->fff_fallback |
1889 | } | 1889 | |.endif |
1890 | | checkstr TMP0; bne ->fff_fallback | 1890 | | checkstr TMP0; bne ->fff_fallback |
1891 | if (!LJ_DUALNUM) { | 1891 | |.if not DUALNUM |
1892 | | toint TMP1, f1 | 1892 | | toint TMP1, f1 |
1893 | } | 1893 | |.endif |
1894 | | lwz TMP0, STR:CARG1->len | 1894 | | lwz TMP0, STR:CARG1->len |
1895 | | cmplw TMP0, TMP2 // len < end? (unsigned compare) | 1895 | | cmplw TMP0, TMP2 // len < end? (unsigned compare) |
1896 | | addi TMP3, TMP2, 1 | 1896 | | addi TMP3, TMP2, 1 |
@@ -1930,19 +1930,19 @@ static void build_subroutines(BuildCtx *ctx) | |||
1930 | | lwz TMP0, 0(BASE) | 1930 | | lwz TMP0, 0(BASE) |
1931 | | lwz STR:CARG1, 4(BASE) | 1931 | | lwz STR:CARG1, 4(BASE) |
1932 | | lwz CARG4, 8(BASE) | 1932 | | lwz CARG4, 8(BASE) |
1933 | if (LJ_DUALNUM) { | 1933 | |.if DUALNUM |
1934 | | lwz CARG3, 12(BASE) | 1934 | | lwz CARG3, 12(BASE) |
1935 | } else { | 1935 | |.else |
1936 | | lfd FARG2, 8(BASE) | 1936 | | lfd FARG2, 8(BASE) |
1937 | } | 1937 | |.endif |
1938 | | blt ->fff_fallback | 1938 | | blt ->fff_fallback |
1939 | | checkstr TMP0; bne ->fff_fallback | 1939 | | checkstr TMP0; bne ->fff_fallback |
1940 | if (LJ_DUALNUM) { | 1940 | |.if DUALNUM |
1941 | | checknum CARG4; bne ->fff_fallback | 1941 | | checknum CARG4; bne ->fff_fallback |
1942 | } else { | 1942 | |.else |
1943 | | checknum CARG4; bge ->fff_fallback | 1943 | | checknum CARG4; bge ->fff_fallback |
1944 | | toint CARG3, FARG2 | 1944 | | toint CARG3, FARG2 |
1945 | } | 1945 | |.endif |
1946 | | lwz TMP0, STR:CARG1->len | 1946 | | lwz TMP0, STR:CARG1->len |
1947 | | cmpwi CARG3, 0 | 1947 | | cmpwi CARG3, 0 |
1948 | | lwz TMP1, DISPATCH_GL(tmpbuf.sz)(DISPATCH) | 1948 | | lwz TMP1, DISPATCH_GL(tmpbuf.sz)(DISPATCH) |
@@ -2036,15 +2036,15 @@ static void build_subroutines(BuildCtx *ctx) | |||
2036 | |//-- Bit library -------------------------------------------------------- | 2036 | |//-- Bit library -------------------------------------------------------- |
2037 | | | 2037 | | |
2038 | |.macro .ffunc_bit, name | 2038 | |.macro .ffunc_bit, name |
2039 | ||if (LJ_DUALNUM) { | 2039 | |.if DUALNUM |
2040 | | .ffunc_1 bit_..name | 2040 | | .ffunc_1 bit_..name |
2041 | | checknum CARG3; bnel ->fff_tobit_fb | 2041 | | checknum CARG3; bnel ->fff_tobit_fb |
2042 | ||} else { | 2042 | |.else |
2043 | | .ffunc_n bit_..name | 2043 | | .ffunc_n bit_..name |
2044 | | fadd FARG1, FARG1, TOBIT | 2044 | | fadd FARG1, FARG1, TOBIT |
2045 | | stfd FARG1, TMPD | 2045 | | stfd FARG1, TMPD |
2046 | | lwz CARG1, TMPD_LO | 2046 | | lwz CARG1, TMPD_LO |
2047 | ||} | 2047 | |.endif |
2048 | |.endmacro | 2048 | |.endmacro |
2049 | | | 2049 | | |
2050 | |.macro .ffunc_bit_op, name, ins | 2050 | |.macro .ffunc_bit_op, name, ins |
@@ -2054,21 +2054,21 @@ static void build_subroutines(BuildCtx *ctx) | |||
2054 | |1: | 2054 | |1: |
2055 | | lwz CARG4, 0(TMP1) | 2055 | | lwz CARG4, 0(TMP1) |
2056 | | cmplw cr1, TMP1, TMP2 | 2056 | | cmplw cr1, TMP1, TMP2 |
2057 | ||if (LJ_DUALNUM) { | 2057 | |.if DUALNUM |
2058 | | lwz CARG2, 4(TMP1) | 2058 | | lwz CARG2, 4(TMP1) |
2059 | ||} else { | 2059 | |.else |
2060 | | lfd FARG1, 0(TMP1) | 2060 | | lfd FARG1, 0(TMP1) |
2061 | ||} | 2061 | |.endif |
2062 | | bgey cr1, ->fff_resi | 2062 | | bgey cr1, ->fff_resi |
2063 | | checknum CARG4 | 2063 | | checknum CARG4 |
2064 | ||if (LJ_DUALNUM) { | 2064 | |.if DUALNUM |
2065 | | bnel ->fff_bitop_fb | 2065 | | bnel ->fff_bitop_fb |
2066 | ||} else { | 2066 | |.else |
2067 | | fadd FARG1, FARG1, TOBIT | 2067 | | fadd FARG1, FARG1, TOBIT |
2068 | | bge ->fff_fallback | 2068 | | bge ->fff_fallback |
2069 | | stfd FARG1, TMPD | 2069 | | stfd FARG1, TMPD |
2070 | | lwz CARG2, TMPD_LO | 2070 | | lwz CARG2, TMPD_LO |
2071 | ||} | 2071 | |.endif |
2072 | | ins CARG1, CARG1, CARG2 | 2072 | | ins CARG1, CARG1, CARG2 |
2073 | | addi TMP1, TMP1, 8 | 2073 | | addi TMP1, TMP1, 8 |
2074 | | b <1 | 2074 | | b <1 |
@@ -2090,12 +2090,12 @@ static void build_subroutines(BuildCtx *ctx) | |||
2090 | | b ->fff_resi | 2090 | | b ->fff_resi |
2091 | | | 2091 | | |
2092 | |.macro .ffunc_bit_sh, name, ins, shmod | 2092 | |.macro .ffunc_bit_sh, name, ins, shmod |
2093 | ||if (LJ_DUALNUM) { | 2093 | |.if DUALNUM |
2094 | | .ffunc_2 bit_..name | 2094 | | .ffunc_2 bit_..name |
2095 | | checknum CARG3; bnel ->fff_tobit_fb | 2095 | | checknum CARG3; bnel ->fff_tobit_fb |
2096 | | // Note: no inline conversion from number for 2nd argument! | 2096 | | // Note: no inline conversion from number for 2nd argument! |
2097 | | checknum CARG4; bne ->fff_fallback | 2097 | | checknum CARG4; bne ->fff_fallback |
2098 | ||} else { | 2098 | |.else |
2099 | | .ffunc_nn bit_..name | 2099 | | .ffunc_nn bit_..name |
2100 | | fadd FARG1, FARG1, TOBIT | 2100 | | fadd FARG1, FARG1, TOBIT |
2101 | | fadd FARG2, FARG2, TOBIT | 2101 | | fadd FARG2, FARG2, TOBIT |
@@ -2103,7 +2103,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2103 | | lwz CARG1, TMPD_LO | 2103 | | lwz CARG1, TMPD_LO |
2104 | | stfd FARG2, TMPD | 2104 | | stfd FARG2, TMPD |
2105 | | lwz CARG2, TMPD_LO | 2105 | | lwz CARG2, TMPD_LO |
2106 | ||} | 2106 | |.endif |
2107 | |.if shmod == 1 | 2107 | |.if shmod == 1 |
2108 | | rlwinm CARG2, CARG2, 0, 27, 31 | 2108 | | rlwinm CARG2, CARG2, 0, 27, 31 |
2109 | |.elif shmod == 2 | 2109 | |.elif shmod == 2 |
@@ -2120,12 +2120,12 @@ static void build_subroutines(BuildCtx *ctx) | |||
2120 | |.ffunc_bit_sh ror, rotlw, 2 | 2120 | |.ffunc_bit_sh ror, rotlw, 2 |
2121 | | | 2121 | | |
2122 | |.ffunc_bit tobit | 2122 | |.ffunc_bit tobit |
2123 | if (LJ_DUALNUM) { | 2123 | |.if DUALNUM |
2124 | | b ->fff_resi | 2124 | | b ->fff_resi |
2125 | } else { | 2125 | |.else |
2126 | |->fff_resi: | 2126 | |->fff_resi: |
2127 | | tonum_i FARG1, CRET1 | 2127 | | tonum_i FARG1, CRET1 |
2128 | } | 2128 | |.endif |
2129 | |->fff_resn: | 2129 | |->fff_resn: |
2130 | | lwz PC, FRAME_PC(BASE) | 2130 | | lwz PC, FRAME_PC(BASE) |
2131 | | la RA, -8(BASE) | 2131 | | la RA, -8(BASE) |
@@ -2134,23 +2134,23 @@ static void build_subroutines(BuildCtx *ctx) | |||
2134 | | | 2134 | | |
2135 | |// Fallback FP number to bit conversion. | 2135 | |// Fallback FP number to bit conversion. |
2136 | |->fff_tobit_fb: | 2136 | |->fff_tobit_fb: |
2137 | if (LJ_DUALNUM) { | 2137 | |.if DUALNUM |
2138 | | lfd FARG1, 0(BASE) | 2138 | | lfd FARG1, 0(BASE) |
2139 | | bgt ->fff_fallback | 2139 | | bgt ->fff_fallback |
2140 | | fadd FARG1, FARG1, TOBIT | 2140 | | fadd FARG1, FARG1, TOBIT |
2141 | | stfd FARG1, TMPD | 2141 | | stfd FARG1, TMPD |
2142 | | lwz CARG1, TMPD_LO | 2142 | | lwz CARG1, TMPD_LO |
2143 | | blr | 2143 | | blr |
2144 | } | 2144 | |.endif |
2145 | |->fff_bitop_fb: | 2145 | |->fff_bitop_fb: |
2146 | if (LJ_DUALNUM) { | 2146 | |.if DUALNUM |
2147 | | lfd FARG1, 0(TMP1) | 2147 | | lfd FARG1, 0(TMP1) |
2148 | | bgt ->fff_fallback | 2148 | | bgt ->fff_fallback |
2149 | | fadd FARG1, FARG1, TOBIT | 2149 | | fadd FARG1, FARG1, TOBIT |
2150 | | stfd FARG1, TMPD | 2150 | | stfd FARG1, TMPD |
2151 | | lwz CARG2, TMPD_LO | 2151 | | lwz CARG2, TMPD_LO |
2152 | | blr | 2152 | | blr |
2153 | } | 2153 | |.endif |
2154 | | | 2154 | | |
2155 | |//----------------------------------------------------------------------- | 2155 | |//----------------------------------------------------------------------- |
2156 | | | 2156 | | |
@@ -2222,7 +2222,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2222 | |//----------------------------------------------------------------------- | 2222 | |//----------------------------------------------------------------------- |
2223 | | | 2223 | | |
2224 | |->vm_record: // Dispatch target for recording phase. | 2224 | |->vm_record: // Dispatch target for recording phase. |
2225 | #if LJ_HASJIT | 2225 | |.if JIT |
2226 | | lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH) | 2226 | | lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH) |
2227 | | andi. TMP0, TMP3, HOOK_VMEVENT // No recording while in vmevent. | 2227 | | andi. TMP0, TMP3, HOOK_VMEVENT // No recording while in vmevent. |
2228 | | bne >5 | 2228 | | bne >5 |
@@ -2235,7 +2235,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2235 | | beqy >1 | 2235 | | beqy >1 |
2236 | | stw TMP2, DISPATCH_GL(hookcount)(DISPATCH) | 2236 | | stw TMP2, DISPATCH_GL(hookcount)(DISPATCH) |
2237 | | b >1 | 2237 | | b >1 |
2238 | #endif | 2238 | |.endif |
2239 | | | 2239 | | |
2240 | |->vm_rethook: // Dispatch target for return hooks. | 2240 | |->vm_rethook: // Dispatch target for return hooks. |
2241 | | lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH) | 2241 | | lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH) |
@@ -2287,7 +2287,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2287 | | b <4 | 2287 | | b <4 |
2288 | | | 2288 | | |
2289 | |->vm_hotloop: // Hot loop counter underflow. | 2289 | |->vm_hotloop: // Hot loop counter underflow. |
2290 | #if LJ_HASJIT | 2290 | |.if JIT |
2291 | | lwz LFUNC:TMP1, FRAME_FUNC(BASE) | 2291 | | lwz LFUNC:TMP1, FRAME_FUNC(BASE) |
2292 | | addi CARG1, DISPATCH, GG_DISP2J | 2292 | | addi CARG1, DISPATCH, GG_DISP2J |
2293 | | stw PC, SAVE_PC | 2293 | | stw PC, SAVE_PC |
@@ -2301,19 +2301,19 @@ static void build_subroutines(BuildCtx *ctx) | |||
2301 | | stw TMP1, L->top | 2301 | | stw TMP1, L->top |
2302 | | bl extern lj_trace_hot // (jit_State *J, const BCIns *pc) | 2302 | | bl extern lj_trace_hot // (jit_State *J, const BCIns *pc) |
2303 | | b <3 | 2303 | | b <3 |
2304 | #endif | 2304 | |.endif |
2305 | | | 2305 | | |
2306 | |->vm_callhook: // Dispatch target for call hooks. | 2306 | |->vm_callhook: // Dispatch target for call hooks. |
2307 | | mr CARG2, PC | 2307 | | mr CARG2, PC |
2308 | #if LJ_HASJIT | 2308 | |.if JIT |
2309 | | b >1 | 2309 | | b >1 |
2310 | #endif | 2310 | |.endif |
2311 | | | 2311 | | |
2312 | |->vm_hotcall: // Hot call counter underflow. | 2312 | |->vm_hotcall: // Hot call counter underflow. |
2313 | #if LJ_HASJIT | 2313 | |.if JIT |
2314 | | ori CARG2, PC, 1 | 2314 | | ori CARG2, PC, 1 |
2315 | |1: | 2315 | |1: |
2316 | #endif | 2316 | |.endif |
2317 | | add TMP0, BASE, RC | 2317 | | add TMP0, BASE, RC |
2318 | | stw PC, SAVE_PC | 2318 | | stw PC, SAVE_PC |
2319 | | mr CARG1, L | 2319 | | mr CARG1, L |
@@ -2344,7 +2344,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2344 | |.endmacro | 2344 | |.endmacro |
2345 | | | 2345 | | |
2346 | |->vm_exit_handler: | 2346 | |->vm_exit_handler: |
2347 | #if LJ_HASJIT | 2347 | |.if JIT |
2348 | | addi sp, sp, -(16+32*8+32*4) | 2348 | | addi sp, sp, -(16+32*8+32*4) |
2349 | | stmw r2, 16+32*8+2*4(sp) | 2349 | | stmw r2, 16+32*8+2*4(sp) |
2350 | | addi DISPATCH, JGL, -GG_DISP2G-32768 | 2350 | | addi DISPATCH, JGL, -GG_DISP2G-32768 |
@@ -2389,9 +2389,9 @@ static void build_subroutines(BuildCtx *ctx) | |||
2389 | | stw TMP2, 0(sp) | 2389 | | stw TMP2, 0(sp) |
2390 | | stw L, SAVE_L // Set SAVE_L (on-trace resume/yield). | 2390 | | stw L, SAVE_L // Set SAVE_L (on-trace resume/yield). |
2391 | | b >1 | 2391 | | b >1 |
2392 | #endif | 2392 | |.endif |
2393 | |->vm_exit_interp: | 2393 | |->vm_exit_interp: |
2394 | #if LJ_HASJIT | 2394 | |.if JIT |
2395 | | // CARG1 = MULTRES or negated error code, BASE, PC and JGL set. | 2395 | | // CARG1 = MULTRES or negated error code, BASE, PC and JGL set. |
2396 | | lwz L, SAVE_L | 2396 | | lwz L, SAVE_L |
2397 | | addi DISPATCH, JGL, -GG_DISP2G-32768 | 2397 | | addi DISPATCH, JGL, -GG_DISP2G-32768 |
@@ -2441,7 +2441,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2441 | | neg CARG2, CARG1 | 2441 | | neg CARG2, CARG1 |
2442 | | mr CARG1, L | 2442 | | mr CARG1, L |
2443 | | bl extern lj_err_throw // (lua_State *L, int errcode) | 2443 | | bl extern lj_err_throw // (lua_State *L, int errcode) |
2444 | #endif | 2444 | |.endif |
2445 | | | 2445 | | |
2446 | |//----------------------------------------------------------------------- | 2446 | |//----------------------------------------------------------------------- |
2447 | |//-- Math helper functions ---------------------------------------------- | 2447 | |//-- Math helper functions ---------------------------------------------- |
@@ -2453,9 +2453,9 @@ static void build_subroutines(BuildCtx *ctx) | |||
2453 | |->vm_ceil: | 2453 | |->vm_ceil: |
2454 | | b extern ceil | 2454 | | b extern ceil |
2455 | |->vm_trunc: | 2455 | |->vm_trunc: |
2456 | #if LJ_HASJIT | 2456 | |.if JIT |
2457 | | b extern trunc | 2457 | | b extern trunc |
2458 | #endif | 2458 | |.endif |
2459 | | | 2459 | | |
2460 | |->vm_modi: | 2460 | |->vm_modi: |
2461 | | divwo. TMP0, CARG1, CARG2 | 2461 | | divwo. TMP0, CARG1, CARG2 |
@@ -2511,7 +2511,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2511 | |1: | 2511 | |1: |
2512 | | fabs FARG1, FARG1; blr | 2512 | | fabs FARG1, FARG1; blr |
2513 | |2: | 2513 | |2: |
2514 | #if LJ_HASJIT | 2514 | |.if JIT |
2515 | | cmplwi CARG1, 9; beq >9; bgt >2 | 2515 | | cmplwi CARG1, 9; beq >9; bgt >2 |
2516 | | b extern atan2 | 2516 | | b extern atan2 |
2517 | | // No support needed for IR_LDEXP. | 2517 | | // No support needed for IR_LDEXP. |
@@ -2526,9 +2526,9 @@ static void build_subroutines(BuildCtx *ctx) | |||
2526 | | blr | 2526 | | blr |
2527 | |9: | 2527 | |9: |
2528 | | NYI // Bad op. | 2528 | | NYI // Bad op. |
2529 | #else | 2529 | |.else |
2530 | | NYI // Other operations only needed by JIT compiler. | 2530 | | NYI // Other operations only needed by JIT compiler. |
2531 | #endif | 2531 | |.endif |
2532 | | | 2532 | | |
2533 | |//----------------------------------------------------------------------- | 2533 | |//----------------------------------------------------------------------- |
2534 | |//-- Miscellaneous functions -------------------------------------------- | 2534 | |//-- Miscellaneous functions -------------------------------------------- |
@@ -2565,7 +2565,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2565 | | | 2565 | | |
2566 | |// Handler for callback functions. Callback slot number in r11, g in r12. | 2566 | |// Handler for callback functions. Callback slot number in r11, g in r12. |
2567 | |->vm_ffi_callback: | 2567 | |->vm_ffi_callback: |
2568 | #if LJ_HASFFI | 2568 | |.if FFI |
2569 | |.type CTSTATE, CTState, PC | 2569 | |.type CTSTATE, CTState, PC |
2570 | | saveregs | 2570 | | saveregs |
2571 | | lwz CTSTATE, GL:r12->ctype_state | 2571 | | lwz CTSTATE, GL:r12->ctype_state |
@@ -2613,10 +2613,10 @@ static void build_subroutines(BuildCtx *ctx) | |||
2613 | | st_vmstate | 2613 | | st_vmstate |
2614 | | lfs TONUM, TMPD | 2614 | | lfs TONUM, TMPD |
2615 | | ins_callt | 2615 | | ins_callt |
2616 | #endif | 2616 | |.endif |
2617 | | | 2617 | | |
2618 | |->cont_ffi_callback: // Return from FFI callback. | 2618 | |->cont_ffi_callback: // Return from FFI callback. |
2619 | #if LJ_HASFFI | 2619 | |.if FFI |
2620 | | lwz CTSTATE, DISPATCH_GL(ctype_state)(DISPATCH) | 2620 | | lwz CTSTATE, DISPATCH_GL(ctype_state)(DISPATCH) |
2621 | | stw BASE, L->base | 2621 | | stw BASE, L->base |
2622 | | stw RB, L->top | 2622 | | stw RB, L->top |
@@ -2628,11 +2628,11 @@ static void build_subroutines(BuildCtx *ctx) | |||
2628 | | lfd FARG1, CTSTATE->cb.fpr[0] | 2628 | | lfd FARG1, CTSTATE->cb.fpr[0] |
2629 | | lwz CRET2, CTSTATE->cb.gpr[1] | 2629 | | lwz CRET2, CTSTATE->cb.gpr[1] |
2630 | | b ->vm_leave_unw | 2630 | | b ->vm_leave_unw |
2631 | #endif | 2631 | |.endif |
2632 | | | 2632 | | |
2633 | |->vm_ffi_call: // Call C function via FFI. | 2633 | |->vm_ffi_call: // Call C function via FFI. |
2634 | | // Caveat: needs special frame unwinding, see below. | 2634 | | // Caveat: needs special frame unwinding, see below. |
2635 | #if LJ_HASFFI | 2635 | |.if FFI |
2636 | | .type CCSTATE, CCallState, CARG1 | 2636 | | .type CCSTATE, CCallState, CARG1 |
2637 | | lwz TMP1, CCSTATE->spadj | 2637 | | lwz TMP1, CCSTATE->spadj |
2638 | | mflr TMP0 | 2638 | | mflr TMP0 |
@@ -2691,7 +2691,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2691 | | stw CARG4, CCSTATE:TMP1->gpr[3] | 2691 | | stw CARG4, CCSTATE:TMP1->gpr[3] |
2692 | | mr r14, TMP2 | 2692 | | mr r14, TMP2 |
2693 | | blr | 2693 | | blr |
2694 | #endif | 2694 | |.endif |
2695 | |// Note: vm_ffi_call must be the last function in this object file! | 2695 | |// Note: vm_ffi_call must be the last function in this object file! |
2696 | | | 2696 | | |
2697 | |//----------------------------------------------------------------------- | 2697 | |//----------------------------------------------------------------------- |
@@ -2711,158 +2711,158 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2711 | 2711 | ||
2712 | case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT: | 2712 | case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT: |
2713 | | // RA = src1*8, RD = src2*8, JMP with RD = target | 2713 | | // RA = src1*8, RD = src2*8, JMP with RD = target |
2714 | if (LJ_DUALNUM) { | 2714 | |.if DUALNUM |
2715 | | lwzux TMP0, RA, BASE | 2715 | | lwzux TMP0, RA, BASE |
2716 | | addi PC, PC, 4 | 2716 | | addi PC, PC, 4 |
2717 | | lwz CARG2, 4(RA) | 2717 | | lwz CARG2, 4(RA) |
2718 | | lwzux TMP1, RD, BASE | 2718 | | lwzux TMP1, RD, BASE |
2719 | | lwz TMP2, -4(PC) | 2719 | | lwz TMP2, -4(PC) |
2720 | | checknum cr0, TMP0 | 2720 | | checknum cr0, TMP0 |
2721 | | lwz CARG3, 4(RD) | 2721 | | lwz CARG3, 4(RD) |
2722 | | decode_RD4 TMP2, TMP2 | 2722 | | decode_RD4 TMP2, TMP2 |
2723 | | checknum cr1, TMP1 | 2723 | | checknum cr1, TMP1 |
2724 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | 2724 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) |
2725 | | bne cr0, >7 | 2725 | | bne cr0, >7 |
2726 | | bne cr1, >8 | 2726 | | bne cr1, >8 |
2727 | | cmpw CARG2, CARG3 | 2727 | | cmpw CARG2, CARG3 |
2728 | if (op == BC_ISLT) { | 2728 | if (op == BC_ISLT) { |
2729 | | bge >2 | 2729 | | bge >2 |
2730 | } else if (op == BC_ISGE) { | 2730 | } else if (op == BC_ISGE) { |
2731 | | blt >2 | 2731 | | blt >2 |
2732 | } else if (op == BC_ISLE) { | 2732 | } else if (op == BC_ISLE) { |
2733 | | bgt >2 | 2733 | | bgt >2 |
2734 | } else { | ||
2735 | | ble >2 | ||
2736 | } | ||
2737 | |1: | ||
2738 | | add PC, PC, TMP2 | ||
2739 | |2: | ||
2740 | | ins_next | ||
2741 | | | ||
2742 | |7: // RA is not an integer. | ||
2743 | | bgt cr0, ->vmeta_comp | ||
2744 | | // RA is a number. | ||
2745 | | lfd f0, 0(RA) | ||
2746 | | bgt cr1, ->vmeta_comp | ||
2747 | | blt cr1, >4 | ||
2748 | | // RA is a number, RD is an integer. | ||
2749 | | tonum_i f1, CARG3 | ||
2750 | | b >5 | ||
2751 | | | ||
2752 | |8: // RA is an integer, RD is not an integer. | ||
2753 | | bgt cr1, ->vmeta_comp | ||
2754 | | // RA is an integer, RD is a number. | ||
2755 | | tonum_i f0, CARG2 | ||
2756 | |4: | ||
2757 | | lfd f1, 0(RD) | ||
2758 | |5: | ||
2759 | | fcmpu cr0, f0, f1 | ||
2760 | if (op == BC_ISLT) { | ||
2761 | | bge <2 | ||
2762 | } else if (op == BC_ISGE) { | ||
2763 | | blt <2 | ||
2764 | } else if (op == BC_ISLE) { | ||
2765 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | ||
2766 | | bge <2 | ||
2767 | } else { | ||
2768 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | ||
2769 | | blt <2 | ||
2770 | } | ||
2771 | | b <1 | ||
2772 | } else { | 2734 | } else { |
2773 | | lwzx TMP0, BASE, RA | 2735 | | ble >2 |
2774 | | addi PC, PC, 4 | 2736 | } |
2775 | | lfdx f0, BASE, RA | 2737 | |1: |
2776 | | lwzx TMP1, BASE, RD | 2738 | | add PC, PC, TMP2 |
2777 | | checknum cr0, TMP0 | 2739 | |2: |
2778 | | lwz TMP2, -4(PC) | 2740 | | ins_next |
2779 | | lfdx f1, BASE, RD | 2741 | | |
2780 | | checknum cr1, TMP1 | 2742 | |7: // RA is not an integer. |
2781 | | decode_RD4 TMP2, TMP2 | 2743 | | bgt cr0, ->vmeta_comp |
2782 | | bge cr0, ->vmeta_comp | 2744 | | // RA is a number. |
2783 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | 2745 | | lfd f0, 0(RA) |
2784 | | bge cr1, ->vmeta_comp | 2746 | | bgt cr1, ->vmeta_comp |
2785 | | fcmpu cr0, f0, f1 | 2747 | | blt cr1, >4 |
2786 | if (op == BC_ISLT) { | 2748 | | // RA is a number, RD is an integer. |
2787 | | bge >1 | 2749 | | tonum_i f1, CARG3 |
2788 | } else if (op == BC_ISGE) { | 2750 | | b >5 |
2789 | | blt >1 | 2751 | | |
2790 | } else if (op == BC_ISLE) { | 2752 | |8: // RA is an integer, RD is not an integer. |
2791 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | 2753 | | bgt cr1, ->vmeta_comp |
2792 | | bge >1 | 2754 | | // RA is an integer, RD is a number. |
2793 | } else { | 2755 | | tonum_i f0, CARG2 |
2794 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | 2756 | |4: |
2795 | | blt >1 | 2757 | | lfd f1, 0(RD) |
2796 | } | 2758 | |5: |
2797 | | add PC, PC, TMP2 | 2759 | | fcmpu cr0, f0, f1 |
2798 | |1: | 2760 | if (op == BC_ISLT) { |
2799 | | ins_next | 2761 | | bge <2 |
2762 | } else if (op == BC_ISGE) { | ||
2763 | | blt <2 | ||
2764 | } else if (op == BC_ISLE) { | ||
2765 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | ||
2766 | | bge <2 | ||
2767 | } else { | ||
2768 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | ||
2769 | | blt <2 | ||
2800 | } | 2770 | } |
2771 | | b <1 | ||
2772 | |.else | ||
2773 | | lwzx TMP0, BASE, RA | ||
2774 | | addi PC, PC, 4 | ||
2775 | | lfdx f0, BASE, RA | ||
2776 | | lwzx TMP1, BASE, RD | ||
2777 | | checknum cr0, TMP0 | ||
2778 | | lwz TMP2, -4(PC) | ||
2779 | | lfdx f1, BASE, RD | ||
2780 | | checknum cr1, TMP1 | ||
2781 | | decode_RD4 TMP2, TMP2 | ||
2782 | | bge cr0, ->vmeta_comp | ||
2783 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | ||
2784 | | bge cr1, ->vmeta_comp | ||
2785 | | fcmpu cr0, f0, f1 | ||
2786 | if (op == BC_ISLT) { | ||
2787 | | bge >1 | ||
2788 | } else if (op == BC_ISGE) { | ||
2789 | | blt >1 | ||
2790 | } else if (op == BC_ISLE) { | ||
2791 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | ||
2792 | | bge >1 | ||
2793 | } else { | ||
2794 | | cror 4*cr0+lt, 4*cr0+lt, 4*cr0+eq | ||
2795 | | blt >1 | ||
2796 | } | ||
2797 | | add PC, PC, TMP2 | ||
2798 | |1: | ||
2799 | | ins_next | ||
2800 | |.endif | ||
2801 | break; | 2801 | break; |
2802 | 2802 | ||
2803 | case BC_ISEQV: case BC_ISNEV: | 2803 | case BC_ISEQV: case BC_ISNEV: |
2804 | vk = op == BC_ISEQV; | 2804 | vk = op == BC_ISEQV; |
2805 | | // RA = src1*8, RD = src2*8, JMP with RD = target | 2805 | | // RA = src1*8, RD = src2*8, JMP with RD = target |
2806 | if (LJ_DUALNUM) { | 2806 | |.if DUALNUM |
2807 | | lwzux TMP0, RA, BASE | 2807 | | lwzux TMP0, RA, BASE |
2808 | | addi PC, PC, 4 | 2808 | | addi PC, PC, 4 |
2809 | | lwz CARG2, 4(RA) | 2809 | | lwz CARG2, 4(RA) |
2810 | | lwzux TMP1, RD, BASE | 2810 | | lwzux TMP1, RD, BASE |
2811 | | checknum cr0, TMP0 | 2811 | | checknum cr0, TMP0 |
2812 | | lwz TMP2, -4(PC) | 2812 | | lwz TMP2, -4(PC) |
2813 | | checknum cr1, TMP1 | 2813 | | checknum cr1, TMP1 |
2814 | | decode_RD4 TMP2, TMP2 | 2814 | | decode_RD4 TMP2, TMP2 |
2815 | | lwz CARG3, 4(RD) | 2815 | | lwz CARG3, 4(RD) |
2816 | | cror 4*cr7+gt, 4*cr0+gt, 4*cr1+gt | 2816 | | cror 4*cr7+gt, 4*cr0+gt, 4*cr1+gt |
2817 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | 2817 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) |
2818 | if (vk) { | 2818 | if (vk) { |
2819 | | ble cr7, ->BC_ISEQN_Z | 2819 | | ble cr7, ->BC_ISEQN_Z |
2820 | } else { | ||
2821 | | ble cr7, ->BC_ISNEN_Z | ||
2822 | } | ||
2823 | } else { | 2820 | } else { |
2824 | | lwzux TMP0, RA, BASE | 2821 | | ble cr7, ->BC_ISNEN_Z |
2825 | | lwz TMP2, 0(PC) | ||
2826 | | lfd f0, 0(RA) | ||
2827 | | addi PC, PC, 4 | ||
2828 | | lwzux TMP1, RD, BASE | ||
2829 | | checknum cr0, TMP0 | ||
2830 | | decode_RD4 TMP2, TMP2 | ||
2831 | | lfd f1, 0(RD) | ||
2832 | | checknum cr1, TMP1 | ||
2833 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | ||
2834 | | bge cr0, >5 | ||
2835 | | bge cr1, >5 | ||
2836 | | fcmpu cr0, f0, f1 | ||
2837 | if (vk) { | ||
2838 | | bne >1 | ||
2839 | | add PC, PC, TMP2 | ||
2840 | } else { | ||
2841 | | beq >1 | ||
2842 | | add PC, PC, TMP2 | ||
2843 | } | ||
2844 | |1: | ||
2845 | | ins_next | ||
2846 | } | ||
2847 | |5: // Either or both types are not numbers. | ||
2848 | if (!LJ_DUALNUM) { | ||
2849 | | lwz CARG2, 4(RA) | ||
2850 | | lwz CARG3, 4(RD) | ||
2851 | } | 2822 | } |
2852 | if (LJ_HASFFI) { | 2823 | |.else |
2853 | | cmpwi cr7, TMP0, LJ_TCDATA | 2824 | | lwzux TMP0, RA, BASE |
2854 | | cmpwi cr5, TMP1, LJ_TCDATA | 2825 | | lwz TMP2, 0(PC) |
2826 | | lfd f0, 0(RA) | ||
2827 | | addi PC, PC, 4 | ||
2828 | | lwzux TMP1, RD, BASE | ||
2829 | | checknum cr0, TMP0 | ||
2830 | | decode_RD4 TMP2, TMP2 | ||
2831 | | lfd f1, 0(RD) | ||
2832 | | checknum cr1, TMP1 | ||
2833 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | ||
2834 | | bge cr0, >5 | ||
2835 | | bge cr1, >5 | ||
2836 | | fcmpu cr0, f0, f1 | ||
2837 | if (vk) { | ||
2838 | | bne >1 | ||
2839 | | add PC, PC, TMP2 | ||
2840 | } else { | ||
2841 | | beq >1 | ||
2842 | | add PC, PC, TMP2 | ||
2855 | } | 2843 | } |
2844 | |1: | ||
2845 | | ins_next | ||
2846 | |.endif | ||
2847 | |5: // Either or both types are not numbers. | ||
2848 | |.if not DUALNUM | ||
2849 | | lwz CARG2, 4(RA) | ||
2850 | | lwz CARG3, 4(RD) | ||
2851 | |.endif | ||
2852 | |.if FFI | ||
2853 | | cmpwi cr7, TMP0, LJ_TCDATA | ||
2854 | | cmpwi cr5, TMP1, LJ_TCDATA | ||
2855 | |.endif | ||
2856 | | not TMP3, TMP0 | 2856 | | not TMP3, TMP0 |
2857 | | cmplw TMP0, TMP1 | 2857 | | cmplw TMP0, TMP1 |
2858 | | cmplwi cr1, TMP3, ~LJ_TISPRI // Primitive? | 2858 | | cmplwi cr1, TMP3, ~LJ_TISPRI // Primitive? |
2859 | if (LJ_HASFFI) { | 2859 | |.if FFI |
2860 | | cror 4*cr7+eq, 4*cr7+eq, 4*cr5+eq | 2860 | | cror 4*cr7+eq, 4*cr7+eq, 4*cr5+eq |
2861 | } | 2861 | |.endif |
2862 | | cmplwi cr6, TMP3, ~LJ_TISTABUD // Table or userdata? | 2862 | | cmplwi cr6, TMP3, ~LJ_TISTABUD // Table or userdata? |
2863 | if (LJ_HASFFI) { | 2863 | |.if FFI |
2864 | | beq cr7, ->vmeta_equal_cd | 2864 | | beq cr7, ->vmeta_equal_cd |
2865 | } | 2865 | |.endif |
2866 | | cmplw cr5, CARG2, CARG3 | 2866 | | cmplw cr5, CARG2, CARG3 |
2867 | | crandc 4*cr0+gt, 4*cr0+eq, 4*cr1+gt // 2: Same type and primitive. | 2867 | | crandc 4*cr0+gt, 4*cr0+eq, 4*cr1+gt // 2: Same type and primitive. |
2868 | | crorc 4*cr0+lt, 4*cr5+eq, 4*cr0+eq // 1: Same tv or different type. | 2868 | | crorc 4*cr0+lt, 4*cr5+eq, 4*cr0+eq // 1: Same tv or different type. |
@@ -2879,14 +2879,14 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2879 | | add PC, PC, TMP2 | 2879 | | add PC, PC, TMP2 |
2880 | |6: | 2880 | |6: |
2881 | } | 2881 | } |
2882 | if (LJ_DUALNUM) { | 2882 | |.if DUALNUM |
2883 | | bge cr0, >2 // Done if 1 or 2. | 2883 | | bge cr0, >2 // Done if 1 or 2. |
2884 | |1: | 2884 | |1: |
2885 | | ins_next | 2885 | | ins_next |
2886 | |2: | 2886 | |2: |
2887 | } else { | 2887 | |.else |
2888 | | blt cr0, <1 // Done if 1 or 2. | 2888 | | blt cr0, <1 // Done if 1 or 2. |
2889 | } | 2889 | |.endif |
2890 | | blt cr6, <1 // Done if not tab/ud. | 2890 | | blt cr6, <1 // Done if not tab/ud. |
2891 | | | 2891 | | |
2892 | | // Different tables or userdatas. Need to check __eq metamethod. | 2892 | | // Different tables or userdatas. Need to check __eq metamethod. |
@@ -2911,14 +2911,14 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2911 | | lwz TMP2, 0(PC) | 2911 | | lwz TMP2, 0(PC) |
2912 | | subfic RD, RD, -4 | 2912 | | subfic RD, RD, -4 |
2913 | | addi PC, PC, 4 | 2913 | | addi PC, PC, 4 |
2914 | if (LJ_HASFFI) { | 2914 | |.if FFI |
2915 | | cmpwi TMP0, LJ_TCDATA | 2915 | | cmpwi TMP0, LJ_TCDATA |
2916 | } | 2916 | |.endif |
2917 | | lwzx STR:TMP1, KBASE, RD // KBASE-4-str_const*4 | 2917 | | lwzx STR:TMP1, KBASE, RD // KBASE-4-str_const*4 |
2918 | | subfic TMP0, TMP0, LJ_TSTR | 2918 | | subfic TMP0, TMP0, LJ_TSTR |
2919 | if (LJ_HASFFI) { | 2919 | |.if FFI |
2920 | | beq ->vmeta_equal_cd | 2920 | | beq ->vmeta_equal_cd |
2921 | } | 2921 | |.endif |
2922 | | sub TMP1, STR:TMP1, STR:TMP3 | 2922 | | sub TMP1, STR:TMP1, STR:TMP3 |
2923 | | or TMP0, TMP0, TMP1 | 2923 | | or TMP0, TMP0, TMP1 |
2924 | | decode_RD4 TMP2, TMP2 | 2924 | | decode_RD4 TMP2, TMP2 |
@@ -2937,84 +2937,84 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
2937 | case BC_ISEQN: case BC_ISNEN: | 2937 | case BC_ISEQN: case BC_ISNEN: |
2938 | vk = op == BC_ISEQN; | 2938 | vk = op == BC_ISEQN; |
2939 | | // RA = src*8, RD = num_const*8, JMP with RD = target | 2939 | | // RA = src*8, RD = num_const*8, JMP with RD = target |
2940 | if (LJ_DUALNUM) { | 2940 | |.if DUALNUM |
2941 | | lwzux TMP0, RA, BASE | 2941 | | lwzux TMP0, RA, BASE |
2942 | | addi PC, PC, 4 | 2942 | | addi PC, PC, 4 |
2943 | | lwz CARG2, 4(RA) | 2943 | | lwz CARG2, 4(RA) |
2944 | | lwzux TMP1, RD, KBASE | 2944 | | lwzux TMP1, RD, KBASE |
2945 | | checknum cr0, TMP0 | 2945 | | checknum cr0, TMP0 |
2946 | | lwz TMP2, -4(PC) | 2946 | | lwz TMP2, -4(PC) |
2947 | | checknum cr1, TMP1 | 2947 | | checknum cr1, TMP1 |
2948 | | decode_RD4 TMP2, TMP2 | 2948 | | decode_RD4 TMP2, TMP2 |
2949 | | lwz CARG3, 4(RD) | 2949 | | lwz CARG3, 4(RD) |
2950 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | 2950 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) |
2951 | if (vk) { | 2951 | if (vk) { |
2952 | |->BC_ISEQN_Z: | 2952 | |->BC_ISEQN_Z: |
2953 | } else { | ||
2954 | |->BC_ISNEN_Z: | ||
2955 | } | ||
2956 | | bne cr0, >7 | ||
2957 | | bne cr1, >8 | ||
2958 | | cmpw CARG2, CARG3 | ||
2959 | |4: | ||
2960 | } else { | 2953 | } else { |
2961 | if (vk) { | 2954 | |->BC_ISNEN_Z: |
2962 | |->BC_ISEQN_Z: // Dummy label. | ||
2963 | } else { | ||
2964 | |->BC_ISNEN_Z: // Dummy label. | ||
2965 | } | ||
2966 | | lwzx TMP0, BASE, RA | ||
2967 | | addi PC, PC, 4 | ||
2968 | | lfdx f0, BASE, RA | ||
2969 | | lwz TMP2, -4(PC) | ||
2970 | | lfdx f1, KBASE, RD | ||
2971 | | decode_RD4 TMP2, TMP2 | ||
2972 | | checknum TMP0 | ||
2973 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | ||
2974 | | bge >3 | ||
2975 | | fcmpu cr0, f0, f1 | ||
2976 | } | 2955 | } |
2956 | | bne cr0, >7 | ||
2957 | | bne cr1, >8 | ||
2958 | | cmpw CARG2, CARG3 | ||
2959 | |4: | ||
2960 | |.else | ||
2961 | if (vk) { | ||
2962 | |->BC_ISEQN_Z: // Dummy label. | ||
2963 | } else { | ||
2964 | |->BC_ISNEN_Z: // Dummy label. | ||
2965 | } | ||
2966 | | lwzx TMP0, BASE, RA | ||
2967 | | addi PC, PC, 4 | ||
2968 | | lfdx f0, BASE, RA | ||
2969 | | lwz TMP2, -4(PC) | ||
2970 | | lfdx f1, KBASE, RD | ||
2971 | | decode_RD4 TMP2, TMP2 | ||
2972 | | checknum TMP0 | ||
2973 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | ||
2974 | | bge >3 | ||
2975 | | fcmpu cr0, f0, f1 | ||
2976 | |.endif | ||
2977 | if (vk) { | 2977 | if (vk) { |
2978 | | bne >1 | 2978 | | bne >1 |
2979 | | add PC, PC, TMP2 | 2979 | | add PC, PC, TMP2 |
2980 | |1: | 2980 | |1: |
2981 | if (!LJ_HASFFI) { | 2981 | |.if not FFI |
2982 | |3: | 2982 | |3: |
2983 | } | 2983 | |.endif |
2984 | } else { | 2984 | } else { |
2985 | | beq >2 | 2985 | | beq >2 |
2986 | |1: | 2986 | |1: |
2987 | if (!LJ_HASFFI) { | 2987 | |.if not FFI |
2988 | |3: | 2988 | |3: |
2989 | } | 2989 | |.endif |
2990 | | add PC, PC, TMP2 | 2990 | | add PC, PC, TMP2 |
2991 | |2: | 2991 | |2: |
2992 | } | 2992 | } |
2993 | | ins_next | 2993 | | ins_next |
2994 | if (LJ_HASFFI) { | 2994 | |.if FFI |
2995 | |3: | 2995 | |3: |
2996 | | cmpwi TMP0, LJ_TCDATA | 2996 | | cmpwi TMP0, LJ_TCDATA |
2997 | | beq ->vmeta_equal_cd | 2997 | | beq ->vmeta_equal_cd |
2998 | | b <1 | 2998 | | b <1 |
2999 | } | 2999 | |.endif |
3000 | if (LJ_DUALNUM) { | 3000 | |.if DUALNUM |
3001 | |7: // RA is not an integer. | 3001 | |7: // RA is not an integer. |
3002 | | bge cr0, <3 | 3002 | | bge cr0, <3 |
3003 | | // RA is a number. | 3003 | | // RA is a number. |
3004 | | lfd f0, 0(RA) | 3004 | | lfd f0, 0(RA) |
3005 | | blt cr1, >1 | 3005 | | blt cr1, >1 |
3006 | | // RA is a number, RD is an integer. | 3006 | | // RA is a number, RD is an integer. |
3007 | | tonum_i f1, CARG3 | 3007 | | tonum_i f1, CARG3 |
3008 | | b >2 | 3008 | | b >2 |
3009 | | | 3009 | | |
3010 | |8: // RA is an integer, RD is a number. | 3010 | |8: // RA is an integer, RD is a number. |
3011 | | tonum_i f0, CARG2 | 3011 | | tonum_i f0, CARG2 |
3012 | |1: | 3012 | |1: |
3013 | | lfd f1, 0(RD) | 3013 | | lfd f1, 0(RD) |
3014 | |2: | 3014 | |2: |
3015 | | fcmpu cr0, f0, f1 | 3015 | | fcmpu cr0, f0, f1 |
3016 | | b <4 | 3016 | | b <4 |
3017 | } | 3017 | |.endif |
3018 | break; | 3018 | break; |
3019 | 3019 | ||
3020 | case BC_ISEQP: case BC_ISNEP: | 3020 | case BC_ISEQP: case BC_ISNEP: |
@@ -3025,13 +3025,13 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3025 | | lwz TMP2, 0(PC) | 3025 | | lwz TMP2, 0(PC) |
3026 | | not TMP1, TMP1 | 3026 | | not TMP1, TMP1 |
3027 | | addi PC, PC, 4 | 3027 | | addi PC, PC, 4 |
3028 | if (LJ_HASFFI) { | 3028 | |.if FFI |
3029 | | cmpwi TMP0, LJ_TCDATA | 3029 | | cmpwi TMP0, LJ_TCDATA |
3030 | } | 3030 | |.endif |
3031 | | sub TMP0, TMP0, TMP1 | 3031 | | sub TMP0, TMP0, TMP1 |
3032 | if (LJ_HASFFI) { | 3032 | |.if FFI |
3033 | | beq ->vmeta_equal_cd | 3033 | | beq ->vmeta_equal_cd |
3034 | } | 3034 | |.endif |
3035 | | decode_RD4 TMP2, TMP2 | 3035 | | decode_RD4 TMP2, TMP2 |
3036 | | addic TMP0, TMP0, -1 | 3036 | | addic TMP0, TMP0, -1 |
3037 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) | 3037 | | addis TMP2, TMP2, -(BCBIAS_J*4 >> 16) |
@@ -3104,22 +3104,22 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3104 | | lwzux TMP1, RD, BASE | 3104 | | lwzux TMP1, RD, BASE |
3105 | | lwz TMP0, 4(RD) | 3105 | | lwz TMP0, 4(RD) |
3106 | | checknum TMP1 | 3106 | | checknum TMP1 |
3107 | if (LJ_DUALNUM) { | 3107 | |.if DUALNUM |
3108 | | bne >5 | 3108 | | bne >5 |
3109 | | nego. TMP0, TMP0 | 3109 | | nego. TMP0, TMP0 |
3110 | | bso >4 | 3110 | | bso >4 |
3111 | |1: | 3111 | |1: |
3112 | | ins_next1 | 3112 | | ins_next1 |
3113 | | stwux TISNUM, RA, BASE | 3113 | | stwux TISNUM, RA, BASE |
3114 | | stw TMP0, 4(RA) | 3114 | | stw TMP0, 4(RA) |
3115 | |3: | 3115 | |3: |
3116 | | ins_next2 | 3116 | | ins_next2 |
3117 | |4: // Potential overflow. | 3117 | |4: // Potential overflow. |
3118 | | mcrxr cr0; bley <1 // Ignore unrelated overflow. | 3118 | | mcrxr cr0; bley <1 // Ignore unrelated overflow. |
3119 | | lus TMP1, 0x41e0 // 2^31. | 3119 | | lus TMP1, 0x41e0 // 2^31. |
3120 | | li TMP0, 0 | 3120 | | li TMP0, 0 |
3121 | | b >7 | 3121 | | b >7 |
3122 | } | 3122 | |.endif |
3123 | |5: | 3123 | |5: |
3124 | | bge ->vmeta_unm | 3124 | | bge ->vmeta_unm |
3125 | | xoris TMP1, TMP1, 0x8000 | 3125 | | xoris TMP1, TMP1, 0x8000 |
@@ -3127,11 +3127,11 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3127 | | ins_next1 | 3127 | | ins_next1 |
3128 | | stwux TMP1, RA, BASE | 3128 | | stwux TMP1, RA, BASE |
3129 | | stw TMP0, 4(RA) | 3129 | | stw TMP0, 4(RA) |
3130 | if (LJ_DUALNUM) { | 3130 | |.if DUALNUM |
3131 | | b <3 | 3131 | | b <3 |
3132 | } else { | 3132 | |.else |
3133 | | ins_next2 | 3133 | | ins_next2 |
3134 | } | 3134 | |.endif |
3135 | break; | 3135 | break; |
3136 | case BC_LEN: | 3136 | case BC_LEN: |
3137 | | // RA = dst*8, RD = src*8 | 3137 | | // RA = dst*8, RD = src*8 |
@@ -3140,15 +3140,15 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3140 | | checkstr TMP0; bne >2 | 3140 | | checkstr TMP0; bne >2 |
3141 | | lwz CRET1, STR:CARG1->len | 3141 | | lwz CRET1, STR:CARG1->len |
3142 | |1: | 3142 | |1: |
3143 | if (LJ_DUALNUM) { | 3143 | |.if DUALNUM |
3144 | | ins_next1 | 3144 | | ins_next1 |
3145 | | stwux TISNUM, RA, BASE | 3145 | | stwux TISNUM, RA, BASE |
3146 | | stw CRET1, 4(RA) | 3146 | | stw CRET1, 4(RA) |
3147 | } else { | 3147 | |.else |
3148 | | tonum_u f0, CRET1 // Result is a non-negative integer. | 3148 | | tonum_u f0, CRET1 // Result is a non-negative integer. |
3149 | | ins_next1 | 3149 | | ins_next1 |
3150 | | stfdx f0, BASE, RA | 3150 | | stfdx f0, BASE, RA |
3151 | } | 3151 | |.endif |
3152 | | ins_next2 | 3152 | | ins_next2 |
3153 | |2: | 3153 | |2: |
3154 | | checktab TMP0; bne ->vmeta_len | 3154 | | checktab TMP0; bne ->vmeta_len |
@@ -3179,35 +3179,35 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3179 | ||switch (vk) { | 3179 | ||switch (vk) { |
3180 | ||case 0: | 3180 | ||case 0: |
3181 | | lwzx TMP1, BASE, RB | 3181 | | lwzx TMP1, BASE, RB |
3182 | ||if (LJ_DUALNUM) { | 3182 | | .if DUALNUM |
3183 | | lwzx TMP2, KBASE, RC | 3183 | | lwzx TMP2, KBASE, RC |
3184 | ||} | 3184 | | .endif |
3185 | | lfdx f14, BASE, RB | 3185 | | lfdx f14, BASE, RB |
3186 | | lfdx f15, KBASE, RC | 3186 | | lfdx f15, KBASE, RC |
3187 | ||if (LJ_DUALNUM) { | 3187 | | .if DUALNUM |
3188 | | checknum cr0, TMP1 | 3188 | | checknum cr0, TMP1 |
3189 | | checknum cr1, TMP2 | 3189 | | checknum cr1, TMP2 |
3190 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr1+lt | 3190 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr1+lt |
3191 | | bge ->vmeta_arith_vn | 3191 | | bge ->vmeta_arith_vn |
3192 | ||} else { | 3192 | | .else |
3193 | | checknum TMP1; bge ->vmeta_arith_vn | 3193 | | checknum TMP1; bge ->vmeta_arith_vn |
3194 | ||} | 3194 | | .endif |
3195 | || break; | 3195 | || break; |
3196 | ||case 1: | 3196 | ||case 1: |
3197 | | lwzx TMP1, BASE, RB | 3197 | | lwzx TMP1, BASE, RB |
3198 | ||if (LJ_DUALNUM) { | 3198 | | .if DUALNUM |
3199 | | lwzx TMP2, KBASE, RC | 3199 | | lwzx TMP2, KBASE, RC |
3200 | ||} | 3200 | | .endif |
3201 | | lfdx f15, BASE, RB | 3201 | | lfdx f15, BASE, RB |
3202 | | lfdx f14, KBASE, RC | 3202 | | lfdx f14, KBASE, RC |
3203 | ||if (LJ_DUALNUM) { | 3203 | | .if DUALNUM |
3204 | | checknum cr0, TMP1 | 3204 | | checknum cr0, TMP1 |
3205 | | checknum cr1, TMP2 | 3205 | | checknum cr1, TMP2 |
3206 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr1+lt | 3206 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr1+lt |
3207 | | bge ->vmeta_arith_nv | 3207 | | bge ->vmeta_arith_nv |
3208 | ||} else { | 3208 | | .else |
3209 | | checknum TMP1; bge ->vmeta_arith_nv | 3209 | | checknum TMP1; bge ->vmeta_arith_nv |
3210 | ||} | 3210 | | .endif |
3211 | || break; | 3211 | || break; |
3212 | ||default: | 3212 | ||default: |
3213 | | lwzx TMP1, BASE, RB | 3213 | | lwzx TMP1, BASE, RB |
@@ -3323,11 +3323,11 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3323 | |.endmacro | 3323 | |.endmacro |
3324 | | | 3324 | | |
3325 | |.macro ins_arith, intins, fpins | 3325 | |.macro ins_arith, intins, fpins |
3326 | ||if (LJ_DUALNUM) { | 3326 | |.if DUALNUM |
3327 | | ins_arithdn intins, fpins | 3327 | | ins_arithdn intins, fpins |
3328 | ||} else { | 3328 | |.else |
3329 | | ins_arithfp fpins | 3329 | | ins_arithfp fpins |
3330 | ||} | 3330 | |.endif |
3331 | |.endmacro | 3331 | |.endmacro |
3332 | 3332 | ||
3333 | case BC_ADDVN: case BC_ADDNV: case BC_ADDVV: | 3333 | case BC_ADDVN: case BC_ADDNV: case BC_ADDVV: |
@@ -3399,7 +3399,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3399 | | ins_next2 | 3399 | | ins_next2 |
3400 | break; | 3400 | break; |
3401 | case BC_KCDATA: | 3401 | case BC_KCDATA: |
3402 | #if LJ_HASFFI | 3402 | |.if FFI |
3403 | | // RA = dst*8, RD = cdata_const*8 (~) | 3403 | | // RA = dst*8, RD = cdata_const*8 (~) |
3404 | | srwi TMP1, RD, 1 | 3404 | | srwi TMP1, RD, 1 |
3405 | | subfic TMP1, TMP1, -4 | 3405 | | subfic TMP1, TMP1, -4 |
@@ -3409,37 +3409,37 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3409 | | stwux TMP2, RA, BASE | 3409 | | stwux TMP2, RA, BASE |
3410 | | stw TMP0, 4(RA) | 3410 | | stw TMP0, 4(RA) |
3411 | | ins_next2 | 3411 | | ins_next2 |
3412 | #endif | 3412 | |.endif |
3413 | break; | 3413 | break; |
3414 | case BC_KSHORT: | 3414 | case BC_KSHORT: |
3415 | | // RA = dst*8, RD = int16_literal*8 | 3415 | | // RA = dst*8, RD = int16_literal*8 |
3416 | if (LJ_DUALNUM) { | 3416 | |.if DUALNUM |
3417 | | slwi RD, RD, 13 | 3417 | | slwi RD, RD, 13 |
3418 | | srawi RD, RD, 16 | 3418 | | srawi RD, RD, 16 |
3419 | | ins_next1 | 3419 | | ins_next1 |
3420 | | stwux TISNUM, RA, BASE | 3420 | | stwux TISNUM, RA, BASE |
3421 | | stw RD, 4(RA) | 3421 | | stw RD, 4(RA) |
3422 | | ins_next2 | 3422 | | ins_next2 |
3423 | } else { | 3423 | |.else |
3424 | | // The soft-float approach is faster. | 3424 | | // The soft-float approach is faster. |
3425 | | slwi RD, RD, 13 | 3425 | | slwi RD, RD, 13 |
3426 | | srawi TMP1, RD, 31 | 3426 | | srawi TMP1, RD, 31 |
3427 | | xor TMP2, TMP1, RD | 3427 | | xor TMP2, TMP1, RD |
3428 | | sub TMP2, TMP2, TMP1 // TMP2 = abs(x) | 3428 | | sub TMP2, TMP2, TMP1 // TMP2 = abs(x) |
3429 | | cntlzw TMP3, TMP2 | 3429 | | cntlzw TMP3, TMP2 |
3430 | | subfic TMP1, TMP3, 0x40d // TMP1 = exponent-1 | 3430 | | subfic TMP1, TMP3, 0x40d // TMP1 = exponent-1 |
3431 | | slw TMP2, TMP2, TMP3 // TMP2 = left aligned mantissa | 3431 | | slw TMP2, TMP2, TMP3 // TMP2 = left aligned mantissa |
3432 | | subfic TMP3, RD, 0 | 3432 | | subfic TMP3, RD, 0 |
3433 | | slwi TMP1, TMP1, 20 | 3433 | | slwi TMP1, TMP1, 20 |
3434 | | rlwimi RD, TMP2, 21, 1, 31 // hi = sign(x) | (mantissa>>11) | 3434 | | rlwimi RD, TMP2, 21, 1, 31 // hi = sign(x) | (mantissa>>11) |
3435 | | subfe TMP0, TMP0, TMP0 | 3435 | | subfe TMP0, TMP0, TMP0 |
3436 | | add RD, RD, TMP1 // hi = hi + exponent-1 | 3436 | | add RD, RD, TMP1 // hi = hi + exponent-1 |
3437 | | and RD, RD, TMP0 // hi = x == 0 ? 0 : hi | 3437 | | and RD, RD, TMP0 // hi = x == 0 ? 0 : hi |
3438 | | ins_next1 | 3438 | | ins_next1 |
3439 | | stwux RD, RA, BASE | 3439 | | stwux RD, RA, BASE |
3440 | | stw ZERO, 4(RA) | 3440 | | stw ZERO, 4(RA) |
3441 | | ins_next2 | 3441 | | ins_next2 |
3442 | } | 3442 | |.endif |
3443 | break; | 3443 | break; |
3444 | case BC_KNUM: | 3444 | case BC_KNUM: |
3445 | | // RA = dst*8, RD = num_const*8 | 3445 | | // RA = dst*8, RD = num_const*8 |
@@ -3671,35 +3671,35 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3671 | | lwzux CARG1, RB, BASE | 3671 | | lwzux CARG1, RB, BASE |
3672 | | lwzux CARG2, RC, BASE | 3672 | | lwzux CARG2, RC, BASE |
3673 | | lwz TAB:RB, 4(RB) | 3673 | | lwz TAB:RB, 4(RB) |
3674 | if (LJ_DUALNUM) { | 3674 | |.if DUALNUM |
3675 | | lwz RC, 4(RC) | 3675 | | lwz RC, 4(RC) |
3676 | } else { | 3676 | |.else |
3677 | | lfd f0, 0(RC) | 3677 | | lfd f0, 0(RC) |
3678 | } | 3678 | |.endif |
3679 | | checktab CARG1 | 3679 | | checktab CARG1 |
3680 | | checknum cr1, CARG2 | 3680 | | checknum cr1, CARG2 |
3681 | | bne ->vmeta_tgetv | 3681 | | bne ->vmeta_tgetv |
3682 | if (LJ_DUALNUM) { | 3682 | |.if DUALNUM |
3683 | | lwz TMP0, TAB:RB->asize | 3683 | | lwz TMP0, TAB:RB->asize |
3684 | | bne cr1, >5 | 3684 | | bne cr1, >5 |
3685 | | lwz TMP1, TAB:RB->array | 3685 | | lwz TMP1, TAB:RB->array |
3686 | | cmplw TMP0, RC | 3686 | | cmplw TMP0, RC |
3687 | | slwi TMP2, RC, 3 | 3687 | | slwi TMP2, RC, 3 |
3688 | } else { | 3688 | |.else |
3689 | | bge cr1, >5 | 3689 | | bge cr1, >5 |
3690 | | // Convert number key to integer, check for integerness and range. | 3690 | | // Convert number key to integer, check for integerness and range. |
3691 | | fctiwz f1, f0 | 3691 | | fctiwz f1, f0 |
3692 | | fadd f2, f0, TOBIT | 3692 | | fadd f2, f0, TOBIT |
3693 | | stfd f1, TMPD | 3693 | | stfd f1, TMPD |
3694 | | lwz TMP0, TAB:RB->asize | 3694 | | lwz TMP0, TAB:RB->asize |
3695 | | fsub f2, f2, TOBIT | 3695 | | fsub f2, f2, TOBIT |
3696 | | lwz TMP2, TMPD_LO | 3696 | | lwz TMP2, TMPD_LO |
3697 | | lwz TMP1, TAB:RB->array | 3697 | | lwz TMP1, TAB:RB->array |
3698 | | fcmpu cr1, f0, f2 | 3698 | | fcmpu cr1, f0, f2 |
3699 | | cmplw cr0, TMP0, TMP2 | 3699 | | cmplw cr0, TMP0, TMP2 |
3700 | | crand 4*cr0+gt, 4*cr0+gt, 4*cr1+eq | 3700 | | crand 4*cr0+gt, 4*cr0+gt, 4*cr1+eq |
3701 | | slwi TMP2, TMP2, 3 | 3701 | | slwi TMP2, TMP2, 3 |
3702 | } | 3702 | |.endif |
3703 | | ble ->vmeta_tgetv // Integer key and in array part? | 3703 | | ble ->vmeta_tgetv // Integer key and in array part? |
3704 | | lwzx TMP0, TMP1, TMP2 | 3704 | | lwzx TMP0, TMP1, TMP2 |
3705 | | lfdx f14, TMP1, TMP2 | 3705 | | lfdx f14, TMP1, TMP2 |
@@ -3720,9 +3720,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3720 | | | 3720 | | |
3721 | |5: | 3721 | |5: |
3722 | | checkstr CARG2; bne ->vmeta_tgetv | 3722 | | checkstr CARG2; bne ->vmeta_tgetv |
3723 | if (!LJ_DUALNUM) { | 3723 | |.if not DUALNUM |
3724 | | lwz STR:RC, 4(RC) | 3724 | | lwz STR:RC, 4(RC) |
3725 | } | 3725 | |.endif |
3726 | | b ->BC_TGETS_Z // String key? | 3726 | | b ->BC_TGETS_Z // String key? |
3727 | break; | 3727 | break; |
3728 | case BC_TGETS: | 3728 | case BC_TGETS: |
@@ -3805,35 +3805,35 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3805 | | lwzux CARG1, RB, BASE | 3805 | | lwzux CARG1, RB, BASE |
3806 | | lwzux CARG2, RC, BASE | 3806 | | lwzux CARG2, RC, BASE |
3807 | | lwz TAB:RB, 4(RB) | 3807 | | lwz TAB:RB, 4(RB) |
3808 | if (LJ_DUALNUM) { | 3808 | |.if DUALNUM |
3809 | | lwz RC, 4(RC) | 3809 | | lwz RC, 4(RC) |
3810 | } else { | 3810 | |.else |
3811 | | lfd f0, 0(RC) | 3811 | | lfd f0, 0(RC) |
3812 | } | 3812 | |.endif |
3813 | | checktab CARG1 | 3813 | | checktab CARG1 |
3814 | | checknum cr1, CARG2 | 3814 | | checknum cr1, CARG2 |
3815 | | bne ->vmeta_tsetv | 3815 | | bne ->vmeta_tsetv |
3816 | if (LJ_DUALNUM) { | 3816 | |.if DUALNUM |
3817 | | lwz TMP0, TAB:RB->asize | 3817 | | lwz TMP0, TAB:RB->asize |
3818 | | bne cr1, >5 | 3818 | | bne cr1, >5 |
3819 | | lwz TMP1, TAB:RB->array | 3819 | | lwz TMP1, TAB:RB->array |
3820 | | cmplw TMP0, RC | 3820 | | cmplw TMP0, RC |
3821 | | slwi TMP0, RC, 3 | 3821 | | slwi TMP0, RC, 3 |
3822 | } else { | 3822 | |.else |
3823 | | bge cr1, >5 | 3823 | | bge cr1, >5 |
3824 | | // Convert number key to integer, check for integerness and range. | 3824 | | // Convert number key to integer, check for integerness and range. |
3825 | | fctiwz f1, f0 | 3825 | | fctiwz f1, f0 |
3826 | | fadd f2, f0, TOBIT | 3826 | | fadd f2, f0, TOBIT |
3827 | | stfd f1, TMPD | 3827 | | stfd f1, TMPD |
3828 | | lwz TMP0, TAB:RB->asize | 3828 | | lwz TMP0, TAB:RB->asize |
3829 | | fsub f2, f2, TOBIT | 3829 | | fsub f2, f2, TOBIT |
3830 | | lwz TMP2, TMPD_LO | 3830 | | lwz TMP2, TMPD_LO |
3831 | | lwz TMP1, TAB:RB->array | 3831 | | lwz TMP1, TAB:RB->array |
3832 | | fcmpu cr1, f0, f2 | 3832 | | fcmpu cr1, f0, f2 |
3833 | | cmplw cr0, TMP0, TMP2 | 3833 | | cmplw cr0, TMP0, TMP2 |
3834 | | crand 4*cr0+gt, 4*cr0+gt, 4*cr1+eq | 3834 | | crand 4*cr0+gt, 4*cr0+gt, 4*cr1+eq |
3835 | | slwi TMP0, TMP2, 3 | 3835 | | slwi TMP0, TMP2, 3 |
3836 | } | 3836 | |.endif |
3837 | | ble ->vmeta_tsetv // Integer key and in array part? | 3837 | | ble ->vmeta_tsetv // Integer key and in array part? |
3838 | | lwzx TMP2, TMP1, TMP0 | 3838 | | lwzx TMP2, TMP1, TMP0 |
3839 | | lbz TMP3, TAB:RB->marked | 3839 | | lbz TMP3, TAB:RB->marked |
@@ -3857,9 +3857,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
3857 | | | 3857 | | |
3858 | |5: | 3858 | |5: |
3859 | | checkstr CARG2; bne ->vmeta_tsetv | 3859 | | checkstr CARG2; bne ->vmeta_tsetv |
3860 | if (!LJ_DUALNUM) { | 3860 | |.if not DUALNUM |
3861 | | lwz STR:RC, 4(RC) | 3861 | | lwz STR:RC, 4(RC) |
3862 | } | 3862 | |.endif |
3863 | | b ->BC_TSETS_Z // String key? | 3863 | | b ->BC_TSETS_Z // String key? |
3864 | | | 3864 | | |
3865 | |7: // Possible table write barrier for the value. Skip valiswhite check. | 3865 | |7: // Possible table write barrier for the value. Skip valiswhite check. |
@@ -4119,9 +4119,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4119 | 4119 | ||
4120 | case BC_ITERN: | 4120 | case BC_ITERN: |
4121 | | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 (2+1)*8) | 4121 | | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 (2+1)*8) |
4122 | #if LJ_HASJIT | 4122 | |.if JIT |
4123 | | // NYI: add hotloop, record BC_ITERN. | 4123 | | // NYI: add hotloop, record BC_ITERN. |
4124 | #endif | 4124 | |.endif |
4125 | | add RA, BASE, RA | 4125 | | add RA, BASE, RA |
4126 | | lwz TAB:RB, -12(RA) | 4126 | | lwz TAB:RB, -12(RA) |
4127 | | lwz RC, -4(RA) // Get index from control var. | 4127 | | lwz RC, -4(RA) // Get index from control var. |
@@ -4137,21 +4137,21 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4137 | | checknil TMP2 | 4137 | | checknil TMP2 |
4138 | | lwz INS, -4(PC) | 4138 | | lwz INS, -4(PC) |
4139 | | beq >4 | 4139 | | beq >4 |
4140 | if (LJ_DUALNUM) { | 4140 | |.if DUALNUM |
4141 | | stw RC, 4(RA) | 4141 | | stw RC, 4(RA) |
4142 | | stw TISNUM, 0(RA) | 4142 | | stw TISNUM, 0(RA) |
4143 | } else { | 4143 | |.else |
4144 | | tonum_u f1, RC | 4144 | | tonum_u f1, RC |
4145 | } | 4145 | |.endif |
4146 | | addi RC, RC, 1 | 4146 | | addi RC, RC, 1 |
4147 | | addis TMP3, PC, -(BCBIAS_J*4 >> 16) | 4147 | | addis TMP3, PC, -(BCBIAS_J*4 >> 16) |
4148 | | stfd f0, 8(RA) | 4148 | | stfd f0, 8(RA) |
4149 | | decode_RD4 TMP1, INS | 4149 | | decode_RD4 TMP1, INS |
4150 | | stw RC, -4(RA) // Update control var. | 4150 | | stw RC, -4(RA) // Update control var. |
4151 | | add PC, TMP1, TMP3 | 4151 | | add PC, TMP1, TMP3 |
4152 | if (!LJ_DUALNUM) { | 4152 | |.if not DUALNUM |
4153 | | stfd f1, 0(RA) | 4153 | | stfd f1, 0(RA) |
4154 | } | 4154 | |.endif |
4155 | |3: | 4155 | |3: |
4156 | | ins_next | 4156 | | ins_next |
4157 | | | 4157 | | |
@@ -4389,9 +4389,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4389 | /* -- Loops and branches ------------------------------------------------ */ | 4389 | /* -- Loops and branches ------------------------------------------------ */ |
4390 | 4390 | ||
4391 | case BC_FORL: | 4391 | case BC_FORL: |
4392 | #if LJ_HASJIT | 4392 | |.if JIT |
4393 | | hotloop | 4393 | | hotloop |
4394 | #endif | 4394 | |.endif |
4395 | | // Fall through. Assumes BC_IFORL follows. | 4395 | | // Fall through. Assumes BC_IFORL follows. |
4396 | break; | 4396 | break; |
4397 | 4397 | ||
@@ -4404,88 +4404,88 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4404 | case BC_IFORL: | 4404 | case BC_IFORL: |
4405 | | // RA = base*8, RD = target (after end of loop or start of loop) | 4405 | | // RA = base*8, RD = target (after end of loop or start of loop) |
4406 | vk = (op == BC_IFORL || op == BC_JFORL); | 4406 | vk = (op == BC_IFORL || op == BC_JFORL); |
4407 | if (LJ_DUALNUM) { | 4407 | |.if DUALNUM |
4408 | | // Integer loop. | 4408 | | // Integer loop. |
4409 | | lwzux TMP1, RA, BASE | 4409 | | lwzux TMP1, RA, BASE |
4410 | | lwz CARG1, FORL_IDX*8+4(RA) | 4410 | | lwz CARG1, FORL_IDX*8+4(RA) |
4411 | | cmplw cr0, TMP1, TISNUM | 4411 | | cmplw cr0, TMP1, TISNUM |
4412 | if (vk) { | 4412 | if (vk) { |
4413 | | lwz CARG3, FORL_STEP*8+4(RA) | 4413 | | lwz CARG3, FORL_STEP*8+4(RA) |
4414 | | bne >9 | 4414 | | bne >9 |
4415 | | addo. CARG1, CARG1, CARG3 | 4415 | | addo. CARG1, CARG1, CARG3 |
4416 | | cmpwi cr6, CARG3, 0 | 4416 | | cmpwi cr6, CARG3, 0 |
4417 | | lwz CARG2, FORL_STOP*8+4(RA) | 4417 | | lwz CARG2, FORL_STOP*8+4(RA) |
4418 | | bso >6 | 4418 | | bso >6 |
4419 | |4: | 4419 | |4: |
4420 | | stw CARG1, FORL_IDX*8+4(RA) | 4420 | | stw CARG1, FORL_IDX*8+4(RA) |
4421 | } else { | 4421 | } else { |
4422 | | lwz TMP3, FORL_STEP*8(RA) | 4422 | | lwz TMP3, FORL_STEP*8(RA) |
4423 | | lwz CARG3, FORL_STEP*8+4(RA) | 4423 | | lwz CARG3, FORL_STEP*8+4(RA) |
4424 | | lwz TMP2, FORL_STOP*8(RA) | 4424 | | lwz TMP2, FORL_STOP*8(RA) |
4425 | | lwz CARG2, FORL_STOP*8+4(RA) | 4425 | | lwz CARG2, FORL_STOP*8+4(RA) |
4426 | | cmplw cr7, TMP3, TISNUM | 4426 | | cmplw cr7, TMP3, TISNUM |
4427 | | cmplw cr1, TMP2, TISNUM | 4427 | | cmplw cr1, TMP2, TISNUM |
4428 | | crand 4*cr0+eq, 4*cr0+eq, 4*cr7+eq | 4428 | | crand 4*cr0+eq, 4*cr0+eq, 4*cr7+eq |
4429 | | crand 4*cr0+eq, 4*cr0+eq, 4*cr1+eq | 4429 | | crand 4*cr0+eq, 4*cr0+eq, 4*cr1+eq |
4430 | | cmpwi cr6, CARG3, 0 | 4430 | | cmpwi cr6, CARG3, 0 |
4431 | | bne >9 | 4431 | | bne >9 |
4432 | } | ||
4433 | | blt cr6, >5 | ||
4434 | | cmpw CARG1, CARG2 | ||
4435 | |1: | ||
4436 | | stw TISNUM, FORL_EXT*8(RA) | ||
4437 | if (op != BC_JFORL) { | ||
4438 | | srwi RD, RD, 1 | ||
4439 | } | ||
4440 | | stw CARG1, FORL_EXT*8+4(RA) | ||
4441 | if (op != BC_JFORL) { | ||
4442 | | add RD, PC, RD | ||
4443 | } | ||
4444 | if (op == BC_FORI) { | ||
4445 | | bgt >3 // See FP loop below. | ||
4446 | } else if (op == BC_JFORI) { | ||
4447 | | addis PC, RD, -(BCBIAS_J*4 >> 16) | ||
4448 | | bley >7 | ||
4449 | } else if (op == BC_IFORL) { | ||
4450 | | bgt >2 | ||
4451 | | addis PC, RD, -(BCBIAS_J*4 >> 16) | ||
4452 | } else { | ||
4453 | | bley =>BC_JLOOP | ||
4454 | } | ||
4455 | |2: | ||
4456 | | ins_next | ||
4457 | |5: // Invert check for negative step. | ||
4458 | | cmpw CARG2, CARG1 | ||
4459 | | b <1 | ||
4460 | if (vk) { | ||
4461 | |6: // Potential overflow. | ||
4462 | | mcrxr cr0; bley <4 // Ignore unrelated overflow. | ||
4463 | | b <2 | ||
4464 | } | ||
4465 | } | 4432 | } |
4433 | | blt cr6, >5 | ||
4434 | | cmpw CARG1, CARG2 | ||
4435 | |1: | ||
4436 | | stw TISNUM, FORL_EXT*8(RA) | ||
4437 | if (op != BC_JFORL) { | ||
4438 | | srwi RD, RD, 1 | ||
4439 | } | ||
4440 | | stw CARG1, FORL_EXT*8+4(RA) | ||
4441 | if (op != BC_JFORL) { | ||
4442 | | add RD, PC, RD | ||
4443 | } | ||
4444 | if (op == BC_FORI) { | ||
4445 | | bgt >3 // See FP loop below. | ||
4446 | } else if (op == BC_JFORI) { | ||
4447 | | addis PC, RD, -(BCBIAS_J*4 >> 16) | ||
4448 | | bley >7 | ||
4449 | } else if (op == BC_IFORL) { | ||
4450 | | bgt >2 | ||
4451 | | addis PC, RD, -(BCBIAS_J*4 >> 16) | ||
4452 | } else { | ||
4453 | | bley =>BC_JLOOP | ||
4454 | } | ||
4455 | |2: | ||
4456 | | ins_next | ||
4457 | |5: // Invert check for negative step. | ||
4458 | | cmpw CARG2, CARG1 | ||
4459 | | b <1 | ||
4466 | if (vk) { | 4460 | if (vk) { |
4467 | if (LJ_DUALNUM) { | 4461 | |6: // Potential overflow. |
4468 | |9: // FP loop. | 4462 | | mcrxr cr0; bley <4 // Ignore unrelated overflow. |
4469 | | lfd f1, FORL_IDX*8(RA) | 4463 | | b <2 |
4470 | } else { | 4464 | } |
4471 | | lfdux f1, RA, BASE | 4465 | |.endif |
4472 | } | 4466 | if (vk) { |
4467 | |.if DUALNUM | ||
4468 | |9: // FP loop. | ||
4469 | | lfd f1, FORL_IDX*8(RA) | ||
4470 | |.else | ||
4471 | | lfdux f1, RA, BASE | ||
4472 | |.endif | ||
4473 | | lfd f3, FORL_STEP*8(RA) | 4473 | | lfd f3, FORL_STEP*8(RA) |
4474 | | lfd f2, FORL_STOP*8(RA) | 4474 | | lfd f2, FORL_STOP*8(RA) |
4475 | | lwz TMP3, FORL_STEP*8(RA) | 4475 | | lwz TMP3, FORL_STEP*8(RA) |
4476 | | fadd f1, f1, f3 | 4476 | | fadd f1, f1, f3 |
4477 | | stfd f1, FORL_IDX*8(RA) | 4477 | | stfd f1, FORL_IDX*8(RA) |
4478 | } else { | 4478 | } else { |
4479 | if (LJ_DUALNUM) { | 4479 | |.if DUALNUM |
4480 | |9: // FP loop. | 4480 | |9: // FP loop. |
4481 | } else { | 4481 | |.else |
4482 | | lwzux TMP1, RA, BASE | 4482 | | lwzux TMP1, RA, BASE |
4483 | | lwz TMP3, FORL_STEP*8(RA) | 4483 | | lwz TMP3, FORL_STEP*8(RA) |
4484 | | lwz TMP2, FORL_STOP*8(RA) | 4484 | | lwz TMP2, FORL_STOP*8(RA) |
4485 | | cmplw cr0, TMP1, TISNUM | 4485 | | cmplw cr0, TMP1, TISNUM |
4486 | | cmplw cr7, TMP3, TISNUM | 4486 | | cmplw cr7, TMP3, TISNUM |
4487 | | cmplw cr1, TMP2, TISNUM | 4487 | | cmplw cr1, TMP2, TISNUM |
4488 | } | 4488 | |.endif |
4489 | | lfd f1, FORL_IDX*8(RA) | 4489 | | lfd f1, FORL_IDX*8(RA) |
4490 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr7+lt | 4490 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr7+lt |
4491 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr1+lt | 4491 | | crand 4*cr0+lt, 4*cr0+lt, 4*cr1+lt |
@@ -4508,11 +4508,11 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4508 | if (op == BC_FORI) { | 4508 | if (op == BC_FORI) { |
4509 | | bgt >3 | 4509 | | bgt >3 |
4510 | } else if (op == BC_IFORL) { | 4510 | } else if (op == BC_IFORL) { |
4511 | if (LJ_DUALNUM) { | 4511 | |.if DUALNUM |
4512 | | bgty <2 | 4512 | | bgty <2 |
4513 | } else { | 4513 | |.else |
4514 | | bgt >2 | 4514 | | bgt >2 |
4515 | } | 4515 | |.endif |
4516 | |1: | 4516 | |1: |
4517 | | addis PC, RD, -(BCBIAS_J*4 >> 16) | 4517 | | addis PC, RD, -(BCBIAS_J*4 >> 16) |
4518 | } else if (op == BC_JFORI) { | 4518 | } else if (op == BC_JFORI) { |
@@ -4520,12 +4520,12 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4520 | } else { | 4520 | } else { |
4521 | | bley =>BC_JLOOP | 4521 | | bley =>BC_JLOOP |
4522 | } | 4522 | } |
4523 | if (LJ_DUALNUM) { | 4523 | |.if DUALNUM |
4524 | | b <2 | 4524 | | b <2 |
4525 | } else { | 4525 | |.else |
4526 | |2: | 4526 | |2: |
4527 | | ins_next | 4527 | | ins_next |
4528 | } | 4528 | |.endif |
4529 | |5: // Negative step. | 4529 | |5: // Negative step. |
4530 | if (op == BC_FORI) { | 4530 | if (op == BC_FORI) { |
4531 | | bge <2 | 4531 | | bge <2 |
@@ -4548,9 +4548,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4548 | break; | 4548 | break; |
4549 | 4549 | ||
4550 | case BC_ITERL: | 4550 | case BC_ITERL: |
4551 | #if LJ_HASJIT | 4551 | |.if JIT |
4552 | | hotloop | 4552 | | hotloop |
4553 | #endif | 4553 | |.endif |
4554 | | // Fall through. Assumes BC_IITERL follows. | 4554 | | // Fall through. Assumes BC_IITERL follows. |
4555 | break; | 4555 | break; |
4556 | 4556 | ||
@@ -4580,9 +4580,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4580 | | // RA = base*8, RD = target (loop extent) | 4580 | | // RA = base*8, RD = target (loop extent) |
4581 | | // Note: RA/RD is only used by trace recorder to determine scope/extent | 4581 | | // Note: RA/RD is only used by trace recorder to determine scope/extent |
4582 | | // This opcode does NOT jump, it's only purpose is to detect a hot loop. | 4582 | | // This opcode does NOT jump, it's only purpose is to detect a hot loop. |
4583 | #if LJ_HASJIT | 4583 | |.if JIT |
4584 | | hotloop | 4584 | | hotloop |
4585 | #endif | 4585 | |.endif |
4586 | | // Fall through. Assumes BC_ILOOP follows. | 4586 | | // Fall through. Assumes BC_ILOOP follows. |
4587 | break; | 4587 | break; |
4588 | 4588 | ||
@@ -4592,7 +4592,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4592 | break; | 4592 | break; |
4593 | 4593 | ||
4594 | case BC_JLOOP: | 4594 | case BC_JLOOP: |
4595 | #if LJ_HASJIT | 4595 | |.if JIT |
4596 | | // RA = base*8 (ignored), RD = traceno*8 | 4596 | | // RA = base*8 (ignored), RD = traceno*8 |
4597 | | lwz TMP1, DISPATCH_J(trace)(DISPATCH) | 4597 | | lwz TMP1, DISPATCH_J(trace)(DISPATCH) |
4598 | | srwi RD, RD, 1 | 4598 | | srwi RD, RD, 1 |
@@ -4606,7 +4606,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4606 | | stw L, DISPATCH_GL(jit_L)(DISPATCH) | 4606 | | stw L, DISPATCH_GL(jit_L)(DISPATCH) |
4607 | | addi JGL, DISPATCH, GG_DISP2G+32768 | 4607 | | addi JGL, DISPATCH, GG_DISP2G+32768 |
4608 | | bctr | 4608 | | bctr |
4609 | #endif | 4609 | |.endif |
4610 | break; | 4610 | break; |
4611 | 4611 | ||
4612 | case BC_JMP: | 4612 | case BC_JMP: |
@@ -4618,9 +4618,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4618 | /* -- Function headers -------------------------------------------------- */ | 4618 | /* -- Function headers -------------------------------------------------- */ |
4619 | 4619 | ||
4620 | case BC_FUNCF: | 4620 | case BC_FUNCF: |
4621 | #if LJ_HASJIT | 4621 | |.if JIT |
4622 | | hotcall | 4622 | | hotcall |
4623 | #endif | 4623 | |.endif |
4624 | case BC_FUNCV: /* NYI: compiled vararg functions. */ | 4624 | case BC_FUNCV: /* NYI: compiled vararg functions. */ |
4625 | | // Fall through. Assumes BC_IFUNCF/BC_IFUNCV follow. | 4625 | | // Fall through. Assumes BC_IFUNCF/BC_IFUNCV follow. |
4626 | break; | 4626 | break; |