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| author | Mike Pall <mike> | 2011-10-13 20:53:01 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2011-10-13 20:53:01 +0200 |
| commit | 882537a8744a75681355fb520923e6e867f99d23 (patch) | |
| tree | 4f73b13fb14f5c9a38534a83c8fcb47bbe442c12 /src | |
| parent | bc95d54ec932fddca832e35344efbecf1344e984 (diff) | |
| download | luajit-882537a8744a75681355fb520923e6e867f99d23.tar.gz luajit-882537a8744a75681355fb520923e6e867f99d23.tar.bz2 luajit-882537a8744a75681355fb520923e6e867f99d23.zip | |
FFI: Fix unfused loads of float fields.
Diffstat (limited to 'src')
| -rw-r--r-- | src/lj_asm_x86.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index 0803ecef..840484d0 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h | |||
| @@ -1147,13 +1147,13 @@ static void asm_strref(ASMState *as, IRIns *ir) | |||
| 1147 | 1147 | ||
| 1148 | static void asm_fxload(ASMState *as, IRIns *ir) | 1148 | static void asm_fxload(ASMState *as, IRIns *ir) |
| 1149 | { | 1149 | { |
| 1150 | Reg dest = ra_dest(as, ir, irt_isnum(ir->t) ? RSET_FPR : RSET_GPR); | 1150 | Reg dest = ra_dest(as, ir, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR); |
| 1151 | x86Op xo; | 1151 | x86Op xo; |
| 1152 | if (ir->o == IR_FLOAD) | 1152 | if (ir->o == IR_FLOAD) |
| 1153 | asm_fusefref(as, ir, RSET_GPR); | 1153 | asm_fusefref(as, ir, RSET_GPR); |
| 1154 | else | 1154 | else |
| 1155 | asm_fusexref(as, ir->op1, RSET_GPR); | 1155 | asm_fusexref(as, ir->op1, RSET_GPR); |
| 1156 | /* ir->op2 is ignored -- unaligned loads are ok on x86. */ | 1156 | /* ir->op2 is ignored -- unaligned loads are ok on x86. */ |
| 1157 | switch (irt_type(ir->t)) { | 1157 | switch (irt_type(ir->t)) { |
| 1158 | case IRT_I8: xo = XO_MOVSXb; break; | 1158 | case IRT_I8: xo = XO_MOVSXb; break; |
| 1159 | case IRT_U8: xo = XO_MOVZXb; break; | 1159 | case IRT_U8: xo = XO_MOVZXb; break; |