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authorMike Pall <mike>2010-10-11 21:13:37 +0200
committerMike Pall <mike>2010-10-11 21:13:37 +0200
commitb3cf2c70f4250c80408399c591743e7b6667b840 (patch)
treef784294c5d13064f2509ea4bf86df506a1eed8d6 /src
parentcc62edebfdf3fa451a745ee2936c8df72c9e7243 (diff)
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Decouple SLOAD type and optional conversion.
Diffstat (limited to 'src')
-rw-r--r--src/lj_asm.c13
-rw-r--r--src/lj_ir.h11
-rw-r--r--src/lj_jit.h2
-rw-r--r--src/lj_record.c20
4 files changed, 25 insertions, 21 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c
index 563abcd4..d2ba4bfc 100644
--- a/src/lj_asm.c
+++ b/src/lj_asm.c
@@ -1290,8 +1290,8 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
1290 } else if (mayfuse(as, ref)) { 1290 } else if (mayfuse(as, ref)) {
1291 RegSet xallow = (allow & RSET_GPR) ? allow : RSET_GPR; 1291 RegSet xallow = (allow & RSET_GPR) ? allow : RSET_GPR;
1292 if (ir->o == IR_SLOAD) { 1292 if (ir->o == IR_SLOAD) {
1293 if ((!irt_isint(ir->t) || (ir->op2 & IRSLOAD_FRAME)) && 1293 if (!(ir->op2 & (IRSLOAD_PARENT|IRSLOAD_CONVERT)) &&
1294 !(ir->op2 & IRSLOAD_PARENT) && noconflict(as, ref, IR_RETF)) { 1294 noconflict(as, ref, IR_RETF)) {
1295 as->mrm.base = (uint8_t)ra_alloc1(as, REF_BASE, xallow); 1295 as->mrm.base = (uint8_t)ra_alloc1(as, REF_BASE, xallow);
1296 as->mrm.ofs = 8*((int32_t)ir->op1-1) + ((ir->op2&IRSLOAD_FRAME)?4:0); 1296 as->mrm.ofs = 8*((int32_t)ir->op1-1) + ((ir->op2&IRSLOAD_FRAME)?4:0);
1297 as->mrm.idx = RID_NONE; 1297 as->mrm.idx = RID_NONE;
@@ -2061,8 +2061,9 @@ static void asm_sload(ASMState *as, IRIns *ir)
2061 IRType1 t = ir->t; 2061 IRType1 t = ir->t;
2062 Reg base; 2062 Reg base;
2063 lua_assert(!(ir->op2 & IRSLOAD_PARENT)); /* Handled by asm_head_side(). */ 2063 lua_assert(!(ir->op2 & IRSLOAD_PARENT)); /* Handled by asm_head_side(). */
2064 lua_assert(irt_isguard(ir->t) || !(ir->op2 & IRSLOAD_TYPECHECK)); 2064 lua_assert(irt_isguard(t) || !(ir->op2 & IRSLOAD_TYPECHECK));
2065 if (irt_isint(t) && irt_isguard(t)) { 2065 lua_assert(!irt_isint(t) || (ir->op2 & (IRSLOAD_CONVERT|IRSLOAD_FRAME)));
2066 if ((ir->op2 & IRSLOAD_CONVERT) && irt_isguard(t)) {
2066 Reg left = ra_scratch(as, RSET_FPR); 2067 Reg left = ra_scratch(as, RSET_FPR);
2067 asm_tointg(as, ir, left); /* Frees dest reg. Do this before base alloc. */ 2068 asm_tointg(as, ir, left); /* Frees dest reg. Do this before base alloc. */
2068 base = ra_alloc1(as, REF_BASE, RSET_GPR); 2069 base = ra_alloc1(as, REF_BASE, RSET_GPR);
@@ -2078,11 +2079,11 @@ static void asm_sload(ASMState *as, IRIns *ir)
2078 return; 2079 return;
2079#endif 2080#endif
2080 } else if (ra_used(ir)) { 2081 } else if (ra_used(ir)) {
2081 RegSet allow = irt_isnum(ir->t) ? RSET_FPR : RSET_GPR; 2082 RegSet allow = irt_isnum(t) ? RSET_FPR : RSET_GPR;
2082 Reg dest = ra_dest(as, ir, allow); 2083 Reg dest = ra_dest(as, ir, allow);
2083 base = ra_alloc1(as, REF_BASE, RSET_GPR); 2084 base = ra_alloc1(as, REF_BASE, RSET_GPR);
2084 lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t)); 2085 lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t));
2085 if (irt_isint(t) && !(ir->op2 & IRSLOAD_FRAME)) 2086 if ((ir->op2 & IRSLOAD_CONVERT))
2086 emit_rmro(as, XO_CVTSD2SI, dest, base, ofs); 2087 emit_rmro(as, XO_CVTSD2SI, dest, base, ofs);
2087 else if (irt_isnum(t)) 2088 else if (irt_isnum(t))
2088 emit_rmro(as, XMM_MOVRM(as), dest, base, ofs); 2089 emit_rmro(as, XMM_MOVRM(as), dest, base, ofs);
diff --git a/src/lj_ir.h b/src/lj_ir.h
index c483e60f..8ad5d004 100644
--- a/src/lj_ir.h
+++ b/src/lj_ir.h
@@ -190,11 +190,12 @@ IRFLDEF(FLENUM)
190} IRFieldID; 190} IRFieldID;
191 191
192/* SLOAD mode bits, stored in op2. */ 192/* SLOAD mode bits, stored in op2. */
193#define IRSLOAD_INHERIT 0x01 /* Inherited by exits/side traces. */ 193#define IRSLOAD_PARENT 0x01 /* Coalesce with parent trace. */
194#define IRSLOAD_READONLY 0x02 /* Read-only, omit slot store. */ 194#define IRSLOAD_FRAME 0x02 /* Load hiword of frame. */
195#define IRSLOAD_PARENT 0x04 /* Coalesce with parent trace. */ 195#define IRSLOAD_TYPECHECK 0x04 /* Needs type check. */
196#define IRSLOAD_TYPECHECK 0x08 /* Needs type check. */ 196#define IRSLOAD_CONVERT 0x08 /* Number to integer conversion. */
197#define IRSLOAD_FRAME 0x10 /* Load hiword of frame. */ 197#define IRSLOAD_READONLY 0x10 /* Read-only, omit slot store. */
198#define IRSLOAD_INHERIT 0x20 /* Inherited by exits/side traces. */
198 199
199/* XLOAD mode, stored in op2. */ 200/* XLOAD mode, stored in op2. */
200#define IRXLOAD_READONLY 1 /* Load from read-only data. */ 201#define IRXLOAD_READONLY 1 /* Load from read-only data. */
diff --git a/src/lj_jit.h b/src/lj_jit.h
index c405ece9..77377931 100644
--- a/src/lj_jit.h
+++ b/src/lj_jit.h
@@ -218,7 +218,7 @@ typedef struct ScEvEntry {
218 IRRef1 stop; /* Constant stop reference. */ 218 IRRef1 stop; /* Constant stop reference. */
219 IRRef1 step; /* Constant step reference. */ 219 IRRef1 step; /* Constant step reference. */
220 IRType1 t; /* Scalar type. */ 220 IRType1 t; /* Scalar type. */
221 uint8_t dir; /* Direction. 0: +, 1: -. */ 221 uint8_t dir; /* Direction. 1: +, 0: -. */
222} ScEvEntry; 222} ScEvEntry;
223 223
224/* 128 bit SIMD constants. */ 224/* 128 bit SIMD constants. */
diff --git a/src/lj_record.c b/src/lj_record.c
index 4845eeac..00cdcfe6 100644
--- a/src/lj_record.c
+++ b/src/lj_record.c
@@ -298,11 +298,11 @@ static TRef fori_arg(jit_State *J, const BCIns *fori, BCReg slot, IRType t)
298 TRef tr = J->base[slot]; 298 TRef tr = J->base[slot];
299 if (!tr) { 299 if (!tr) {
300 tr = find_kinit(J, fori, slot, t); 300 tr = find_kinit(J, fori, slot, t);
301 if (!tr) { 301 if (!tr)
302 if (t == IRT_INT) 302 tr = sloadt(J, (int32_t)slot,
303 t |= IRT_GUARD; 303 t == IRT_INT ? (IRT_INT|IRT_GUARD) : t,
304 tr = sloadt(J, (int32_t)slot, t, IRSLOAD_READONLY|IRSLOAD_INHERIT); 304 t == IRT_INT ? (IRSLOAD_CONVERT|IRSLOAD_READONLY|IRSLOAD_INHERIT) :
305 } 305 (IRSLOAD_READONLY|IRSLOAD_INHERIT));
306 } 306 }
307 return tr; 307 return tr;
308} 308}
@@ -2512,6 +2512,7 @@ static void rec_setup_forl(jit_State *J, const BCIns *fori)
2512 cTValue *forbase = &J->L->base[ra]; 2512 cTValue *forbase = &J->L->base[ra];
2513 IRType t = (J->flags & JIT_F_OPT_NARROW) ? lj_opt_narrow_forl(forbase) 2513 IRType t = (J->flags & JIT_F_OPT_NARROW) ? lj_opt_narrow_forl(forbase)
2514 : IRT_NUM; 2514 : IRT_NUM;
2515 TRef start;
2515 TRef stop = fori_arg(J, fori, ra+FORL_STOP, t); 2516 TRef stop = fori_arg(J, fori, ra+FORL_STOP, t);
2516 TRef step = fori_arg(J, fori, ra+FORL_STEP, t); 2517 TRef step = fori_arg(J, fori, ra+FORL_STEP, t);
2517 int dir = (0 <= numV(&forbase[FORL_STEP])); 2518 int dir = (0 <= numV(&forbase[FORL_STEP]));
@@ -2548,10 +2549,11 @@ static void rec_setup_forl(jit_State *J, const BCIns *fori)
2548 emitir(IRTGI(dir ? IR_LE : IR_GE), stop, lj_ir_kint(J, k)); 2549 emitir(IRTGI(dir ? IR_LE : IR_GE), stop, lj_ir_kint(J, k));
2549 } 2550 }
2550 J->scev.start = tref_ref(find_kinit(J, fori, ra+FORL_IDX, IRT_INT)); 2551 J->scev.start = tref_ref(find_kinit(J, fori, ra+FORL_IDX, IRT_INT));
2551 if (t == IRT_INT && !J->scev.start) 2552 start = sloadt(J, (int32_t)(ra+FORL_IDX),
2552 t |= IRT_GUARD; 2553 (t == IRT_INT && !J->scev.start) ? (IRT_INT|IRT_GUARD) : t,
2553 J->base[ra+FORL_EXT] = sloadt(J, (int32_t)(ra+FORL_IDX), t, IRSLOAD_INHERIT); 2554 t == IRT_INT ? (IRSLOAD_CONVERT|IRSLOAD_INHERIT) : IRSLOAD_INHERIT);
2554 J->scev.idx = tref_ref(J->base[ra+FORL_EXT]); 2555 J->base[ra+FORL_EXT] = start;
2556 J->scev.idx = tref_ref(start);
2555 J->maxslot = ra+FORL_EXT+1; 2557 J->maxslot = ra+FORL_EXT+1;
2556} 2558}
2557 2559