Add SSE3 CPU feature detection.

2 files changed, 10 insertions, 8 deletions

diff --git a/src/lib_jit.c b/src/lib_jit.c
index 513a1c37..f99418cc 100644
--- a/src/lib_jit.c
+++ b/src/lib_jit.c
@@ -530,6 +530,7 @@ static uint32_t jit_cpudetect(lua_State *L)
     flags |= ((features[3] >> 15)&1) * JIT_F_CMOV;
     flags |= ((features[3] >> 26)&1) * JIT_F_SSE2;
 #if LJ_HASJIT
+    flags |= ((features[2] >> 0)&1) * JIT_F_SSE3;
     flags |= ((features[2] >> 19)&1) * JIT_F_SSE4_1;
     if (vendor[2] == 0x6c65746e) {  /* Intel. */
       if ((features[0] & 0x0ff00f00) == 0x00000f00)  /* P4. */
diff --git a/src/lj_jit.h b/src/lj_jit.h
index 34f37d02..a8be1a97 100644
--- a/src/lj_jit.h
+++ b/src/lj_jit.h
@@ -14,17 +14,18 @@
 
 /* CPU-specific JIT engine flags. */
 #if LJ_TARGET_X86ORX64
-#define JIT_F_CMOV              0x00000100
-#define JIT_F_SSE2              0x00000200
-#define JIT_F_SSE4_1            0x00000400
-#define JIT_F_P4                0x00000800
-#define JIT_F_PREFER_IMUL       0x00001000
-#define JIT_F_SPLIT_XMM         0x00002000
-#define JIT_F_LEA_AGU           0x00004000
+#define JIT_F_CMOV              0x00000010
+#define JIT_F_SSE2              0x00000020
+#define JIT_F_SSE3              0x00000040
+#define JIT_F_SSE4_1            0x00000080
+#define JIT_F_P4                0x00000100
+#define JIT_F_PREFER_IMUL       0x00000200
+#define JIT_F_SPLIT_XMM         0x00000400
+#define JIT_F_LEA_AGU           0x00000800
 
 /* Names for the CPU-specific flags. Must match the order above. */
 #define JIT_F_CPU_FIRST         JIT_F_CMOV
-#define JIT_F_CPUSTRING         "\4CMOV\4SSE2\6SSE4.1\2P4\3AMD\2K8\4ATOM"
+#define JIT_F_CPUSTRING         "\4CMOV\4SSE2\4SSE3\6SSE4.1\2P4\3AMD\2K8\4ATOM"
 #else
 #error "Missing CPU-specific JIT engine flags"
 #endif