PPC: Add register assignments and type definitions.

2 files changed, 75 insertions, 0 deletions

diff --git a/src/buildvm_ppc.dasc b/src/buildvm_ppc.dasc
index c2363d97..c76c425d 100644
--- a/src/buildvm_ppc.dasc
+++ b/src/buildvm_ppc.dasc
@@ -14,8 +14,55 @@
 |.error "No support for plain PowerPC CPUs (yet)"
 |.endif
 |
+|// Note: The ragged indentation of the instructions is intentional.
+|//       The starting columns indicate data dependencies.
+|
 |//-----------------------------------------------------------------------
 |
+|// Fixed register assignments for the interpreter.
+|// Don't use: r1 = sp, r2 and r13 = reserved and/or small data area ptr
+|
+|// The following must be C callee-save (but BASE is often refetched).
+|.define BASE,          r14     // Base of current Lua stack frame.
+|.define KBASE,         r15     // Constants of current Lua function.
+|.define PC,            r16     // Next PC.
+|.define DISPATCH,      r17     // Opcode dispatch table.
+|.define LREG,          r18     // Register holding lua_State (also in SAVE_L).
+|
+|// Constants for vectorized type-comparisons (hi+low GPR). C callee-save.
+|.define TISNUM,        r21
+|.if SPE
+|.define TISSTR,        r22
+|.define TISTAB,        r23
+|.define TISFUNC,       r24
+|.define TISNIL,        r25
+|.endif
+|
+|// The following temporaries are not saved across C calls, except for RA.
+|.define RA,            r19     // Callee-save.
+|.define RB,            r10
+|.define RC,            r11
+|.define RD,            r12
+|.define INS,           r7      // Overlaps CARG5.
+|
+|.define TMP0,          r0
+|.define TMP1,          r8
+|.define TMP2,          r9
+|.define TMP3,          r6      // Overlaps CARG4.
+|
+|// Saved temporaries.
+|.define SAVE0,         r20
+|
+|// Calling conventions.
+|.define CARG1,         r3
+|.define CARG2,         r4
+|.define CARG3,         r5
+|.define CARG4,         r6      // Overlaps TMP3.
+|.define CARG5,         r7      // Overlaps INS.
+|
+|.define CRET1,         r3
+|.define CRET2,         r4
+|
 |// Stack layout while in interpreter. Must match with lj_frame.h.
 |.if SPE
 |.define SAVE_LR,       180(sp)
@@ -70,6 +117,21 @@
 |  addi sp, sp, CFRAME_SPACE
 |.endmacro
 |
+|// Type definitions. Some of these are only used for documentation.
+|.type L,               lua_State,      LREG
+|.type GL,              global_State
+|.type TVALUE,          TValue
+|.type GCOBJ,           GCobj
+|.type STR,             GCstr
+|.type TAB,             GCtab
+|.type LFUNC,           GCfuncL
+|.type CFUNC,           GCfuncC
+|.type PROTO,           GCproto
+|.type UPVAL,           GCupval
+|.type NODE,            Node
+|.type NARGS8,          int
+|.type TRACE,           GCtrace
+|
 |//-----------------------------------------------------------------------
 |
 |// Trap for not-yet-implemented parts.
diff --git a/src/buildvm_ppcspe.h b/src/buildvm_ppcspe.h
index 9a066bc6..8c25fdf8 100644
--- a/src/buildvm_ppcspe.h
+++ b/src/buildvm_ppcspe.h
@@ -748,6 +748,19 @@ static const char *const globnames[] = {
 static const char *const extnames[] = {
   (const char *)0
 };
+#define Dt1(_V) (int)(ptrdiff_t)&(((lua_State *)0)_V)
+#define Dt2(_V) (int)(ptrdiff_t)&(((global_State *)0)_V)
+#define Dt3(_V) (int)(ptrdiff_t)&(((TValue *)0)_V)
+#define Dt4(_V) (int)(ptrdiff_t)&(((GCobj *)0)_V)
+#define Dt5(_V) (int)(ptrdiff_t)&(((GCstr *)0)_V)
+#define Dt6(_V) (int)(ptrdiff_t)&(((GCtab *)0)_V)
+#define Dt7(_V) (int)(ptrdiff_t)&(((GCfuncL *)0)_V)
+#define Dt8(_V) (int)(ptrdiff_t)&(((GCfuncC *)0)_V)
+#define Dt9(_V) (int)(ptrdiff_t)&(((GCproto *)0)_V)
+#define DtA(_V) (int)(ptrdiff_t)&(((GCupval *)0)_V)
+#define DtB(_V) (int)(ptrdiff_t)&(((Node *)0)_V)
+#define DtC(_V) (int)(ptrdiff_t)&(((int *)0)_V)
+#define DtD(_V) (int)(ptrdiff_t)&(((GCtrace *)0)_V)
 #define DISPATCH_GL(field)      (GG_DISP2G + (int)offsetof(global_State, field))
 #define DISPATCH_J(field)       (GG_DISP2J + (int)offsetof(jit_State, field))
 #define PC2PROTO(field)  ((int)offsetof(GCproto, field)-(int)sizeof(GCproto))