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author | Mike Pall <mike> | 2016-11-19 19:53:46 +0100 |
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committer | Mike Pall <mike> | 2016-11-19 19:53:46 +0100 |
commit | e577db52c543303543c9e30e8ebe0c244e1b85c8 (patch) | |
tree | 745f5c5e39aa83f66f2ceb3e3145f44f551a197c /src | |
parent | 5400c1e42469cdb3cb5df691baa877b762b27704 (diff) | |
download | luajit-e577db52c543303543c9e30e8ebe0c244e1b85c8.tar.gz luajit-e577db52c543303543c9e30e8ebe0c244e1b85c8.tar.bz2 luajit-e577db52c543303543c9e30e8ebe0c244e1b85c8.zip |
Increase range of GG_State loads via IR_FLOAD with REF_NIL.
Require 32 bit alignment and store offset/4 instead.
Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
Diffstat (limited to 'src')
-rw-r--r-- | src/lj_asm_mips.h | 2 | ||||
-rw-r--r-- | src/lj_asm_ppc.h | 2 | ||||
-rw-r--r-- | src/lj_asm_x86.h | 4 | ||||
-rw-r--r-- | src/lj_ir.c | 6 |
4 files changed, 8 insertions, 6 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index cf446346..0ae5e287 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h | |||
@@ -901,7 +901,7 @@ static void asm_fload(ASMState *as, IRIns *ir) | |||
901 | int32_t ofs; | 901 | int32_t ofs; |
902 | if (ir->op1 == REF_NIL) { | 902 | if (ir->op1 == REF_NIL) { |
903 | idx = RID_JGL; | 903 | idx = RID_JGL; |
904 | ofs = ir->op2 - 32768; | 904 | ofs = (ir->op2 << 2) - 32768; |
905 | } else { | 905 | } else { |
906 | idx = ra_alloc1(as, ir->op1, RSET_GPR); | 906 | idx = ra_alloc1(as, ir->op1, RSET_GPR); |
907 | if (ir->op2 == IRFL_TAB_ARRAY) { | 907 | if (ir->op2 == IRFL_TAB_ARRAY) { |
diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h index 46821515..1ac882ca 100644 --- a/src/lj_asm_ppc.h +++ b/src/lj_asm_ppc.h | |||
@@ -809,7 +809,7 @@ static void asm_fload(ASMState *as, IRIns *ir) | |||
809 | int32_t ofs; | 809 | int32_t ofs; |
810 | if (ir->op1 == REF_NIL) { | 810 | if (ir->op1 == REF_NIL) { |
811 | idx = RID_JGL; | 811 | idx = RID_JGL; |
812 | ofs = ir->op2 - 32768; | 812 | ofs = (ir->op2 << 2) - 32768; |
813 | } else { | 813 | } else { |
814 | idx = ra_alloc1(as, ir->op1, RSET_GPR); | 814 | idx = ra_alloc1(as, ir->op1, RSET_GPR); |
815 | if (ir->op2 == IRFL_TAB_ARRAY) { | 815 | if (ir->op2 == IRFL_TAB_ARRAY) { |
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index 1b94371e..381eac9c 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h | |||
@@ -234,10 +234,10 @@ static void asm_fusefref(ASMState *as, IRIns *ir, RegSet allow) | |||
234 | as->mrm.idx = RID_NONE; | 234 | as->mrm.idx = RID_NONE; |
235 | if (ir->op1 == REF_NIL) { | 235 | if (ir->op1 == REF_NIL) { |
236 | #if LJ_GC64 | 236 | #if LJ_GC64 |
237 | as->mrm.ofs = (int32_t)ir->op2 - GG_OFS(dispatch); | 237 | as->mrm.ofs = (int32_t)(ir->op2 << 2) - GG_OFS(dispatch); |
238 | as->mrm.base = RID_DISPATCH; | 238 | as->mrm.base = RID_DISPATCH; |
239 | #else | 239 | #else |
240 | as->mrm.ofs = (int32_t)ir->op2 + ptr2addr(J2GG(as->J)); | 240 | as->mrm.ofs = (int32_t)(ir->op2 << 2) + ptr2addr(J2GG(as->J)); |
241 | as->mrm.base = RID_NONE; | 241 | as->mrm.base = RID_NONE; |
242 | #endif | 242 | #endif |
243 | return; | 243 | return; |
diff --git a/src/lj_ir.c b/src/lj_ir.c index 87fd0f4d..c5c521be 100644 --- a/src/lj_ir.c +++ b/src/lj_ir.c | |||
@@ -145,10 +145,12 @@ TRef lj_ir_call(jit_State *J, IRCallID id, ...) | |||
145 | return emitir(CCI_OPTYPE(ci), tr, id); | 145 | return emitir(CCI_OPTYPE(ci), tr, id); |
146 | } | 146 | } |
147 | 147 | ||
148 | /* Load field of type t from GG_State + offset. */ | 148 | /* Load field of type t from GG_State + offset. Must be 32 bit aligned. */ |
149 | LJ_FUNC TRef lj_ir_ggfload(jit_State *J, IRType t, uintptr_t ofs) | 149 | LJ_FUNC TRef lj_ir_ggfload(jit_State *J, IRType t, uintptr_t ofs) |
150 | { | 150 | { |
151 | lua_assert(ofs >= IRFL__MAX && ofs < REF_BIAS); | 151 | lua_assert((ofs & 3) == 0); |
152 | ofs >>= 2; | ||
153 | lua_assert(ofs >= IRFL__MAX && ofs <= 0x3ff); /* 10 bit FOLD key limit. */ | ||
152 | lj_ir_set(J, IRT(IR_FLOAD, t), REF_NIL, ofs); | 154 | lj_ir_set(J, IRT(IR_FLOAD, t), REF_NIL, ofs); |
153 | return lj_opt_fold(J); | 155 | return lj_opt_fold(J); |
154 | } | 156 | } |