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| author | Mike Pall <mike> | 2016-04-14 00:14:42 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2016-04-14 00:14:42 +0200 |
| commit | e5b5e079c364bb429a85f6c740c478e2dd820381 (patch) | |
| tree | e0ad32cee49c642f5075d998ba52fd9498c82383 /src | |
| parent | 1c6fd13dbd2af1034db935805fd93fbdcdf4f417 (diff) | |
| download | luajit-e5b5e079c364bb429a85f6c740c478e2dd820381.tar.gz luajit-e5b5e079c364bb429a85f6c740c478e2dd820381.tar.bz2 luajit-e5b5e079c364bb429a85f6c740c478e2dd820381.zip | |
MIPS: Fix BC_ISNEXT fallback path.
Thanks to RT-RK.com.
Diffstat (limited to 'src')
| -rw-r--r-- | src/vm_mips.dasc | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/vm_mips.dasc b/src/vm_mips.dasc index b135fbe0..7fc1fb2c 100644 --- a/src/vm_mips.dasc +++ b/src/vm_mips.dasc | |||
| @@ -3619,24 +3619,24 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3619 | case BC_ISNEXT: | 3619 | case BC_ISNEXT: |
| 3620 | | // RA = base*8, RD = target (points to ITERN) | 3620 | | // RA = base*8, RD = target (points to ITERN) |
| 3621 | | addu RA, BASE, RA | 3621 | | addu RA, BASE, RA |
| 3622 | | lw TMP0, -24+HI(RA) | 3622 | | srl TMP0, RD, 1 |
| 3623 | | lw CFUNC:TMP1, -24+LO(RA) | 3623 | | lw CARG1, -24+HI(RA) |
| 3624 | | lw TMP2, -16+HI(RA) | 3624 | | lw CFUNC:CARG2, -24+LO(RA) |
| 3625 | | lw TMP3, -8+HI(RA) | 3625 | | addu TMP0, PC, TMP0 |
| 3626 | | lw CARG3, -16+HI(RA) | ||
| 3627 | | lw CARG4, -8+HI(RA) | ||
| 3626 | | li AT, LJ_TFUNC | 3628 | | li AT, LJ_TFUNC |
| 3627 | | bne TMP0, AT, >5 | 3629 | | bne CARG1, AT, >5 |
| 3628 | |. addiu TMP2, TMP2, -LJ_TTAB | 3630 | |. lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535) |
| 3629 | | lbu TMP1, CFUNC:TMP1->ffid | 3631 | | lbu CARG2, CFUNC:CARG2->ffid |
| 3630 | | addiu TMP3, TMP3, -LJ_TNIL | 3632 | | addiu CARG3, CARG3, -LJ_TTAB |
| 3631 | | srl TMP0, RD, 1 | 3633 | | addiu CARG4, CARG4, -LJ_TNIL |
| 3632 | | or TMP2, TMP2, TMP3 | 3634 | | or CARG3, CARG3, CARG4 |
| 3633 | | addiu TMP1, TMP1, -FF_next_N | 3635 | | addiu CARG2, CARG2, -FF_next_N |
| 3634 | | addu TMP0, PC, TMP0 | 3636 | | or CARG2, CARG2, CARG3 |
| 3635 | | or TMP1, TMP1, TMP2 | 3637 | | bnez CARG2, >5 |
| 3636 | | bnez TMP1, >5 | 3638 | |. lui TMP1, 0xfffe |
| 3637 | |. lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535) | ||
| 3638 | | addu PC, TMP0, TMP2 | 3639 | | addu PC, TMP0, TMP2 |
| 3639 | | lui TMP1, 0xfffe | ||
| 3640 | | ori TMP1, TMP1, 0x7fff | 3640 | | ori TMP1, TMP1, 0x7fff |
| 3641 | | sw r0, -8+LO(RA) // Initialize control var. | 3641 | | sw r0, -8+LO(RA) // Initialize control var. |
| 3642 | | sw TMP1, -8+HI(RA) | 3642 | | sw TMP1, -8+HI(RA) |
| @@ -3646,7 +3646,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
| 3646 | | li TMP3, BC_JMP | 3646 | | li TMP3, BC_JMP |
| 3647 | | li TMP1, BC_ITERC | 3647 | | li TMP1, BC_ITERC |
| 3648 | | sb TMP3, -4+OFS_OP(PC) | 3648 | | sb TMP3, -4+OFS_OP(PC) |
| 3649 | | addu PC, TMP0, TMP2 | 3649 | | addu PC, TMP0, TMP2 |
| 3650 | | b <1 | 3650 | | b <1 |
| 3651 | |. sb TMP1, OFS_OP(PC) | 3651 | |. sb TMP1, OFS_OP(PC) |
| 3652 | break; | 3652 | break; |