diff options
-rw-r--r-- | src/lj_asm_arm.h | 18 | ||||
-rw-r--r-- | src/lj_asm_mips.h | 22 | ||||
-rw-r--r-- | src/lj_asm_ppc.h | 18 | ||||
-rw-r--r-- | src/lj_asm_x86.h | 14 |
4 files changed, 19 insertions, 53 deletions
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h index d5a242e7..9ef785c3 100644 --- a/src/lj_asm_arm.h +++ b/src/lj_asm_arm.h | |||
@@ -693,7 +693,7 @@ static void asm_newref(ASMState *as, IRIns *ir) | |||
693 | { | 693 | { |
694 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; | 694 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; |
695 | IRRef args[3]; | 695 | IRRef args[3]; |
696 | if (ir->r == RID_SINK) /* Sink newref. */ | 696 | if (ir->r == RID_SINK) |
697 | return; | 697 | return; |
698 | args[0] = ASMREF_L; /* lua_State *L */ | 698 | args[0] = ASMREF_L; /* lua_State *L */ |
699 | args[1] = ir->op1; /* GCtab *t */ | 699 | args[1] = ir->op1; /* GCtab *t */ |
@@ -814,9 +814,7 @@ static void asm_fload(ASMState *as, IRIns *ir) | |||
814 | 814 | ||
815 | static void asm_fstore(ASMState *as, IRIns *ir) | 815 | static void asm_fstore(ASMState *as, IRIns *ir) |
816 | { | 816 | { |
817 | if (ir->r == RID_SINK) { /* Sink store. */ | 817 | if (ir->r != RID_SINK) { |
818 | asm_snap_prep(as); | ||
819 | } else { | ||
820 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); | 818 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); |
821 | IRIns *irf = IR(ir->op1); | 819 | IRIns *irf = IR(ir->op1); |
822 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); | 820 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); |
@@ -838,9 +836,7 @@ static void asm_xload(ASMState *as, IRIns *ir) | |||
838 | 836 | ||
839 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) | 837 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) |
840 | { | 838 | { |
841 | if (ir->r == RID_SINK) { /* Sink store. */ | 839 | if (ir->r != RID_SINK) { |
842 | asm_snap_prep(as); | ||
843 | } else { | ||
844 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); | 840 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); |
845 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, | 841 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, |
846 | rset_exclude(RSET_GPR, src), ofs); | 842 | rset_exclude(RSET_GPR, src), ofs); |
@@ -882,9 +878,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir) | |||
882 | 878 | ||
883 | static void asm_ahustore(ASMState *as, IRIns *ir) | 879 | static void asm_ahustore(ASMState *as, IRIns *ir) |
884 | { | 880 | { |
885 | if (ir->r == RID_SINK) { /* Sink store. */ | 881 | if (ir->r != RID_SINK) { |
886 | asm_snap_prep(as); | ||
887 | } else { | ||
888 | RegSet allow = RSET_GPR; | 882 | RegSet allow = RSET_GPR; |
889 | Reg idx, src = RID_NONE, type = RID_NONE; | 883 | Reg idx, src = RID_NONE, type = RID_NONE; |
890 | int32_t ofs = 0; | 884 | int32_t ofs = 0; |
@@ -1392,9 +1386,7 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1392 | asm_fpmin_max(as, ir-1, (ir-1)->o == IR_MIN ? CC_HI : CC_LO); | 1386 | asm_fpmin_max(as, ir-1, (ir-1)->o == IR_MIN ? CC_HI : CC_LO); |
1393 | return; | 1387 | return; |
1394 | } else if ((ir-1)->o == IR_XSTORE) { | 1388 | } else if ((ir-1)->o == IR_XSTORE) { |
1395 | if ((ir-1)->r == RID_SINK) | 1389 | if ((ir-1)->r != RID_SINK) |
1396 | asm_snap_prep(as); | ||
1397 | else | ||
1398 | asm_xstore(as, ir, 4); | 1390 | asm_xstore(as, ir, 4); |
1399 | return; | 1391 | return; |
1400 | } | 1392 | } |
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index 0adc2f6b..6163882e 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h | |||
@@ -769,9 +769,7 @@ nolo: | |||
769 | 769 | ||
770 | static void asm_newref(ASMState *as, IRIns *ir) | 770 | static void asm_newref(ASMState *as, IRIns *ir) |
771 | { | 771 | { |
772 | if (ir->r == RID_SINK) { /* Sink newref. */ | 772 | if (ir->r != RID_SINK) { |
773 | return; | ||
774 | } else { | ||
775 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; | 773 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; |
776 | IRRef args[3]; | 774 | IRRef args[3]; |
777 | args[0] = ASMREF_L; /* lua_State *L */ | 775 | args[0] = ASMREF_L; /* lua_State *L */ |
@@ -893,10 +891,7 @@ static void asm_fload(ASMState *as, IRIns *ir) | |||
893 | 891 | ||
894 | static void asm_fstore(ASMState *as, IRIns *ir) | 892 | static void asm_fstore(ASMState *as, IRIns *ir) |
895 | { | 893 | { |
896 | if (ir->r == RID_SINK) { /* Sink store. */ | 894 | if (ir->r != RID_SINK) { |
897 | asm_snap_prep(as); | ||
898 | return; | ||
899 | } else { | ||
900 | Reg src = ra_alloc1z(as, ir->op2, RSET_GPR); | 895 | Reg src = ra_alloc1z(as, ir->op2, RSET_GPR); |
901 | IRIns *irf = IR(ir->op1); | 896 | IRIns *irf = IR(ir->op1); |
902 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); | 897 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); |
@@ -916,10 +911,7 @@ static void asm_xload(ASMState *as, IRIns *ir) | |||
916 | 911 | ||
917 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) | 912 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) |
918 | { | 913 | { |
919 | if (ir->r == RID_SINK) { /* Sink store. */ | 914 | if (ir->r != RID_SINK) { |
920 | asm_snap_prep(as); | ||
921 | return; | ||
922 | } else { | ||
923 | Reg src = ra_alloc1z(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR); | 915 | Reg src = ra_alloc1z(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR); |
924 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, | 916 | asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, |
925 | rset_exclude(RSET_GPR, src), ofs); | 917 | rset_exclude(RSET_GPR, src), ofs); |
@@ -956,10 +948,8 @@ static void asm_ahustore(ASMState *as, IRIns *ir) | |||
956 | RegSet allow = RSET_GPR; | 948 | RegSet allow = RSET_GPR; |
957 | Reg idx, src = RID_NONE, type = RID_NONE; | 949 | Reg idx, src = RID_NONE, type = RID_NONE; |
958 | int32_t ofs = 0; | 950 | int32_t ofs = 0; |
959 | if (ir->r == RID_SINK) { /* Sink store. */ | 951 | if (ir->r == RID_SINK) |
960 | asm_snap_prep(as); | ||
961 | return; | 952 | return; |
962 | } | ||
963 | if (irt_isnum(ir->t)) { | 953 | if (irt_isnum(ir->t)) { |
964 | src = ra_alloc1(as, ir->op2, RSET_FPR); | 954 | src = ra_alloc1(as, ir->op2, RSET_FPR); |
965 | } else { | 955 | } else { |
@@ -1574,9 +1564,7 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1574 | return; | 1564 | return; |
1575 | } else if ((ir-1)->o == IR_XSTORE) { | 1565 | } else if ((ir-1)->o == IR_XSTORE) { |
1576 | as->curins--; /* Handle both stores here. */ | 1566 | as->curins--; /* Handle both stores here. */ |
1577 | if ((ir-1)->r == RID_SINK) { | 1567 | if ((ir-1)->r != RID_SINK) { |
1578 | asm_snap_prep(as); | ||
1579 | } else { | ||
1580 | asm_xstore(as, ir, LJ_LE ? 4 : 0); | 1568 | asm_xstore(as, ir, LJ_LE ? 4 : 0); |
1581 | asm_xstore(as, ir-1, LJ_LE ? 0 : 4); | 1569 | asm_xstore(as, ir-1, LJ_LE ? 0 : 4); |
1582 | } | 1570 | } |
diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h index 85b87bd5..86052577 100644 --- a/src/lj_asm_ppc.h +++ b/src/lj_asm_ppc.h | |||
@@ -773,7 +773,7 @@ static void asm_newref(ASMState *as, IRIns *ir) | |||
773 | { | 773 | { |
774 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; | 774 | const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey]; |
775 | IRRef args[3]; | 775 | IRRef args[3]; |
776 | if (ir->r == RID_SINK) /* Sink newref. */ | 776 | if (ir->r == RID_SINK) |
777 | return; | 777 | return; |
778 | args[0] = ASMREF_L; /* lua_State *L */ | 778 | args[0] = ASMREF_L; /* lua_State *L */ |
779 | args[1] = ir->op1; /* GCtab *t */ | 779 | args[1] = ir->op1; /* GCtab *t */ |
@@ -894,9 +894,7 @@ static void asm_fload(ASMState *as, IRIns *ir) | |||
894 | 894 | ||
895 | static void asm_fstore(ASMState *as, IRIns *ir) | 895 | static void asm_fstore(ASMState *as, IRIns *ir) |
896 | { | 896 | { |
897 | if (ir->r == RID_SINK) { /* Sink store. */ | 897 | if (ir->r != RID_SINK) { |
898 | asm_snap_prep(as); | ||
899 | } else { | ||
900 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); | 898 | Reg src = ra_alloc1(as, ir->op2, RSET_GPR); |
901 | IRIns *irf = IR(ir->op1); | 899 | IRIns *irf = IR(ir->op1); |
902 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); | 900 | Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); |
@@ -918,10 +916,8 @@ static void asm_xload(ASMState *as, IRIns *ir) | |||
918 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) | 916 | static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs) |
919 | { | 917 | { |
920 | IRIns *irb; | 918 | IRIns *irb; |
921 | if (ir->r == RID_SINK) { /* Sink store. */ | 919 | if (ir->r == RID_SINK) |
922 | asm_snap_prep(as); | ||
923 | return; | 920 | return; |
924 | } | ||
925 | if (ofs == 0 && mayfuse(as, ir->op2) && (irb = IR(ir->op2))->o == IR_BSWAP && | 921 | if (ofs == 0 && mayfuse(as, ir->op2) && (irb = IR(ir->op2))->o == IR_BSWAP && |
926 | ra_noreg(irb->r) && (irt_isint(ir->t) || irt_isu32(ir->t))) { | 922 | ra_noreg(irb->r) && (irt_isint(ir->t) || irt_isu32(ir->t))) { |
927 | /* Fuse BSWAP with XSTORE to stwbrx. */ | 923 | /* Fuse BSWAP with XSTORE to stwbrx. */ |
@@ -978,10 +974,8 @@ static void asm_ahustore(ASMState *as, IRIns *ir) | |||
978 | RegSet allow = RSET_GPR; | 974 | RegSet allow = RSET_GPR; |
979 | Reg idx, src = RID_NONE, type = RID_NONE; | 975 | Reg idx, src = RID_NONE, type = RID_NONE; |
980 | int32_t ofs = AHUREF_LSX; | 976 | int32_t ofs = AHUREF_LSX; |
981 | if (ir->r == RID_SINK) { /* Sink store. */ | 977 | if (ir->r == RID_SINK) |
982 | asm_snap_prep(as); | ||
983 | return; | 978 | return; |
984 | } | ||
985 | if (irt_isnum(ir->t)) { | 979 | if (irt_isnum(ir->t)) { |
986 | src = ra_alloc1(as, ir->op2, RSET_FPR); | 980 | src = ra_alloc1(as, ir->op2, RSET_FPR); |
987 | } else { | 981 | } else { |
@@ -1761,9 +1755,7 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
1761 | return; | 1755 | return; |
1762 | } else if ((ir-1)->o == IR_XSTORE) { | 1756 | } else if ((ir-1)->o == IR_XSTORE) { |
1763 | as->curins--; /* Handle both stores here. */ | 1757 | as->curins--; /* Handle both stores here. */ |
1764 | if ((ir-1)->r == RID_SINK) { | 1758 | if ((ir-1)->r != RID_SINK) { |
1765 | asm_snap_prep(as); | ||
1766 | } else { | ||
1767 | asm_xstore(as, ir, 0); | 1759 | asm_xstore(as, ir, 0); |
1768 | asm_xstore(as, ir-1, 4); | 1760 | asm_xstore(as, ir-1, 4); |
1769 | } | 1761 | } |
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index 59c808c4..86dc7af2 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h | |||
@@ -1155,7 +1155,7 @@ static void asm_newref(ASMState *as, IRIns *ir) | |||
1155 | IRRef args[3]; | 1155 | IRRef args[3]; |
1156 | IRIns *irkey; | 1156 | IRIns *irkey; |
1157 | Reg tmp; | 1157 | Reg tmp; |
1158 | if (ir->r == RID_SINK) /* Sink newref. */ | 1158 | if (ir->r == RID_SINK) |
1159 | return; | 1159 | return; |
1160 | args[0] = ASMREF_L; /* lua_State *L */ | 1160 | args[0] = ASMREF_L; /* lua_State *L */ |
1161 | args[1] = ir->op1; /* GCtab *t */ | 1161 | args[1] = ir->op1; /* GCtab *t */ |
@@ -1261,10 +1261,8 @@ static void asm_fxstore(ASMState *as, IRIns *ir) | |||
1261 | RegSet allow = RSET_GPR; | 1261 | RegSet allow = RSET_GPR; |
1262 | Reg src = RID_NONE, osrc = RID_NONE; | 1262 | Reg src = RID_NONE, osrc = RID_NONE; |
1263 | int32_t k = 0; | 1263 | int32_t k = 0; |
1264 | if (ir->r == RID_SINK) { /* Sink store. */ | 1264 | if (ir->r == RID_SINK) |
1265 | asm_snap_prep(as); | ||
1266 | return; | 1265 | return; |
1267 | } | ||
1268 | /* The IRT_I16/IRT_U16 stores should never be simplified for constant | 1266 | /* The IRT_I16/IRT_U16 stores should never be simplified for constant |
1269 | ** values since mov word [mem], imm16 has a length-changing prefix. | 1267 | ** values since mov word [mem], imm16 has a length-changing prefix. |
1270 | */ | 1268 | */ |
@@ -1378,10 +1376,8 @@ static void asm_ahuvload(ASMState *as, IRIns *ir) | |||
1378 | 1376 | ||
1379 | static void asm_ahustore(ASMState *as, IRIns *ir) | 1377 | static void asm_ahustore(ASMState *as, IRIns *ir) |
1380 | { | 1378 | { |
1381 | if (ir->r == RID_SINK) { /* Sink store. */ | 1379 | if (ir->r == RID_SINK) |
1382 | asm_snap_prep(as); | ||
1383 | return; | 1380 | return; |
1384 | } | ||
1385 | if (irt_isnum(ir->t)) { | 1381 | if (irt_isnum(ir->t)) { |
1386 | Reg src = ra_alloc1(as, ir->op2, RSET_FPR); | 1382 | Reg src = ra_alloc1(as, ir->op2, RSET_FPR); |
1387 | asm_fuseahuref(as, ir->op1, RSET_GPR); | 1383 | asm_fuseahuref(as, ir->op1, RSET_GPR); |
@@ -2261,9 +2257,7 @@ static void asm_hiop(ASMState *as, IRIns *ir) | |||
2261 | asm_comp_int64(as, ir); | 2257 | asm_comp_int64(as, ir); |
2262 | return; | 2258 | return; |
2263 | } else if ((ir-1)->o == IR_XSTORE) { | 2259 | } else if ((ir-1)->o == IR_XSTORE) { |
2264 | if ((ir-1)->r == RID_SINK) | 2260 | if ((ir-1)->r != RID_SINK) |
2265 | asm_snap_prep(as); | ||
2266 | else | ||
2267 | asm_fxstore(as, ir); | 2261 | asm_fxstore(as, ir); |
2268 | return; | 2262 | return; |
2269 | } | 2263 | } |