diff options
-rw-r--r-- | src/jit/dump.lua | 3 | ||||
-rw-r--r-- | src/lj_asm_mips.h | 2 | ||||
-rw-r--r-- | src/lj_asm_x86.h | 7 | ||||
-rw-r--r-- | src/lj_crecord.c | 11 | ||||
-rw-r--r-- | src/lj_ir.h | 1 | ||||
-rw-r--r-- | src/lj_obj.h | 4 | ||||
-rw-r--r-- | src/lj_opt_fold.c | 27 | ||||
-rw-r--r-- | src/lj_opt_narrow.c | 3 | ||||
-rw-r--r-- | src/lj_target_arm.h | 4 | ||||
-rw-r--r-- | src/lj_target_x86.h | 2 | ||||
-rw-r--r-- | src/vm_mips.dasc | 12 | ||||
-rw-r--r-- | src/vm_x86.dasc | 10 |
12 files changed, 31 insertions, 55 deletions
diff --git a/src/jit/dump.lua b/src/jit/dump.lua index b9c6cf41..7f930f51 100644 --- a/src/jit/dump.lua +++ b/src/jit/dump.lua | |||
@@ -269,8 +269,7 @@ local litname = { | |||
269 | ["CONV "] = setmetatable({}, { __index = function(t, mode) | 269 | ["CONV "] = setmetatable({}, { __index = function(t, mode) |
270 | local s = irtype[band(mode, 31)] | 270 | local s = irtype[band(mode, 31)] |
271 | s = irtype[band(shr(mode, 5), 31)].."."..s | 271 | s = irtype[band(shr(mode, 5), 31)].."."..s |
272 | if band(mode, 0x400) ~= 0 then s = s.." trunc" | 272 | if band(mode, 0x800) ~= 0 then s = s.." sext" end |
273 | elseif band(mode, 0x800) ~= 0 then s = s.." sext" end | ||
274 | local c = shr(mode, 14) | 273 | local c = shr(mode, 14) |
275 | if c == 2 then s = s.." index" elseif c == 3 then s = s.." check" end | 274 | if c == 2 then s = s.." index" elseif c == 3 then s = s.." check" end |
276 | t[mode] = s | 275 | t[mode] = s |
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index cd283b88..dcc74ce9 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h | |||
@@ -1000,7 +1000,7 @@ static void asm_sload(ASMState *as, IRIns *ir) | |||
1000 | if (irt_isint(t)) { | 1000 | if (irt_isint(t)) { |
1001 | Reg tmp = ra_scratch(as, RSET_FPR); | 1001 | Reg tmp = ra_scratch(as, RSET_FPR); |
1002 | emit_tg(as, MIPSI_MFC1, dest, tmp); | 1002 | emit_tg(as, MIPSI_MFC1, dest, tmp); |
1003 | emit_fg(as, MIPSI_CVT_W_D, tmp, tmp); | 1003 | emit_fg(as, MIPSI_TRUNC_W_D, tmp, tmp); |
1004 | dest = tmp; | 1004 | dest = tmp; |
1005 | t.irt = IRT_NUM; /* Check for original type. */ | 1005 | t.irt = IRT_NUM; /* Check for original type. */ |
1006 | } else { | 1006 | } else { |
diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index 5621b616..9dba6b70 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h | |||
@@ -726,9 +726,7 @@ static void asm_conv(ASMState *as, IRIns *ir) | |||
726 | asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR)); | 726 | asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR)); |
727 | } else { | 727 | } else { |
728 | Reg dest = ra_dest(as, ir, RSET_GPR); | 728 | Reg dest = ra_dest(as, ir, RSET_GPR); |
729 | x86Op op = st == IRT_NUM ? | 729 | x86Op op = st == IRT_NUM ? XO_CVTTSD2SI : XO_CVTTSS2SI; |
730 | ((ir->op2 & IRCONV_TRUNC) ? XO_CVTTSD2SI : XO_CVTSD2SI) : | ||
731 | ((ir->op2 & IRCONV_TRUNC) ? XO_CVTTSS2SI : XO_CVTSS2SI); | ||
732 | if (LJ_64 ? irt_isu64(ir->t) : irt_isu32(ir->t)) { | 730 | if (LJ_64 ? irt_isu64(ir->t) : irt_isu32(ir->t)) { |
733 | /* LJ_64: For inputs >= 2^63 add -2^64, convert again. */ | 731 | /* LJ_64: For inputs >= 2^63 add -2^64, convert again. */ |
734 | /* LJ_32: For inputs >= 2^31 add -2^31, convert again and add 2^31. */ | 732 | /* LJ_32: For inputs >= 2^31 add -2^31, convert again and add 2^31. */ |
@@ -850,7 +848,6 @@ static void asm_conv_int64_fp(ASMState *as, IRIns *ir) | |||
850 | Reg lo, hi; | 848 | Reg lo, hi; |
851 | lua_assert(st == IRT_NUM || st == IRT_FLOAT); | 849 | lua_assert(st == IRT_NUM || st == IRT_FLOAT); |
852 | lua_assert(dt == IRT_I64 || dt == IRT_U64); | 850 | lua_assert(dt == IRT_I64 || dt == IRT_U64); |
853 | lua_assert(((ir-1)->op2 & IRCONV_TRUNC)); | ||
854 | hi = ra_dest(as, ir, RSET_GPR); | 851 | hi = ra_dest(as, ir, RSET_GPR); |
855 | lo = ra_dest(as, ir-1, rset_exclude(RSET_GPR, hi)); | 852 | lo = ra_dest(as, ir-1, rset_exclude(RSET_GPR, hi)); |
856 | if (ra_used(ir-1)) emit_rmro(as, XO_MOV, lo, RID_ESP, 0); | 853 | if (ra_used(ir-1)) emit_rmro(as, XO_MOV, lo, RID_ESP, 0); |
@@ -1457,7 +1454,7 @@ static void asm_sload(ASMState *as, IRIns *ir) | |||
1457 | lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t)); | 1454 | lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t)); |
1458 | if ((ir->op2 & IRSLOAD_CONVERT)) { | 1455 | if ((ir->op2 & IRSLOAD_CONVERT)) { |
1459 | t.irt = irt_isint(t) ? IRT_NUM : IRT_INT; /* Check for original type. */ | 1456 | t.irt = irt_isint(t) ? IRT_NUM : IRT_INT; /* Check for original type. */ |
1460 | emit_rmro(as, irt_isint(t) ? XO_CVTSI2SD : XO_CVTSD2SI, dest, base, ofs); | 1457 | emit_rmro(as, irt_isint(t) ? XO_CVTSI2SD : XO_CVTTSD2SI, dest, base, ofs); |
1461 | } else { | 1458 | } else { |
1462 | emit_rmro(as, irt_isnum(t) ? XO_MOVSD : XO_MOV, dest, base, ofs); | 1459 | emit_rmro(as, irt_isnum(t) ? XO_MOVSD : XO_MOV, dest, base, ofs); |
1463 | } | 1460 | } |
diff --git a/src/lj_crecord.c b/src/lj_crecord.c index b60eb7b3..a5d896eb 100644 --- a/src/lj_crecord.c +++ b/src/lj_crecord.c | |||
@@ -446,7 +446,7 @@ static TRef crec_ct_ct(jit_State *J, CType *d, CType *s, TRef dp, TRef sp, | |||
446 | /* fallthrough */ | 446 | /* fallthrough */ |
447 | case CCX(I, F): | 447 | case CCX(I, F): |
448 | if (dt == IRT_CDATA || st == IRT_CDATA) goto err_nyi; | 448 | if (dt == IRT_CDATA || st == IRT_CDATA) goto err_nyi; |
449 | sp = emitconv(sp, dsize < 4 ? IRT_INT : dt, st, IRCONV_TRUNC|IRCONV_ANY); | 449 | sp = emitconv(sp, dsize < 4 ? IRT_INT : dt, st, IRCONV_ANY); |
450 | goto xstore; | 450 | goto xstore; |
451 | case CCX(I, P): | 451 | case CCX(I, P): |
452 | case CCX(I, A): | 452 | case CCX(I, A): |
@@ -522,7 +522,7 @@ static TRef crec_ct_ct(jit_State *J, CType *d, CType *s, TRef dp, TRef sp, | |||
522 | if (st == IRT_CDATA) goto err_nyi; | 522 | if (st == IRT_CDATA) goto err_nyi; |
523 | /* The signed conversion is cheaper. x64 really has 47 bit pointers. */ | 523 | /* The signed conversion is cheaper. x64 really has 47 bit pointers. */ |
524 | sp = emitconv(sp, (LJ_64 && dsize == 8) ? IRT_I64 : IRT_U32, | 524 | sp = emitconv(sp, (LJ_64 && dsize == 8) ? IRT_I64 : IRT_U32, |
525 | st, IRCONV_TRUNC|IRCONV_ANY); | 525 | st, IRCONV_ANY); |
526 | goto xstore; | 526 | goto xstore; |
527 | 527 | ||
528 | /* Destination is an array. */ | 528 | /* Destination is an array. */ |
@@ -1229,7 +1229,7 @@ static TRef crec_arith_int64(jit_State *J, TRef *sp, CType **s, MMS mm) | |||
1229 | for (i = 0; i < 2; i++) { | 1229 | for (i = 0; i < 2; i++) { |
1230 | IRType st = tref_type(sp[i]); | 1230 | IRType st = tref_type(sp[i]); |
1231 | if (st == IRT_NUM || st == IRT_FLOAT) | 1231 | if (st == IRT_NUM || st == IRT_FLOAT) |
1232 | sp[i] = emitconv(sp[i], dt, st, IRCONV_TRUNC|IRCONV_ANY); | 1232 | sp[i] = emitconv(sp[i], dt, st, IRCONV_ANY); |
1233 | else if (!(st == IRT_I64 || st == IRT_U64)) | 1233 | else if (!(st == IRT_I64 || st == IRT_U64)) |
1234 | sp[i] = emitconv(sp[i], dt, IRT_INT, | 1234 | sp[i] = emitconv(sp[i], dt, IRT_INT, |
1235 | (s[i]->info & CTF_UNSIGNED) ? 0 : IRCONV_SEXT); | 1235 | (s[i]->info & CTF_UNSIGNED) ? 0 : IRCONV_SEXT); |
@@ -1297,15 +1297,14 @@ static TRef crec_arith_ptr(jit_State *J, TRef *sp, CType **s, MMS mm) | |||
1297 | CTypeID id; | 1297 | CTypeID id; |
1298 | #if LJ_64 | 1298 | #if LJ_64 |
1299 | if (t == IRT_NUM || t == IRT_FLOAT) | 1299 | if (t == IRT_NUM || t == IRT_FLOAT) |
1300 | tr = emitconv(tr, IRT_INTP, t, IRCONV_TRUNC|IRCONV_ANY); | 1300 | tr = emitconv(tr, IRT_INTP, t, IRCONV_ANY); |
1301 | else if (!(t == IRT_I64 || t == IRT_U64)) | 1301 | else if (!(t == IRT_I64 || t == IRT_U64)) |
1302 | tr = emitconv(tr, IRT_INTP, IRT_INT, | 1302 | tr = emitconv(tr, IRT_INTP, IRT_INT, |
1303 | ((t - IRT_I8) & 1) ? 0 : IRCONV_SEXT); | 1303 | ((t - IRT_I8) & 1) ? 0 : IRCONV_SEXT); |
1304 | #else | 1304 | #else |
1305 | if (!tref_typerange(sp[1], IRT_I8, IRT_U32)) { | 1305 | if (!tref_typerange(sp[1], IRT_I8, IRT_U32)) { |
1306 | tr = emitconv(tr, IRT_INTP, t, | 1306 | tr = emitconv(tr, IRT_INTP, t, |
1307 | (t == IRT_NUM || t == IRT_FLOAT) ? | 1307 | (t == IRT_NUM || t == IRT_FLOAT) ? IRCONV_ANY : 0); |
1308 | IRCONV_TRUNC|IRCONV_ANY : 0); | ||
1309 | } | 1308 | } |
1310 | #endif | 1309 | #endif |
1311 | tr = emitir(IRT(IR_MUL, IRT_INTP), tr, lj_ir_kintp(J, sz)); | 1310 | tr = emitir(IRT(IR_MUL, IRT_INTP), tr, lj_ir_kintp(J, sz)); |
diff --git a/src/lj_ir.h b/src/lj_ir.h index a9824325..9d2521c9 100644 --- a/src/lj_ir.h +++ b/src/lj_ir.h | |||
@@ -227,7 +227,6 @@ IRFLDEF(FLENUM) | |||
227 | #define IRCONV_DSH 5 | 227 | #define IRCONV_DSH 5 |
228 | #define IRCONV_NUM_INT ((IRT_NUM<<IRCONV_DSH)|IRT_INT) | 228 | #define IRCONV_NUM_INT ((IRT_NUM<<IRCONV_DSH)|IRT_INT) |
229 | #define IRCONV_INT_NUM ((IRT_INT<<IRCONV_DSH)|IRT_NUM) | 229 | #define IRCONV_INT_NUM ((IRT_INT<<IRCONV_DSH)|IRT_NUM) |
230 | #define IRCONV_TRUNC 0x0400 /* Truncate number to integer. */ | ||
231 | #define IRCONV_SEXT 0x0800 /* Sign-extend integer to integer. */ | 230 | #define IRCONV_SEXT 0x0800 /* Sign-extend integer to integer. */ |
232 | #define IRCONV_MODEMASK 0x0fff | 231 | #define IRCONV_MODEMASK 0x0fff |
233 | #define IRCONV_CONVMASK 0xf000 | 232 | #define IRCONV_CONVMASK 0xf000 |
diff --git a/src/lj_obj.h b/src/lj_obj.h index b967819d..6f367ea2 100644 --- a/src/lj_obj.h +++ b/src/lj_obj.h | |||
@@ -810,11 +810,7 @@ static LJ_AINLINE int32_t lj_num2bit(lua_Number n) | |||
810 | #endif | 810 | #endif |
811 | } | 811 | } |
812 | 812 | ||
813 | #if LJ_TARGET_X86 && !defined(__SSE2__) | ||
814 | #define lj_num2int(n) lj_num2bit((n)) | ||
815 | #else | ||
816 | #define lj_num2int(n) ((int32_t)(n)) | 813 | #define lj_num2int(n) ((int32_t)(n)) |
817 | #endif | ||
818 | 814 | ||
819 | static LJ_AINLINE uint64_t lj_num2u64(lua_Number n) | 815 | static LJ_AINLINE uint64_t lj_num2u64(lua_Number n) |
820 | { | 816 | { |
diff --git a/src/lj_opt_fold.c b/src/lj_opt_fold.c index be50bf97..e67f3ee6 100644 --- a/src/lj_opt_fold.c +++ b/src/lj_opt_fold.c | |||
@@ -647,27 +647,22 @@ LJFOLD(CONV KNUM IRCONV_INT_NUM) | |||
647 | LJFOLDF(kfold_conv_knum_int_num) | 647 | LJFOLDF(kfold_conv_knum_int_num) |
648 | { | 648 | { |
649 | lua_Number n = knumleft; | 649 | lua_Number n = knumleft; |
650 | if (!(fins->op2 & IRCONV_TRUNC)) { | 650 | int32_t k = lj_num2int(n); |
651 | int32_t k = lj_num2int(n); | 651 | if (irt_isguard(fins->t) && n != (lua_Number)k) { |
652 | if (irt_isguard(fins->t) && n != (lua_Number)k) { | 652 | /* We're about to create a guard which always fails, like CONV +1.5. |
653 | /* We're about to create a guard which always fails, like CONV +1.5. | 653 | ** Some pathological loops cause this during LICM, e.g.: |
654 | ** Some pathological loops cause this during LICM, e.g.: | 654 | ** local x,k,t = 0,1.5,{1,[1.5]=2} |
655 | ** local x,k,t = 0,1.5,{1,[1.5]=2} | 655 | ** for i=1,200 do x = x+ t[k]; k = k == 1 and 1.5 or 1 end |
656 | ** for i=1,200 do x = x+ t[k]; k = k == 1 and 1.5 or 1 end | 656 | ** assert(x == 300) |
657 | ** assert(x == 300) | 657 | */ |
658 | */ | 658 | return FAILFOLD; |
659 | return FAILFOLD; | ||
660 | } | ||
661 | return INTFOLD(k); | ||
662 | } else { | ||
663 | return INTFOLD((int32_t)n); | ||
664 | } | 659 | } |
660 | return INTFOLD(k); | ||
665 | } | 661 | } |
666 | 662 | ||
667 | LJFOLD(CONV KNUM IRCONV_U32_NUM) | 663 | LJFOLD(CONV KNUM IRCONV_U32_NUM) |
668 | LJFOLDF(kfold_conv_knum_u32_num) | 664 | LJFOLDF(kfold_conv_knum_u32_num) |
669 | { | 665 | { |
670 | lua_assert((fins->op2 & IRCONV_TRUNC)); | ||
671 | #ifdef _MSC_VER | 666 | #ifdef _MSC_VER |
672 | { /* Workaround for MSVC bug. */ | 667 | { /* Workaround for MSVC bug. */ |
673 | volatile uint32_t u = (uint32_t)knumleft; | 668 | volatile uint32_t u = (uint32_t)knumleft; |
@@ -681,14 +676,12 @@ LJFOLDF(kfold_conv_knum_u32_num) | |||
681 | LJFOLD(CONV KNUM IRCONV_I64_NUM) | 676 | LJFOLD(CONV KNUM IRCONV_I64_NUM) |
682 | LJFOLDF(kfold_conv_knum_i64_num) | 677 | LJFOLDF(kfold_conv_knum_i64_num) |
683 | { | 678 | { |
684 | lua_assert((fins->op2 & IRCONV_TRUNC)); | ||
685 | return INT64FOLD((uint64_t)(int64_t)knumleft); | 679 | return INT64FOLD((uint64_t)(int64_t)knumleft); |
686 | } | 680 | } |
687 | 681 | ||
688 | LJFOLD(CONV KNUM IRCONV_U64_NUM) | 682 | LJFOLD(CONV KNUM IRCONV_U64_NUM) |
689 | LJFOLDF(kfold_conv_knum_u64_num) | 683 | LJFOLDF(kfold_conv_knum_u64_num) |
690 | { | 684 | { |
691 | lua_assert((fins->op2 & IRCONV_TRUNC)); | ||
692 | return INT64FOLD(lj_num2u64(knumleft)); | 685 | return INT64FOLD(lj_num2u64(knumleft)); |
693 | } | 686 | } |
694 | 687 | ||
diff --git a/src/lj_opt_narrow.c b/src/lj_opt_narrow.c index caf2a8df..5d0ea9cb 100644 --- a/src/lj_opt_narrow.c +++ b/src/lj_opt_narrow.c | |||
@@ -496,8 +496,7 @@ TRef LJ_FASTCALL lj_opt_narrow_cindex(jit_State *J, TRef tr) | |||
496 | { | 496 | { |
497 | lua_assert(tref_isnumber(tr)); | 497 | lua_assert(tref_isnumber(tr)); |
498 | if (tref_isnum(tr)) | 498 | if (tref_isnum(tr)) |
499 | return emitir(IRT(IR_CONV, IRT_INTP), tr, | 499 | return emitir(IRT(IR_CONV, IRT_INTP), tr, (IRT_INTP<<5)|IRT_NUM|IRCONV_ANY); |
500 | (IRT_INTP<<5)|IRT_NUM|IRCONV_TRUNC|IRCONV_ANY); | ||
501 | /* Undefined overflow semantics allow stripping of ADDOV, SUBOV and MULOV. */ | 500 | /* Undefined overflow semantics allow stripping of ADDOV, SUBOV and MULOV. */ |
502 | return narrow_stripov(J, tr, IR_MULOV, | 501 | return narrow_stripov(J, tr, IR_MULOV, |
503 | LJ_64 ? ((IRT_INTP<<5)|IRT_INT|IRCONV_SEXT) : | 502 | LJ_64 ? ((IRT_INTP<<5)|IRT_INT|IRCONV_SEXT) : |
diff --git a/src/lj_target_arm.h b/src/lj_target_arm.h index bec55772..f1aedff0 100644 --- a/src/lj_target_arm.h +++ b/src/lj_target_arm.h | |||
@@ -243,10 +243,6 @@ typedef enum ARMIns { | |||
243 | ARMI_VCVT_S32_F64 = 0xeebd0bc0, | 243 | ARMI_VCVT_S32_F64 = 0xeebd0bc0, |
244 | ARMI_VCVT_U32_F32 = 0xeebc0ac0, | 244 | ARMI_VCVT_U32_F32 = 0xeebc0ac0, |
245 | ARMI_VCVT_U32_F64 = 0xeebc0bc0, | 245 | ARMI_VCVT_U32_F64 = 0xeebc0bc0, |
246 | ARMI_VCVTR_S32_F32 = 0xeebd0a40, | ||
247 | ARMI_VCVTR_S32_F64 = 0xeebd0b40, | ||
248 | ARMI_VCVTR_U32_F32 = 0xeebc0a40, | ||
249 | ARMI_VCVTR_U32_F64 = 0xeebc0b40, | ||
250 | ARMI_VCVT_F32_S32 = 0xeeb80ac0, | 246 | ARMI_VCVT_F32_S32 = 0xeeb80ac0, |
251 | ARMI_VCVT_F64_S32 = 0xeeb80bc0, | 247 | ARMI_VCVT_F64_S32 = 0xeeb80bc0, |
252 | ARMI_VCVT_F32_U32 = 0xeeb80a40, | 248 | ARMI_VCVT_F32_U32 = 0xeeb80a40, |
diff --git a/src/lj_target_x86.h b/src/lj_target_x86.h index 84b0871d..450df77f 100644 --- a/src/lj_target_x86.h +++ b/src/lj_target_x86.h | |||
@@ -277,10 +277,8 @@ typedef enum { | |||
277 | XO_ROUNDSD = 0x0b3a0ffc, /* Really 66 0f 3a 0b. See asm_fpmath. */ | 277 | XO_ROUNDSD = 0x0b3a0ffc, /* Really 66 0f 3a 0b. See asm_fpmath. */ |
278 | XO_UCOMISD = XO_660f(2e), | 278 | XO_UCOMISD = XO_660f(2e), |
279 | XO_CVTSI2SD = XO_f20f(2a), | 279 | XO_CVTSI2SD = XO_f20f(2a), |
280 | XO_CVTSD2SI = XO_f20f(2d), | ||
281 | XO_CVTTSD2SI= XO_f20f(2c), | 280 | XO_CVTTSD2SI= XO_f20f(2c), |
282 | XO_CVTSI2SS = XO_f30f(2a), | 281 | XO_CVTSI2SS = XO_f30f(2a), |
283 | XO_CVTSS2SI = XO_f30f(2d), | ||
284 | XO_CVTTSS2SI= XO_f30f(2c), | 282 | XO_CVTTSS2SI= XO_f30f(2c), |
285 | XO_CVTSS2SD = XO_f30f(5a), | 283 | XO_CVTSS2SD = XO_f30f(5a), |
286 | XO_CVTSD2SS = XO_f20f(5a), | 284 | XO_CVTSD2SS = XO_f20f(5a), |
diff --git a/src/vm_mips.dasc b/src/vm_mips.dasc index e7c89267..f37cd931 100644 --- a/src/vm_mips.dasc +++ b/src/vm_mips.dasc | |||
@@ -1188,7 +1188,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1188 | | mtc1 TMP0, FARG1 | 1188 | | mtc1 TMP0, FARG1 |
1189 | | beqz AT, ->fff_fallback | 1189 | | beqz AT, ->fff_fallback |
1190 | |. lw PC, FRAME_PC(BASE) | 1190 | |. lw PC, FRAME_PC(BASE) |
1191 | | cvt.w.d FRET1, FARG2 | 1191 | | trunc.w.d FRET1, FARG2 |
1192 | | cvt.d.w FARG1, FARG1 | 1192 | | cvt.d.w FARG1, FARG1 |
1193 | | lw TMP0, TAB:CARG1->asize | 1193 | | lw TMP0, TAB:CARG1->asize |
1194 | | lw TMP1, TAB:CARG1->array | 1194 | | lw TMP1, TAB:CARG1->array |
@@ -1522,7 +1522,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1522 | |. nop | 1522 | |. nop |
1523 | | | 1523 | | |
1524 | |.ffunc_nn math_ldexp | 1524 | |.ffunc_nn math_ldexp |
1525 | | cvt.w.d FARG2, FARG2 | 1525 | | trunc.w.d FARG2, FARG2 |
1526 | | load_got ldexp | 1526 | | load_got ldexp |
1527 | | mfc1 CARG3, FARG2 | 1527 | | mfc1 CARG3, FARG2 |
1528 | | call_extern | 1528 | | call_extern |
@@ -1622,7 +1622,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1622 | |. sltiu AT, CARG3, LJ_TISNUM | 1622 | |. sltiu AT, CARG3, LJ_TISNUM |
1623 | | beqz AT, ->fff_fallback | 1623 | | beqz AT, ->fff_fallback |
1624 | |. li CARG3, 1 | 1624 | |. li CARG3, 1 |
1625 | | cvt.w.d FARG1, FARG1 | 1625 | | trunc.w.d FARG1, FARG1 |
1626 | | addiu CARG2, sp, ARG5_OFS | 1626 | | addiu CARG2, sp, ARG5_OFS |
1627 | | sltiu AT, TMP0, 256 | 1627 | | sltiu AT, TMP0, 256 |
1628 | | mfc1 TMP0, FARG1 | 1628 | | mfc1 TMP0, FARG1 |
@@ -1652,7 +1652,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1652 | | ldc1 f2, 8(BASE) | 1652 | | ldc1 f2, 8(BASE) |
1653 | | beqz AT, >1 | 1653 | | beqz AT, >1 |
1654 | |. li CARG4, -1 | 1654 | |. li CARG4, -1 |
1655 | | cvt.w.d f0, f0 | 1655 | | trunc.w.d f0, f0 |
1656 | | sltiu AT, CARG3, LJ_TISNUM | 1656 | | sltiu AT, CARG3, LJ_TISNUM |
1657 | | beqz AT, ->fff_fallback | 1657 | | beqz AT, ->fff_fallback |
1658 | |. mfc1 CARG4, f0 | 1658 | |. mfc1 CARG4, f0 |
@@ -1660,7 +1660,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1660 | | sltiu AT, CARG2, LJ_TISNUM | 1660 | | sltiu AT, CARG2, LJ_TISNUM |
1661 | | beqz AT, ->fff_fallback | 1661 | | beqz AT, ->fff_fallback |
1662 | |. li AT, LJ_TSTR | 1662 | |. li AT, LJ_TSTR |
1663 | | cvt.w.d f2, f2 | 1663 | | trunc.w.d f2, f2 |
1664 | | bne TMP0, AT, ->fff_fallback | 1664 | | bne TMP0, AT, ->fff_fallback |
1665 | |. lw CARG2, STR:CARG1->len | 1665 | |. lw CARG2, STR:CARG1->len |
1666 | | mfc1 CARG3, f2 | 1666 | | mfc1 CARG3, f2 |
@@ -1700,7 +1700,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1700 | | or AT, AT, TMP0 | 1700 | | or AT, AT, TMP0 |
1701 | | bnez AT, ->fff_fallback | 1701 | | bnez AT, ->fff_fallback |
1702 | |. sltiu AT, CARG4, LJ_TISNUM | 1702 | |. sltiu AT, CARG4, LJ_TISNUM |
1703 | | cvt.w.d f0, f0 | 1703 | | trunc.w.d f0, f0 |
1704 | | beqz AT, ->fff_fallback | 1704 | | beqz AT, ->fff_fallback |
1705 | |. lw TMP0, STR:CARG1->len | 1705 | |. lw TMP0, STR:CARG1->len |
1706 | | mfc1 CARG3, f0 | 1706 | | mfc1 CARG3, f0 |
diff --git a/src/vm_x86.dasc b/src/vm_x86.dasc index bf42f5d2..c8095db2 100644 --- a/src/vm_x86.dasc +++ b/src/vm_x86.dasc | |||
@@ -1622,7 +1622,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1622 | | movsd xmm0, qword [BASE+8] | 1622 | | movsd xmm0, qword [BASE+8] |
1623 | | sseconst_1 xmm1, RBa | 1623 | | sseconst_1 xmm1, RBa |
1624 | | addsd xmm0, xmm1 | 1624 | | addsd xmm0, xmm1 |
1625 | | cvtsd2si RD, xmm0 | 1625 | | cvttsd2si RD, xmm0 |
1626 | | movsd qword [BASE-8], xmm0 | 1626 | | movsd qword [BASE-8], xmm0 |
1627 | |.endif | 1627 | |.endif |
1628 | | mov TAB:RB, [BASE] | 1628 | | mov TAB:RB, [BASE] |
@@ -1975,7 +1975,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
1975 | | movsd xmm0, qword [BASE] | 1975 | | movsd xmm0, qword [BASE] |
1976 | | call ->vm_ .. func .. _sse | 1976 | | call ->vm_ .. func .. _sse |
1977 | |.if DUALNUM | 1977 | |.if DUALNUM |
1978 | | cvtsd2si RB, xmm0 | 1978 | | cvttsd2si RB, xmm0 |
1979 | | cmp RB, 0x80000000 | 1979 | | cmp RB, 0x80000000 |
1980 | | jne ->fff_resi | 1980 | | jne ->fff_resi |
1981 | | cvtsi2sd xmm1, RB | 1981 | | cvtsi2sd xmm1, RB |
@@ -2968,7 +2968,7 @@ static void build_subroutines(BuildCtx *ctx) | |||
2968 | |// Args in xmm0/xmm1. Ret in xmm0. xmm0-xmm2 and RC (eax) modified. | 2968 | |// Args in xmm0/xmm1. Ret in xmm0. xmm0-xmm2 and RC (eax) modified. |
2969 | |// Needs 16 byte scratch area for x86. Also called from JIT code. | 2969 | |// Needs 16 byte scratch area for x86. Also called from JIT code. |
2970 | |->vm_pow_sse: | 2970 | |->vm_pow_sse: |
2971 | | cvtsd2si eax, xmm1 | 2971 | | cvttsd2si eax, xmm1 |
2972 | | cvtsi2sd xmm2, eax | 2972 | | cvtsi2sd xmm2, eax |
2973 | | ucomisd xmm1, xmm2 | 2973 | | ucomisd xmm1, xmm2 |
2974 | | jnz >8 // Branch for FP exponents. | 2974 | | jnz >8 // Branch for FP exponents. |
@@ -4376,7 +4376,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4376 | | // Convert number to int and back and compare. | 4376 | | // Convert number to int and back and compare. |
4377 | | checknum RC, >5 | 4377 | | checknum RC, >5 |
4378 | | movsd xmm0, qword [BASE+RC*8] | 4378 | | movsd xmm0, qword [BASE+RC*8] |
4379 | | cvtsd2si RC, xmm0 | 4379 | | cvttsd2si RC, xmm0 |
4380 | | cvtsi2sd xmm1, RC | 4380 | | cvtsi2sd xmm1, RC |
4381 | | ucomisd xmm0, xmm1 | 4381 | | ucomisd xmm0, xmm1 |
4382 | | jne ->vmeta_tgetv // Generic numeric key? Use fallback. | 4382 | | jne ->vmeta_tgetv // Generic numeric key? Use fallback. |
@@ -4516,7 +4516,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | |||
4516 | | // Convert number to int and back and compare. | 4516 | | // Convert number to int and back and compare. |
4517 | | checknum RC, >5 | 4517 | | checknum RC, >5 |
4518 | | movsd xmm0, qword [BASE+RC*8] | 4518 | | movsd xmm0, qword [BASE+RC*8] |
4519 | | cvtsd2si RC, xmm0 | 4519 | | cvttsd2si RC, xmm0 |
4520 | | cvtsi2sd xmm1, RC | 4520 | | cvtsi2sd xmm1, RC |
4521 | | ucomisd xmm0, xmm1 | 4521 | | ucomisd xmm0, xmm1 |
4522 | | jne ->vmeta_tsetv // Generic numeric key? Use fallback. | 4522 | | jne ->vmeta_tsetv // Generic numeric key? Use fallback. |